bus_managers/firewire/fwohci.cpp

337 fwohci_ioctl (void *cookie, u_long cmd, void *data, size_t len)
356 	switch (cmd) {
851 		FWOHCI_DMA_WRITE(db->db.desc.cmd, step);
859 		FWOHCI_DMA_WRITE(db->db.desc.cmd, info->pay_len % step);
946  	FWOHCI_DMA_WRITE(db->db.desc.cmd,
1006 			FWOHCI_DMA_SET(db_tr->db[i].db.desc.cmd,
1017  	FWOHCI_DMA_SET(db->db.desc.cmd,
1421 					db[ldesc].db.desc.cmd,
1425 					db[0].db.desc.cmd,
1525 					db[ldesc].db.desc.cmd,
1621 			FWOHCI_DMA_SET(db[ldesc].db.desc.cmd,
1752  			FWOHCI_DMA_SET(db_tr->db[1].db.desc.cmd,
2285 	uint32_t off, cntl, stat, cmd, match;
2301 	cmd = OREAD(sc, off + 0xc);
2304 	device_printf(sc->fc.dev, "ch %1x cntl:0x%08x cmd:0x%08x match:0x%08x\n",
2307 		cmd,
2334 	uint32_t cmd, off;
2354 	cmd = OREAD(sc, off + 0xc);
2370 			if ((cmd  & 0xfffffff0) == cp->bus_addr) {
2400 		printf("dbdump err ch = %d cmd = 0x%08x\n", ch, cmd);
2411 	uint32_t cmd, res;
2431 		cmd = FWOHCI_DMA_READ(db[i].db.desc.cmd);
2433 		key = cmd & OHCI_KEY_MASK;
2437 				dbcode[(cmd >> 28) & 0xf],
2438 				dbkey[(cmd >> 24) & 0x7],
2439 				dbcond[(cmd >> 20) & 0x3],
2440 				dbcond[(cmd >> 18) & 0x3],
2441 				cmd & OHCI_COUNT_MASK,
2470 		if((cmd & OHCI_BRANCH_MASK)
2474 		if((cmd & OHCI_CMD_MASK)
2478 		if((cmd & OHCI_CMD_MASK)
2557 		FWOHCI_DMA_CLEAR(db[2].db.desc.cmd, OHCI_COUNT_MASK);
2558 		FWOHCI_DMA_SET(db[2].db.desc.cmd, fp->mode.stream.len);
2561 		db[2].db.desc.cmd = OHCI_OUTPUT_LAST
2606 	FWOHCI_DMA_WRITE(db[0].db.desc.cmd,
2613 	FWOHCI_DMA_WRITE(db[2].db.desc.cmd,
2631 		FWOHCI_DMA_WRITE(db[i].db.desc.cmd, OHCI_INPUT_MORE | dsiz[i]);
2633 			FWOHCI_DMA_SET(db[i].db.desc.cmd, OHCI_UPDATE);
2639 		FWOHCI_DMA_SET(db[ldesc].db.desc.cmd, OHCI_INPUT_LAST);
2641 	FWOHCI_DMA_SET(db[ldesc].db.desc.cmd, OHCI_BRANCH_ALWAYS);