via/engine/crtc.c

81 status_t eng_crtc_set_timing(display_mode target)
117 		target.timing.h_sync_start =
119 			target.timing.h_display)) & 0xfff8;
121 		target.timing.h_sync_end =
123 			target.timing.h_display)) & 0xfff8;
125 		target.timing.h_total =
127 			target.timing.h_display)) & 0xfff8) - 8;
131 		if (target.timing.h_display == si->ps.p1_timing.h_display)
135 				target.timing.h_total -= 56;
138 				target.timing.h_total -= 32;
141 		if (target.timing.h_sync_start == target.timing.h_display)
142 			target.timing.h_sync_start += 8;
143 		if (target.timing.h_sync_end == target.timing.h_total)
144 			target.timing.h_sync_end -= 8;
147 		target.timing.v_sync_start =
149 			target.timing.v_display));
151 		target.timing.v_sync_end =
153 			target.timing.v_display));
155 		target.timing.v_total =
157 			target.timing.v_display)) - 1;
159 		if (target.timing.v_sync_start == target.timing.v_display)
160 			target.timing.v_sync_start += 1;
161 		if (target.timing.v_sync_end == target.timing.v_total)
162 			target.timing.v_sync_end -= 1;
169 	htotal = ((target.timing.h_total >> 3) - 5);
170 	hdisp_e = ((target.timing.h_display >> 3) - 1);
173 	hsync_s = (target.timing.h_sync_start >> 3);
174 	hsync_e = (target.timing.h_sync_end >> 3);
176 	vtotal = target.timing.v_total - 2;
177 	vdisp_e = target.timing.v_display - 1;
180 	vsync_s = target.timing.v_sync_start;//-1;
181 	vsync_e = target.timing.v_sync_end;//-1;
250 		if (target.timing.flags & B_POSITIVE_HSYNC)
260 		if (target.timing.flags & B_POSITIVE_VSYNC)
275 		switch (target.space)
291 		fifolimit *= target.timing.h_display;
312 		iscale_x = (((1 << 12) * target.timing.h_display) / si->ps.p1_timing.h_display);
313 		iscale_y = (((1 << 12) * target.timing.v_display) / si->ps.p1_timing.v_display);
353 			dm_aspect = (target.timing.h_display / ((float)target.timing.v_display));
357 				DACW(FP_DEBUG2, ((1 << 28) | ((target.timing.v_display - 1) << 16)));
391 						(target.timing.h_display * ((1 << 12) / ((float)iscale_x))))