accelerants/s3/savage_mode.cpp

67 	WriteCrtcReg(0x69, 0x80, 0x80);
84 	WriteCrtcReg(0x88, DISABLE_BLOCK_WRITE_2D, DISABLE_BLOCK_WRITE_2D);
113 	WriteCrtcReg(0x69, 0x80, 0x80);
130 	WriteCrtcReg(0x88, DISABLE_BLOCK_WRITE_2D, DISABLE_BLOCK_WRITE_2D);
146 	WriteCrtcReg(0x67, 0x08, 0x08);
149 	WriteCrtcReg(0x67, 0x08, 0x08);
153 	WriteCrtcReg(MEMORY_CTRL0_REG, 0x00, MEM_PS1 + MEM_PS2);
185 	WriteCrtcReg(0x78, 0xfb, 0xfb);
201 	WriteCrtcReg(0x67, 0x08, 0x08);
204 	WriteCrtcReg(0x67, 0x08, 0x08);
210 	WriteCrtcReg(0x65, 0x03, 0x03);
267 	WriteCrtcReg(0x67, 0x08, 0x08);
272 	WriteCrtcReg(0x73, 0x00, 0x20);		// CR73 bit 5 = 0 block write disable
309 	WriteCrtcReg(0x50, 0xc1, 0xc1);		// CR50, bit 7,6,0 = 111, Use GBD
327 	WriteCrtcReg(0x40, 0x01);	// enable graphics engine
328 	WriteCrtcReg(0x31, 0x0c);	// turn on 16-bit register access
402 		WriteCrtcReg(0x66, 0x02, 0x02);
404 		WriteCrtcReg(0x66, 0x00, 0x02);
514 	WriteCrtcReg(0x38, 0x48);		// unlock sys regs CR20~CR3F
515 	WriteCrtcReg(0x39, 0xa0);		// unlock sys regs CR40~CRFF
525 	WriteCrtcReg(0x67, regRec.CR67 & ~0x0e); // no STREAMS yet old and new
534 		WriteCrtcReg(0x5f, 0);
547 	WriteCrtcReg(0x66, regRec.CR66);
548 	WriteCrtcReg(0x3a, regRec.CR3A);
549 	WriteCrtcReg(0x58, regRec.CR58);
550 	WriteCrtcReg(0x53, regRec.CR53 & 0x7f);
566 	WriteCrtcReg(0x11, 0x00, 0x80);		// unlock CRTC reg's 0-7 by clearing bit 7 of cr11
569 		WriteCrtcReg(j, regRec.CRTC[j]);
583 	WriteCrtcReg(0x53, regRec.CR53);
584 	WriteCrtcReg(0x5d, regRec.CR5D);
585 	WriteCrtcReg(0x5e, regRec.CR5E);
586 	WriteCrtcReg(0x3b, regRec.CR3B);
587 	WriteCrtcReg(0x3c, regRec.CR3C);
588 	WriteCrtcReg(0x43, regRec.CR43);
589 	WriteCrtcReg(0x65, regRec.CR65);
592 	WriteCrtcReg(0x67, regRec.CR67 & ~0x0e);	// no streams for new and old streams engines
595 	WriteCrtcReg(0x34, regRec.CR34);
596 	WriteCrtcReg(0x42, regRec.CR42);
597 	WriteCrtcReg(0x45, regRec.CR45);
598 	WriteCrtcReg(0x50, regRec.CR50);
599 	WriteCrtcReg(0x51, regRec.CR51);
603 	WriteCrtcReg(0x69, regRec.CR69);
605 	WriteCrtcReg(0x33, regRec.CR33);
606 	WriteCrtcReg(0x86, regRec.CR86);
607 	WriteCrtcReg(0x88, regRec.CR88);
608 	WriteCrtcReg(0x90, regRec.CR90);
609 	WriteCrtcReg(0x91, regRec.CR91);
612 		WriteCrtcReg(0xb0, regRec.CRB0);
632 	WriteCrtcReg(0x67, regRec.CR67);
635 	WriteCrtcReg(0x66, cr66 | 0x80);
637 	WriteCrtcReg(0x3a, cr3a | 0x80);
641 	WriteCrtcReg(0x66, cr66);
642 	WriteCrtcReg(0x3a, cr3a);
646 	WriteCrtcReg(0x40, 0x01);		// enable graphics engine