accelerants/radeon/monitor_detection.c

40 	vuint8 *regs = info->ai->regs;
43 	value = INREG(regs, info->port);
56 	vuint8 *regs = info->ai->regs;
59 	value = INREG(regs, info->port);
65 	OUTREG(regs, info->port, value);
104 	vuint8 *regs = ai->regs;
109 	old_crtc_ext_cntl = INREG(regs, RADEON_CRTC_EXT_CNTL);
112 	OUTREG(regs, RADEON_CRTC_EXT_CNTL, value);
116 	old_dac_ext_cntl = INREG(regs, RADEON_DAC_EXT_CNTL);
121 	OUTREG(regs, RADEON_DAC_EXT_CNTL, value);
124 	old_dac_cntl = INREG(regs, RADEON_DAC_CNTL);
128 	OUTREG(regs, RADEON_DAC_CNTL, value);
137 	found = (INREG(regs, RADEON_DAC_CNTL) & RADEON_DAC_CMP_OUTPUT) != 0;
143 	OUTREG(regs, RADEON_DAC_CNTL, old_dac_cntl);
144 	OUTREG(regs, RADEON_DAC_EXT_CNTL, old_dac_ext_cntl);
145 	OUTREG(regs, RADEON_CRTC_EXT_CNTL, old_crtc_ext_cntl);
159 	old_vclk_ecp_cntl = Radeon_INPLL(ai->regs, ai->si->asic,
164 	Radeon_OUTPLL(ai->regs, ai->si->asic, RADEON_VCLK_ECP_CNTL, value);
169 	Radeon_OUTPLL(ai->regs, ai->si->asic, RADEON_VCLK_ECP_CNTL,
180 	vuint8 *regs = ai->regs;
185 	old_crtc2_gen_cntl = INREG(regs, RADEON_CRTC2_GEN_CNTL);
189 	OUTREG(regs, RADEON_CRTC2_GEN_CNTL, value);
192 	old_tv_dac_cntl = INREG(regs, RADEON_TV_DAC_CNTL);
196 	OUTREG(regs, RADEON_TV_DAC_CNTL, value);
202 	OUTREG(regs, RADEON_DAC_EXT_CNTL, value);
204 	old_dac_cntl2 = INREG(regs, RADEON_DAC_CNTL2);
209 	OUTREG(regs, RADEON_DAC_CNTL2, value);
214 	found = (INREG(regs, RADEON_DAC_CNTL2) & RADEON_DAC2_CMP_OUTPUT) != 0;
218 	OUTREG(regs, RADEON_DAC_CNTL2, old_dac_cntl2);
219 	OUTREG(regs, RADEON_DAC_EXT_CNTL, 0);
220 	OUTREG(regs, RADEON_TV_DAC_CNTL, old_tv_dac_cntl);
221 	OUTREG(regs, RADEON_CRTC2_GEN_CNTL, old_crtc2_gen_cntl);
231 	vuint8 *regs = ai->regs;
236 	old_radeon_gpiopad_a = INREG(regs, RADEON_GPIOPAD_A);
239 	OUTREGP(regs, RADEON_GPIOPAD_EN, 1, ~1);
240 	OUTREGP(regs, RADEON_GPIOPAD_MASK, 1, ~1);
241 	OUTREGP(regs, RADEON_GPIOPAD_A, 1, ~1);
243 	old_crtc2_gen_cntl = INREG(regs, RADEON_CRTC2_GEN_CNTL);
252 	OUTREG(regs, RADEON_CRTC2_GEN_CNTL, value);
254 	old_tv_dac_cntl = INREG(regs, RADEON_TV_DAC_CNTL);
257 	OUTREG(regs, RADEON_TV_DAC_CNTL, RADEON_TV_DAC_CNTL_NBLANK
262 	OUTREG(regs, RADEON_DAC_EXT_CNTL, RADEON_DAC2_FORCE_BLANK_OFF_EN
266 	old_dac_cntl2 = INREG(regs, RADEON_DAC_CNTL2);
269 	OUTREG(regs, RADEON_DAC_CNTL2, old_dac_cntl2 | RADEON_DAC2_CLK_SEL_CRT
275 	found = (INREG(regs, RADEON_DAC_CNTL2) & RADEON_DAC2_CMP_OUT_B) != 0;
278 	OUTREG(regs, RADEON_DAC_CNTL2, old_dac_cntl2);
279 	OUTREG(regs, RADEON_DAC_EXT_CNTL, 0);
280 	OUTREG(regs, RADEON_TV_DAC_CNTL, old_tv_dac_cntl);
281 	OUTREG(regs, RADEON_CRTC2_GEN_CNTL, old_crtc2_gen_cntl);
283 	OUTREGP(regs, RADEON_GPIOPAD_A, old_radeon_gpiopad_a, ~1);
334 	vuint8 *regs = ai->regs;
345 	old_dac_cntl2 = INREG(regs, RADEON_DAC_CNTL2);
347 	OUTREG(regs, RADEON_DAC_CNTL2, value);
349 	old_crtc_ext_cntl = INREG(regs, RADEON_CRTC_EXT_CNTL);
350 	old_crtc2_gen_cntl = INREG(regs, RADEON_CRTC2_GEN_CNTL);
351 	old_tv_master_cntl = INREG(regs, RADEON_TV_MASTER_CNTL);
364 	OUTREG(regs, RADEON_TV_MASTER_CNTL, value);
366 	old_tv_dac_cntl = INREG(regs, RADEON_TV_DAC_CNTL);
368 	config_cntl = INREG(regs, RADEON_CONFIG_CNTL);
376 	OUTREG(regs, RADEON_TV_DAC_CNTL, value);
378 	old_pre_dac_mux_cntl = INREG(regs, RADEON_TV_PRE_DAC_MUX_CNTL);
387 	OUTREG(regs, RADEON_TV_PRE_DAC_MUX_CNTL, value);
393 	value = INREG(regs, RADEON_TV_DAC_CNTL);
404 	OUTREG(regs, RADEON_TV_PRE_DAC_MUX_CNTL, old_pre_dac_mux_cntl);
405 	OUTREG(regs, RADEON_TV_DAC_CNTL, old_tv_dac_cntl);
406 	OUTREG(regs, RADEON_TV_MASTER_CNTL, old_tv_master_cntl);
407 	OUTREG(regs, RADEON_CRTC2_GEN_CNTL, old_crtc2_gen_cntl);
408 	OUTREG(regs, RADEON_CRTC_EXT_CNTL, old_crtc_ext_cntl);
409 	OUTREG(regs, RADEON_DAC_CNTL2, old_dac_cntl2);
419 	vuint8 *regs = ai->regs;
424 	old_radeon_gpiopad_a = INREG(regs, RADEON_GPIOPAD_A);
427 	OUTREGP(regs, RADEON_GPIOPAD_EN, 1, ~1);
428 	OUTREGP(regs, RADEON_GPIOPAD_MASK, 1, ~1);
429 	OUTREGP(regs, RADEON_GPIOPAD_A, 0, ~1);
431 	old_dac_cntl2 = INREG(regs, RADEON_DAC_CNTL2);
434 	OUTREG(regs, RADEON_DAC_CNTL2, RADEON_DAC2_CLK_SEL_CRT);
436 	old_crtc2_gen_cntl = INREG(regs, RADEON_CRTC2_GEN_CNTL);
441 	OUTREG(regs, RADEON_CRTC2_GEN_CNTL,
444 	old_dac_ext_cntl = INREG(regs, RADEON_DAC_EXT_CNTL);
447 	OUTREG(regs, RADEON_DAC_EXT_CNTL,
452 	old_tv_dac_cntl = INREG(regs, RADEON_TV_DAC_CNTL);
455 	OUTREG(regs, RADEON_TV_DAC_CNTL,
460 	(void)INREG(regs, RADEON_TV_DAC_CNTL);
464 	OUTREG(regs, RADEON_TV_DAC_CNTL,
471 	(void)INREG(regs, RADEON_TV_DAC_CNTL);
476 	tmp = INREG(regs, RADEON_TV_DAC_CNTL);
488 	OUTREG(regs, RADEON_TV_DAC_CNTL, old_tv_dac_cntl);
489 	OUTREG(regs, RADEON_DAC_EXT_CNTL, old_dac_ext_cntl);
490 	OUTREG(regs, RADEON_CRTC2_GEN_CNTL, old_crtc2_gen_cntl);
491 	OUTREG(regs, RADEON_DAC_CNTL2, old_dac_cntl2);
493 	OUTREGP(regs, RADEON_GPIOPAD_A, old_radeon_gpiopad_a, ~1);
1017 					if (INREG(ai->regs, RADEON_FP_GEN_CNTL) & (1 << 7) || (!si->is_mobility)) {
1053 		if (si->is_mobility && (INREG(ai->regs, RADEON_BIOS_4_SCRATCH) & 4)) {
1061 		if (si->is_mobility && (INREG(ai->regs, RADEON_FP2_GEN_CNTL) & RADEON_FP2_FPON)) {