Lines Matching defs:target

134 	Validate a target display mode is both
145 general_pll_info *pll, display_mode *target,
158 SHOW_FLOW( 4, "X %d, virtX %d", target->timing.h_display, target->virtual_width);
161 if (target->timing.h_total * target->timing.v_total == 0)
167 (((uint64)target->timing.pixel_clock * 1000) << FIX_SHIFT) /
168 ((uint64)target->timing.h_total * target->timing.v_total);
170 want_same_width = target->timing.h_display == target->virtual_width;
171 want_same_height = target->timing.v_display == target->virtual_height;
173 if( !Radeon_GetFormat( target->space, &format, &bpp ))
180 if( target->timing.h_display > flatpanel->panel_xres )
181 target->timing.h_display = flatpanel->panel_xres;
183 if( target->timing.v_display > flatpanel->panel_yres )
184 target->timing.v_display = flatpanel->panel_yres;
193 if( ( target->timing.h_display != flatpanel->panel_xres ) ||
194 ( target->timing.v_display != flatpanel->panel_yres ) )
201 if( target->timing.h_display > 1024 )
202 target->timing.h_display = 1024;
204 if( target->timing.v_display > 768 )
205 target->timing.v_display = 768;
213 h_display = target->timing.h_display;
215 h_sync_start = target->timing.h_sync_start;
216 h_sync_wid = target->timing.h_sync_end - target->timing.h_sync_start;
217 h_total = target->timing.h_total;
262 target->timing.h_display = h_display;
263 target->timing.h_sync_start = h_sync_start;
264 target->timing.h_sync_end = h_sync_start + h_sync_wid;
265 target->timing.h_total = h_total;
269 if( target->timing.h_display < low->timing.h_display ||
270 target->timing.h_display > high->timing.h_display ||
271 target->timing.h_sync_start < low->timing.h_sync_start ||
272 target->timing.h_sync_start > high->timing.h_sync_start ||
273 target->timing.h_sync_end < low->timing.h_sync_end ||
274 target->timing.h_sync_end > high->timing.h_sync_end ||
275 target->timing.h_total < low->timing.h_total ||
276 target->timing.h_total > high->timing.h_total)
286 v_display = target->timing.v_display;
287 v_sync_start = target->timing.v_sync_start;
288 v_sync_wid = target->timing.v_sync_end - target->timing.v_sync_start;
289 v_total = target->timing.v_total;
323 target->timing.v_display = v_display;
324 target->timing.v_sync_start = v_sync_start;
325 target->timing.v_sync_end = v_sync_start + v_sync_wid;
326 target->timing.v_total = v_total;
330 if( target->timing.v_display < low->timing.v_display ||
331 target->timing.v_display > high->timing.v_display ||
332 target->timing.v_sync_start < low->timing.v_sync_start ||
333 target->timing.v_sync_start > high->timing.v_sync_start ||
334 target->timing.v_sync_end < low->timing.v_sync_end ||
335 target->timing.v_sync_end > high->timing.v_sync_end ||
336 target->timing.v_total < low->timing.v_total ||
337 target->timing.v_total > high->timing.v_total )
344 target->timing.pixel_clock =
345 ((uint64)target_refresh / 1000 * target->timing.h_total * target->timing.v_total + FIX_SCALE / 2)
349 if( target->timing.pixel_clock / 10 > pll->max_pll_freq ||
350 target->timing.pixel_clock / 10 * 12 < pll->min_pll_freq )
352 SHOW_ERROR( 4, "pixel_clock (%ld) out of range (%d, %d)", target->timing.pixel_clock,
359 if ((target->timing.h_display > target->virtual_width) || want_same_width)
360 target->virtual_width = target->timing.h_display;
361 if ((target->timing.v_display > target->virtual_height) || want_same_height)
362 target->virtual_height = target->timing.v_display;
368 if (target->virtual_width > 1024*8)
369 target->virtual_width = 1024*8;
371 if (target->virtual_width < low->virtual_width ||
372 target->virtual_width > high->virtual_width )
380 eff_virtual_width = Radeon_RoundVWidth( target->virtual_height, bpp );
393 if ((row_bytes * target->virtual_height) > si->memory[mt_local].size - 1024 )
394 target->virtual_height = (si->memory[mt_local].size - 1024) / row_bytes;
397 if (target->virtual_height < target->timing.v_display) {
399 target->virtual_height, target->timing.v_display );
403 if (target->virtual_height < low->virtual_height ||
404 target->virtual_height > high->virtual_height )
627 PROPOSE_DISPLAY_MODE(display_mode *target, const display_mode *low,
638 result = Radeon_CheckMultiMonTunnel( vc, target, low, high, &isTunneled );
642 // check how many heads are needed by target mode
643 tmp_target = *target;
655 Radeon_DetectMultiMode( vc, target );
656 Radeon_VerifyMultiMode( vc, si, target );
660 target->timing.h_display, target->timing.h_sync_start,
661 target->timing.h_sync_end, target->timing.h_total, target->virtual_width );
663 target->timing.v_display, target->timing.v_sync_start,
664 target->timing.v_sync_end, target->timing.v_total, target->virtual_height );
665 SHOW_FLOW( 2, "clk: %ld", target->timing.pixel_clock );
670 &si->pll, target, low, high );
675 if( Radeon_NeedsSecondPort( target )) {
678 &si->pll, target, low, high );
688 target->timing.h_display, target->timing.h_sync_start,
689 target->timing.h_sync_end, target->timing.h_total, target->virtual_width );
691 target->timing.v_display, target->timing.v_sync_start,
692 target->timing.v_sync_end, target->timing.v_total, target->virtual_height );
693 SHOW_INFO( 2, "clk: %ld", target->timing.pixel_clock );
695 Radeon_HideMultiMode( vc, target );