accelerants/radeon/Acceleration.c

27 	virtual_card *vc = ai->vc;
56 	++ai->si->engine.count;
66 	virtual_card *vc = ai->vc;
70 	Radeon_WaitForFifo ( ai , 1 );
73 	OUTREG(ai->regs, RADEON_DP_GUI_MASTER_CNTL, (vc->datatype << RADEON_GMC_DST_DATATYPE_SHIFT
84 		Radeon_WaitForFifo ( ai , 4 );
92 		OUTREG(ai->regs, RADEON_DP_CNTL, ((xdir >= 0 ? RADEON_DST_X_LEFT_TO_RIGHT : 0)
96 		OUTREG( ai->regs, RADEON_SRC_Y_X, (list->src_top << 16 ) | list->src_left);
97 		OUTREG( ai->regs, RADEON_DST_Y_X, (list->dest_top << 16 ) | list->dest_left);
100 		OUTREG( ai->regs, RADEON_DST_HEIGHT_WIDTH, ((list->height + 1) << 16 ) | (list->width + 1));
104 	++ai->si->engine.count;
118 	virtual_card *vc = ai->vc;
148 	++ai->si->engine.count;
161 	virtual_card *vc = ai->vc;
165 	Radeon_WaitForFifo(ai, 3);
166     OUTREG(ai->regs, RADEON_DP_GUI_MASTER_CNTL, ((vc->datatype << RADEON_GMC_DST_DATATYPE_SHIFT)
171     OUTREG(ai->regs, RADEON_DP_BRUSH_FRGD_CLR,  colorIndex);
172     OUTREG(ai->regs, RADEON_DP_CNTL, (RADEON_DST_X_LEFT_TO_RIGHT | RADEON_DST_Y_TOP_TO_BOTTOM));
177 		Radeon_WaitForFifo(ai, 2);
178 		OUTREG(ai->regs, RADEON_DST_Y_X,          (list->top << 16) | list->left);
179 		OUTREG(ai->regs, RADEON_DST_WIDTH_HEIGHT, ((list->right - list->left + 1) << 16) | (list->bottom - list->top + 1));
182 	++ai->si->engine.count;
194 	virtual_card *vc = ai->vc;
238 	++ai->si->engine.count;
244 	virtual_card *vc = ai->vc;
248 	Radeon_WaitForFifo(ai, 3);
249     OUTREG(ai->regs, RADEON_DP_GUI_MASTER_CNTL, ((vc->datatype << RADEON_GMC_DST_DATATYPE_SHIFT)
255     OUTREG(ai->regs, RADEON_DP_CNTL, (RADEON_DST_X_LEFT_TO_RIGHT | RADEON_DST_Y_TOP_TO_BOTTOM));
260 		Radeon_WaitForFifo(ai, 2);
261 		OUTREG(ai->regs, RADEON_DST_Y_X,          (list->top << 16) | list->left);
262 		OUTREG(ai->regs, RADEON_DST_WIDTH_HEIGHT, ((list->right - list->left + 1) << 16) | (list->bottom - list->top + 1));
265 	++ai->si->engine.count;
277 	virtual_card *vc = ai->vc;
311 	++ai->si->engine.count;
323 	virtual_card *vc = ai->vc;
329 	Radeon_WaitForFifo( ai , 1);
330     OUTREG( ai->regs, RADEON_DP_GUI_MASTER_CNTL, 0
336 	if ( ai->si->asic >= rt_rv200 ) {
337 		Radeon_WaitForFifo( ai , 1);
338 		OUTREG( ai->regs, RADEON_DST_LINE_PATCOUNT, 0x55 << RADEON_BRES_CNTL_SHIFT);
341 	Radeon_WaitForFifo( ai , 1);
342 	OUTREG( ai->regs, RADEON_DP_BRUSH_FRGD_CLR,  colorIndex);
346 		Radeon_WaitForFifo( ai , 2);
352 	    OUTREG( ai->regs, RADEON_DST_LINE_START,           (y << 16) | x);
353     	OUTREG( ai->regs, RADEON_DST_LINE_END,             ((y) << 16) | (x + width));
357 	++ai->si->engine.count;
364 	if ( ai->si->acc_dma )
372 	if ( ai->si->acc_dma )
380 	if ( ai->si->acc_dma )
388 	if ( ai->si->acc_dma )
397 void Radeon_Init2D( accelerator_info *ai )
402 	if ( ai->si->acc_dma ) {
408 		OUTREG( ai->regs, RADEON_RB3D_CNTL, 0 );
413 void Radeon_FillStateBuffer( accelerator_info *ai, uint32 datatype )
415 	virtual_card *vc = ai->vc;
423 		((ai->si->memory[mt_local].virtual_addr_start + vc->fb_offset) >> 10) |
426 	if ( ai->si->acc_dma ) {
428 		Radeon_InvalidateStateBuffer( ai, vc->state_buffer_idx );
429 		buffer = buffer_start = Radeon_GetIndirectBufferPtr( ai, vc->state_buffer_idx );
462 		Radeon_WaitForFifo( ai, 10 );
463 		OUTREG( ai->regs, RADEON_DEFAULT_OFFSET, pitch_offset );
464 		OUTREG( ai->regs, RADEON_DST_PITCH_OFFSET, pitch_offset );
465 		OUTREG( ai->regs, RADEON_SRC_PITCH_OFFSET, pitch_offset );
467 		OUTREG( ai->regs, RADEON_DEFAULT_SC_BOTTOM_RIGHT, (RADEON_DEFAULT_SC_RIGHT_MAX
470 		OUTREG( ai->regs, RADEON_DP_GUI_MASTER_CNTL,
483 		OUTREG( ai->regs, RADEON_DP_BRUSH_FRGD_CLR, 0xffffffff);
484 		OUTREG( ai->regs, RADEON_DP_BRUSH_BKGD_CLR, 0x00000000);
485 		OUTREG( ai->regs, RADEON_DP_SRC_FRGD_CLR,   0xffffffff);
486 		OUTREG( ai->regs, RADEON_DP_SRC_BKGD_CLR,   0x00000000);
487 		OUTREG( ai->regs, RADEON_DP_WRITE_MASK,     0xffffffff);
491 	ai->si->active_vc = vc->id;
496 void Radeon_AllocateVirtualCardStateBuffer( accelerator_info *ai )
498 	virtual_card *vc = ai->vc;
500 	vc->state_buffer_idx = Radeon_AllocIndirectBuffer( ai, false );
507 void Radeon_FreeVirtualCardStateBuffer( accelerator_info *ai )
509 	virtual_card *vc = ai->vc;
512 	Radeon_InvalidateStateBuffer( ai, vc->state_buffer_idx );
515 	Radeon_FreeIndirectBuffer( ai, vc->state_buffer_idx, false );