Lines Matching refs:timing

101 		*ht_new = target.timing.h_total + h_total_mod + 2;
105 req_pclks_field = *ht_new * target.timing.v_total;
146 if (calc_pclks_field < ((*ht_new * (target.timing.v_total - 1)) + 2)) continue;
149 *ht_last_line = calc_pclks_field - (*ht_new * (target.timing.v_total - 1));
211 best[3] = target.timing.h_total;
212 best[4] = target.timing.h_total;
259 /* Notes about timing:
261 * all horizontal timing is measured in pixelclock periods;
262 * all? vertical timing is measured in field? lines. */
265 * <= G400MAX cards have a fixed 27Mhz(?) clock for TV timing register values,
618 /* colorburst is 'superimposed' on the above timing */
635 /* colorburst is 'superimposed' on the above timing */
653 /* used in G450/G550 to calculate TVout signal timing dependant on pixelclock;
728 if ((tv_target.timing.h_display < 704) && ((tv_target.flags & TV_BITS) == TV_PAL))
739 tv_target.timing.h_total = (tv_target.timing.h_display / uscan_fact);
741 tv_target.timing.h_total &= ~0x0007;
743 tv_target.timing.v_total = (tv_target.timing.v_display / uscan_fact);
748 diff = tv_target.timing.v_total - tv_target.timing.v_display;
749 tv_target.timing.v_sync_start = tv_target.timing.v_display + ((diff * 7) / 20);
752 tv_target.timing.v_sync_end = tv_target.timing.v_total;
756 diff = tv_target.timing.v_total - tv_target.timing.v_display;
757 tv_target.timing.v_sync_start = tv_target.timing.v_display + ((diff * 5) / 20);
760 tv_target.timing.v_sync_end = tv_target.timing.v_total;
766 (((tv_target.flags & TV_BITS) << (14 - 9)) | tv_target.timing.h_display);
776 tv_target.timing.h_total = 696;
786 tv_target.timing.h_total = 784;
792 tv_target.timing.h_total = 832;
796 tv_target.timing.h_total = 784;
807 tv_target.timing.v_total = m_timing.v_total;
811 diff = 576 - tv_target.timing.v_display;
815 tv_target.timing.v_display = 576;
819 tv_target.timing.v_sync_start = tv_target.timing.v_display + (diff / 2);
823 tv_target.timing.v_sync_end = tv_target.timing.v_total;
828 tv_target.timing.v_total = m_timing.v_total;
831 if (tweak) tv_target.timing.v_total += 32;
835 diff = 480 - tv_target.timing.v_display;
839 tv_target.timing.v_display = 480;
843 tv_target.timing.v_sync_start = tv_target.timing.v_display + (diff / 2);
846 if (tweak) tv_target.timing.v_sync_start += 9;
850 tv_target.timing.v_sync_end = tv_target.timing.v_total;
857 diff = tv_target.timing.h_total - tv_target.timing.h_display;
860 tv_target.timing.h_sync_start = tv_target.timing.h_display - 16 + (diff / 2);
862 tv_target.timing.h_sync_start &= ~0x0007;
863 tv_target.timing.h_sync_end = tv_target.timing.h_sync_start + 32;
867 tv_target.timing.h_sync_start = tv_target.timing.h_display - 0 + (diff / 2);
869 tv_target.timing.h_sync_start &= ~0x0007;
870 tv_target.timing.h_sync_end = tv_target.timing.h_sync_start + 16;
875 diff = tv_target.timing.h_total - tv_target.timing.h_display;
876 tv_target.timing.h_sync_start = tv_target.timing.h_display - 16 + (diff / 2);
879 if (tweak) tv_target.timing.h_sync_start -= 16;
881 tv_target.timing.h_sync_start &= ~0x0007;
882 tv_target.timing.h_sync_end = tv_target.timing.h_sync_start + 16;
887 if ((tv_target.timing.h_display >= 1000) && (((tv_target.flags & TV_BITS) != TV_PAL)))
916 (tv_target.timing.h_sync_end - tv_target.timing.h_sync_start)));
918 // slen = tv_target.timing.h_sync_end - tv_target.timing.h_sync_start;
919 // hcrt = tv_target.timing.h_total - slen - si->crtc_delay;
920 // if (ht_last_line < tv_target.timing.h_total) hcrt += ht_last_line;
921 // if (hcrt > tv_target.timing.h_total) hcrt -= tv_target.timing.h_total;
922 // if (hcrt + 2 > tv_target.timing.h_total) hcrt = 0; /* or issue warning? */
929 MAVWW(HSYNCLENL, (tv_target.timing.h_total - tv_target.timing.h_sync_end));
932 MAVWW(VTOTALL, (tv_target.timing.v_total - 1));
935 MAVWW(VVIDRSTL, (tv_target.timing.v_total - 2));
941 MAVWW(VSYNCLENL, (tv_target.timing.v_sync_end - tv_target.timing.v_sync_start - 1));
943 //MAVWW(VSYNCLENL, (tv_target.timing.v_total - tv_target.timing.v_sync_start - 1));
948 //MAVWW(VDISPLAYL, (tv_target.timing.v_total - 1));
966 h_scale_tv = (736 << 7) / tv_target.timing.h_total;//should be PLL corrected
988 (((tv_target.timing.h_total - tv_target.timing.h_sync_end) /* is left margin */
989 + tv_target.timing.h_display - 8)
1012 ib_min_length = ((tv_target.timing.h_total - tv_target.timing.h_sync_end) +
1013 tv_target.timing.h_display + 4);
1056 in_clocks = (tv_target.timing.v_total - 1) * (ht_new + 2) + ht_last_line + 2;
1073 ((tv_target.timing.v_sync_end - tv_target.timing.v_sync_start) /* is sync length */
1074 + (tv_target.timing.v_total - tv_target.timing.v_sync_end) /* is upper margin */
1075 + tv_target.timing.v_display)
1139 tv_target.timing.v_total = m_timing.v_total;
1143 diff = 576 - tv_target.timing.v_display;
1147 tv_target.timing.v_display = 576;
1151 tv_target.timing.v_sync_start = tv_target.timing.v_display + 1 + (diff / 2);
1152 tv_target.timing.v_sync_end = tv_target.timing.v_sync_start + 1;
1159 tv_target.timing.v_total = m_timing.v_total;
1163 diff = 480 - tv_target.timing.v_display;
1167 tv_target.timing.v_display = 480;
1171 tv_target.timing.v_sync_start = tv_target.timing.v_display + 1 + (diff / 2);
1172 tv_target.timing.v_sync_end = tv_target.timing.v_sync_start + 1;
1188 h_display = (((tv_target.timing.h_display << 1) + 3) & ~0x03);
1198 tv_target.timing.pixel_clock =
1203 tv_target.timing.h_display = ((h_display >> 1) & ~0x07);
1204 tv_target.timing.h_sync_start = tv_target.timing.h_display + 8;
1208 tv_target.timing.pixel_clock = (calc_pclk * 1000);
1216 pix_period = (1000000000 / ((float)tv_target.timing.pixel_clock)) + 0.5;
1224 * This is here so we can see the wanted and calc'd timing difference. */
1283 * h_total to adhere to the CRTC2 timing restrictions. */
1288 * 'trick' will decay TVout timing! (timing is nolonger official) */
1309 * because of the illegal h_total timing we create here.) */
1334 tv_target.timing.h_sync_end = (h_total & ~0x07) - 8;
1336 tv_target.timing.h_total = h_total;
1357 upper = (m_timing.v_total - tv_target.timing.v_sync_end) >> 1;
1406 /* setup CRTC timing */