matrox/engine/mga_info.c

17 	uint8 *pins;
36 	pins = rom + (rom[0x7FFC]|(rom[0x7FFD]<<8));
37 	if ((pins - rom) > 0x7F80)
43 	if ((pins[0] == 0x2E) && (pins[1] == 0x41))
45 		pins_len = pins[2];
55 			chksum += pins[i];
62 		LOG(2,("INFO: new PINS, version %u.%u, length %u\n", pins[5], pins[4], pins[2]));
64 		switch (pins[5])
67 				result = pins2_read(pins, pins_len);
70 				result = pins3_read(pins, pins_len);
73 				result = pins4_read(pins, pins_len);
76 				result = pins5_read(pins, pins_len);
85 	else if ((pins[0] == 0x40) && (pins[1] == 0x00))
92 		result = pins1_read(pins, pins_len);
112 status_t pins1_read(uint8 *pins, uint8 length)
151 	si->ps.max_dac1_clock_32 = pins[22];//ramdac
152 	si->ps.max_pixel_vco = (pins[25] << 8) | pins[24];//PCLK
153 	si->ps.std_engine_clock = (pins[29] << 8) | pins[28];
154 	if ((uint32)((pins[31] << 8) | pins[30]) < si->ps.std_engine_clock)
155 		si->ps.std_engine_clock = (pins[31] << 8) | pins[30];
156 	if ((uint32)((pins[33] << 8) | pins[32]) < si->ps.std_engine_clock)
157 		si->ps.std_engine_clock = (pins[33] << 8) | pins[32];
160 	si->ps.max_video_vco = (pins[27] << 8) | pins[26];//LCLK
162 	si->ps.option_reg = (pins[53] << 24) | (pins[52] << 16) | (pins[51] << 8) | pins [50];
164 	si->ps.max_dac2_clock = (pins[35] << 8) | pins[34];//clkmod
165 	si->ps.max_dac2_clock_8 = (pins[37] << 8) | pins[36];//testclk
166 	si->ps.max_dac2_clock_16 = (pins[39] << 8) | pins[38];//vgafreq1
167 	si->ps.max_dac2_clock_24 = (pins[41] << 8) | pins[40];//vgafreq2
168 	si->ps.max_dac2_clock_32 = (pins[55] << 8) | pins[54];//vga clock
169 	si->ps.max_dac2_clock_32dh = pins[58];//vid ctrl
171 	si->ps.max_dac1_clock = (pins[29] << 8) | pins[28];//clkbase
172 	si->ps.max_dac1_clock_8 = (pins[31] << 8) | pins[30];//4mb
173 	si->ps.max_dac1_clock_16 = (pins[33] << 8) | pins[32];//8mb
174 	si->ps.max_dac1_clock_24 = pins[23];//ramdac type
180 status_t pins2_read(uint8 *pins, uint8 length)
192 /* pins v3 is used by G100 and G200. */
193 status_t pins3_read(uint8 *pins, uint8 length)
206 	si->ps.max_pixel_vco = pins[36] + 100;
208 	si->ps.max_dac1_clock_8 = pins[37] + 100;
209 	si->ps.max_dac1_clock_16 = pins[38] + 100;
210 	si->ps.max_dac1_clock_24 = pins[39] + 100;
211 	si->ps.max_dac1_clock_32 = pins[40] + 100;
213 	si->ps.std_engine_clock = pins[44];
214 	if (pins [45] < si->ps.std_engine_clock) si->ps.std_engine_clock = pins[45];
215 	if (pins [46] < si->ps.std_engine_clock) si->ps.std_engine_clock = pins[46];
216 	if (pins [47] < si->ps.std_engine_clock) si->ps.std_engine_clock = pins[47];
217 	if ((si->ps.card_type == G200) && (pins[58] & 0x04))
224 		if (pins[52] & 0x01)
230 	if (pins[52] & 0x20) si->ps.f_ref = 14.31818;
234 	si->ps.memory_size = 2 << ((pins[55] & 0xc0) >> 6);
236 	si->ps.mctlwtst_reg = (pins[51] << 24) | (pins[50] << 16) | (pins[49] << 8) | pins [48];
238 		(pins[56] & 0x0f) | ((pins[56] & 0xf0) << 1) | ((pins[57] & 0x03) << 22) | ((pins[57] & 0xf0) << 21);
240 	((pins[p3_memrd+1]&0x03)>>2)<<16; //FIXME - ROR */
242 	si->ps.v3_clk_div = pins[52];
243 	si->ps.v3_mem_type = pins[54];
244 	si->ps.v3_option2_reg = pins[58];
247 	si->ps.tvout = !(pins[59] & 0x01);
256 	if (si->ps.card_type >= G400) si->ps.secondary_head = !(pins[59] & 0x01);
258 	/* setup via gathered info from pins */
262 	if ((si->ps.card_type == G200) && (pins[58] & 0x08))
269 		if (pins[52] & 0x02)
281 	/* the rest of the OPTION info for pins v3 comes via 'v3_clk_div' and 'v3_mem_type'. */
284 	si->ps.primary_dvi = !(pins[59] & 0x40);
317 /* pins v4 is used by G400 and G400MAX */
318 status_t pins4_read(uint8 *pins, uint8 length)
331 	if (pins[39] == 0xff) si->ps.max_pixel_vco = 230;
332 	else si->ps.max_pixel_vco = 4 * pins[39];
334 	if (pins[38] == 0xff) si->ps.max_system_vco = si->ps.max_pixel_vco;
335 	else si->ps.max_system_vco = 4 * pins[38];
337 	if (pins[40] == 0xff) si->ps.max_dac1_clock_8 = si->ps.max_pixel_vco;
338 	else si->ps.max_dac1_clock_8 = 4 * pins[40];
340 	if (pins[41] == 0xff) si->ps.max_dac1_clock_16 = si->ps.max_dac1_clock_8;
341 	else si->ps.max_dac1_clock_16 = 4 * pins[41];
343 	if (pins[42] == 0xff) si->ps.max_dac1_clock_24 = si->ps.max_dac1_clock_16;
344 	else si->ps.max_dac1_clock_24 = 4 * pins[42];
346 	if (pins[43] == 0xff) si->ps.max_dac1_clock_32 = si->ps.max_dac1_clock_24;
347 	else si->ps.max_dac1_clock_32 = 4 * pins[43];
349 	if (pins[44] == 0xff) si->ps.max_dac2_clock_16 = si->ps.max_pixel_vco;
350 	else si->ps.max_dac2_clock_16 = 4 * pins[44];
352 	if (pins[45] == 0xff) si->ps.max_dac2_clock_32 = si->ps.max_dac2_clock_16;
353 	else si->ps.max_dac2_clock_32 = 4 * pins[45];
356 	si->ps.std_engine_clock = 2 * pins[65];
358 	if (pins[92] & 0x01) si->ps.f_ref = 14.31818;
361 	si->ps.memory_size = 4 << ((pins[92] >> 2) & 0x03);
363 	si->ps.mctlwtst_reg = (pins[74] << 24) | (pins[73] << 16) | (pins[72] << 8) | pins [71];
364 	si->ps.option3_reg = (pins[70] << 24) | (pins[69] << 16) | (pins[68] << 8) | pins [67];
367 		(pins[86] & 0x0f) | ((pins[86] & 0xf0) << 1) | ((pins[87] & 0x03) << 22) | ((pins[87] & 0xf0) << 21);
368 	si->ps.sdram = (pins[92] & 0x10);
370 	/* setup via gathered info from pins */
371 	si->ps.option_reg = ((pins[53] & 0x38) << 7) | ((pins[53] & 0x40) << 22) | ((pins[53] & 0x80) << 15);
409 	si->ps.tvout = !(pins[91] & 0x01);
418 	if (si->ps.card_type >= G400) si->ps.secondary_head = !(pins[91] & 0x01);
421 	si->ps.primary_dvi = !(pins[91] & 0x40);
459 /* pins v5 is used by G450 and G550 */
460 status_t pins5_read(uint8 *pins, uint8 length)
471 	if (pins[4] == 0x01) m_factor = 8;
472 	if (pins[4] >= 0x02) m_factor = 10;
474 	si->ps.max_system_vco = m_factor * pins[36];
475 	si->ps.max_video_vco = m_factor * pins[37];
476 	si->ps.max_pixel_vco = m_factor * pins[38];
477 	si->ps.min_system_vco = m_factor * pins[121];
478 	si->ps.min_video_vco = m_factor * pins[122];
479 	si->ps.min_pixel_vco = m_factor * pins[123];
481 	if (pins[39] == 0xff) si->ps.max_dac1_clock_8 = si->ps.max_pixel_vco;
482 	else si->ps.max_dac1_clock_8 = 4 * pins[39];
484 	if (pins[40] == 0xff) si->ps.max_dac1_clock_16 = si->ps.max_dac1_clock_8;
485 	else si->ps.max_dac1_clock_16 = 4 * pins[40];
487 	if (pins[41] == 0xff) si->ps.max_dac1_clock_24 = si->ps.max_dac1_clock_16;
488 	else si->ps.max_dac1_clock_24 = 4 * pins[41];
490 	if (pins[42] == 0xff) si->ps.max_dac1_clock_32 = si->ps.max_dac1_clock_24;
491 	else si->ps.max_dac1_clock_32 = 4 * pins[42];
493 	if (pins[124] == 0xff) si->ps.max_dac1_clock_32dh = si->ps.max_dac1_clock_32;
494 	else si->ps.max_dac1_clock_32dh = 4 * pins[124];
496 	if (pins[43] == 0xff) si->ps.max_dac2_clock_16 = si->ps.max_video_vco;
497 	else si->ps.max_dac2_clock_16 = 4 * pins[43];
499 	if (pins[44] == 0xff) si->ps.max_dac2_clock_32 = si->ps.max_dac2_clock_16;
500 	else si->ps.max_dac2_clock_32 = 4 * pins[44];
502 	if (pins[125] == 0xff) si->ps.max_dac2_clock_32dh = si->ps.max_dac2_clock_32;
503 	else si->ps.max_dac2_clock_32dh = 4 * pins[125];
505 	if (pins[118] == 0xff) si->ps.max_dac1_clock = si->ps.max_dac1_clock_8;
506 	else si->ps.max_dac1_clock = 4 * pins[118];
508 	if (pins[119] == 0xff) si->ps.max_dac2_clock = si->ps.max_dac1_clock;
509 	else si->ps.max_dac2_clock = 4 * pins[119];
511 	si->ps.std_engine_clock = 4 * pins[74];
512 	si->ps.std_engine_clock_dh = 4 * pins[92];
514 	si->ps.memory_size = ((pins[114] & 0x03) + 1) * 8;
515 	if ((pins[114] & 0x07) > 3)
521 	if (pins[110] & 0x01) si->ps.f_ref = 14.31818;
525 	if ((pins[114] & 0x18) == 0x08) si->ps.sdram = false;
528 	si->ps.v5_mem_type = (pins[115] << 8) | pins [114];
531 	si->ps.option_reg = (pins[51] << 24) | (pins[50] << 16) | (pins[49] << 8) | pins [48];
532 	si->ps.option2_reg = (pins[55] << 24) | (pins[54] << 16) | (pins[53] << 8) | pins [52];
533 	si->ps.option3_reg = (pins[79] << 24) | (pins[78] << 16) | (pins[77] << 8) | pins [76];
534 	si->ps.option4_reg = (pins[87] << 24) | (pins[86] << 16) | (pins[85] << 8) | pins [84];
535 	si->ps.mctlwtst_reg = (pins[83] << 24) | (pins[82] << 16) | (pins[81] << 8) | pins [80];
536 	si->ps.memrdbk_reg = (pins[91] << 24) | (pins[90] << 16) | (pins[89] << 8) | pins [88];
539 	si->ps.secondary_head = (pins[117] & 0x70);
540 	si->ps.tvout = (pins[117] & 0x40);
542 	si->ps.primary_dvi = (pins[117] & 0x02);
543 	si->ps.secondary_dvi = (pins[117] & 0x20);
817 /* this routine is currently unused, because G400MAX is detected via pins! */
864 	/* see G450 pins readouts for max ranges, then use a bit smaller ones */
879 	/* see G450 pins readouts */
905 	/* see G550 pins readouts for max ranges, then use a bit smaller ones */
920 	/* see G550 pins readouts */