Lines Matching defs:target
13 status_t g400_crtc2_set_timing(display_mode target)
19 if ((!(target.flags & TV_BITS)) || (si->ps.card_type <= G400MAX))
24 if ((target.timing.h_display & 0x07) | (target.timing.h_sync_start & 0x07) |
25 (target.timing.h_sync_end & 0x07) | (target.timing.h_total & 0x07))
38 CR2W(HPARAM, ((((target.timing.h_display - 8) & 0x0fff) << 16) |
39 ((target.timing.h_total - 8) & 0x0fff)));
40 CR2W(HSYNC, ((((target.timing.h_sync_end - 8) & 0x0fff) << 16) |
41 ((target.timing.h_sync_start - 8) & 0x0fff)));
42 CR2W(VPARAM, ((((target.timing.v_display - 1) & 0x0fff) << 16) |
43 ((target.timing.v_total - 1) & 0x0fff)));
44 CR2W(VSYNC, ((((target.timing.v_sync_end - 1) & 0x0fff) << 16) |
45 ((target.timing.v_sync_start - 1) & 0x0fff)));
47 //CR2W(PRELOAD, (((target.timing.v_sync_start & 0x0fff) << 16) |
48 // (target.timing.h_sync_start & 0x0fff)));
49 CR2W(PRELOAD, ((((target.timing.v_sync_start - 1) & 0x0fff) << 16) |
50 ((target.timing.h_sync_start - 8) & 0x0fff)));
53 if (!(target.timing.flags & B_POSITIVE_HSYNC)) temp |= (0x01 << 8);
54 if (!(target.timing.flags & B_POSITIVE_VSYNC)) temp |= (0x01 << 9);
59 if ((si->ps.secondary_head) && (!(target.flags & TV_BITS)))
60 gx00_maven_set_timing(target);
65 display_mode tv_mode = target;