accelerants/matrox/SetDisplayMode.c

50 	 * We don't use bounds here by making sure bounds and target are the same struct!
52 	display_mode /*bounds,*/ target;
59 	target /*= bounds*/ = *mode_to_set;
61 	LOG(1, ("SETMODE: (ENTER) initial modeflags: $%08x\n", target.flags));
62 	LOG(1, ("SETMODE: requested target pixelclock %dkHz\n",  target.timing.pixel_clock));
64 										target.virtual_width, target.virtual_height));
67 	if (PROPOSE_DISPLAY_MODE(&target, &target, &target) == B_ERROR)	return B_ERROR;
92 	gx00_general_validate_pic_size (&target, &si->fbc.bytes_per_row, &si->acc_mode);
95 	if (target.flags & DUALHEAD_BITS) /*if some dualhead mode*/
100 		display_mode target2 = target;
105 		LOG(8,("SETMODE: target clock %dkHz\n",target.timing.pixel_clock));
106 		if (gx00_dac_set_pix_pll(target) == B_ERROR)
118 		switch(target.space)
158 		startadd_right=startadd+(target.timing.h_display * (colour_depth1 >> 3));
174 			switch (target.flags & DUALHEAD_BITS)
203 					target.timing.v_display++;
215 				switch (target.flags & DUALHEAD_BITS)
246 				switch (target.flags & DUALHEAD_BITS)
294 		switch (target.flags & DUALHEAD_BITS)
308 		gx00_crtc_set_timing(target);
320 		switch(target.space)
339 			LOG(8,("SETMODE: Invalid singlehead colour depth 0x%08x\n", target.space));
346 			status = gx00_dac_set_pix_pll(target);
349 			status = mil2_dac_set_pix_pll((target.timing.pixel_clock)/1000.0, colour_depth1);
374 			if (!si->ps.secondary_head && si->ps.tvout && (target.flags & TV_BITS))
389 		if (!si->ps.secondary_head && si->ps.tvout && (target.flags & TV_BITS))
395 			maventv_init(target);
400 			gx00_crtc_set_timing(target);
405 	si->dm = target;
418 	if ((target.flags & DUALHEAD_BITS) && (si->ps.card_type <= G400MAX))