accelerants/intel_extreme/FlexibleDisplayInterface.cpp

251 	uint32 txControl = FDI_TX_CTL(fPipeIndex);
285 	*lanes = ((read32(txControl) & FDI_DP_PORT_WIDTH_MASK) >> FDI_DP_PORT_WIDTH_SHIFT) + 1;
294 	TRACE("%s: FDI TX ctrl before: 0x%" B_PRIx32 "\n", __func__, read32(txControl));
301 	write32(txControl, read32(txControl) & ~FDI_TX_ENABLE);
302 	read32(txControl);
306 	write32(txControl, (read32(txControl) & ~FDI_LINK_TRAIN_NONE) | FDI_LINK_TRAIN_PATTERN_1);
307 	read32(txControl);
333 	uint32 txControl = FDI_TX_CTL(fPipeIndex);
359 	TRACE("%s: FDI TX ctrl after: 0x%" B_PRIx32 "\n", __func__, read32(txControl));
373 	uint32 txControl = FDI_TX_CTL(fPipeIndex);
377 	uint32 tmp = read32(txControl);
385 	write32(txControl, tmp);
416 	uint32 txControl = FDI_TX_CTL(fPipeIndex);
427 	tmp = read32(txControl);
432 	write32(txControl, tmp);
473 	tmp = read32(txControl);
476 	write32(txControl, tmp);
510 	uint32 txControl = FDI_TX_CTL(fPipeIndex);
522 	tmp = read32(txControl);
530 	write32(txControl, tmp);
551 		tmp = read32(txControl);
554 		write32(txControl, tmp);
556 		read32(txControl);
580 	tmp = read32(txControl);
587 	write32(txControl, tmp);
603 		tmp = read32(txControl);
606 		write32(txControl, tmp);
608 		read32(txControl);
640 	//uint32 txControl = Transmitter().Base() + PCH_FDI_TX_CONTROL;
653 	uint32 txControl = FDI_TX_CTL(fPipeIndex);
656 	uint32 buffer = read32(txControl);
667 	write32(txControl, buffer);
676 			buffer = read32(txControl);
680 			write32(txControl, buffer | FDI_TX_ENABLE);
681 			read32(txControl);
687 			buffer = read32(txControl);
694 			write32(txControl, read32(txControl) & ~FDI_TX_ENABLE);
695 			read32(txControl);
718 		write32(txControl, read32(txControl) | (0x3 << 8));
719 		read32(txControl);