accelerants/intel_extreme/FlexibleDisplayInterface.cpp

377 	uint32 tmp = read32(txControl);
379 		tmp &= ~FDI_LINK_TRAIN_NONE_IVB;
380 		tmp |= FDI_LINK_TRAIN_NONE_IVB | FDI_TX_ENHANCE_FRAME_ENABLE;
382 		tmp &= ~FDI_LINK_TRAIN_NONE;
383 		tmp |= FDI_LINK_TRAIN_NONE | FDI_TX_ENHANCE_FRAME_ENABLE;
385 	write32(txControl, tmp);
387 	tmp = read32(rxControl);
389 		tmp &= ~FDI_LINK_TRAIN_PATTERN_MASK_CPT;
390 		tmp |= FDI_LINK_TRAIN_NORMAL_CPT;
392 		tmp &= ~FDI_LINK_TRAIN_NONE;
393 		tmp |= FDI_LINK_TRAIN_NONE;
395 	write32(rxControl, tmp | FDI_RX_ENHANCE_FRAME_ENABLE);
420 	uint32 tmp = read32(FDI_RX_IMR(fPipeIndex));
421 	tmp &= ~FDI_RX_SYMBOL_LOCK;
422 	tmp &= ~FDI_RX_BIT_LOCK;
423 	write32(FDI_RX_IMR(fPipeIndex), tmp);
427 	tmp = read32(txControl);
428 	tmp &= ~FDI_DP_PORT_WIDTH_MASK;
429 	tmp |= FDI_DP_PORT_WIDTH(lanes);
430 	tmp &= ~FDI_LINK_TRAIN_NONE;
431 	tmp |= FDI_LINK_TRAIN_PATTERN_1;
432 	write32(txControl, tmp);
435 	tmp = read32(rxControl);
436 	tmp &= ~FDI_LINK_TRAIN_NONE;
437 	tmp |= FDI_LINK_TRAIN_PATTERN_1;
438 	write32(rxControl, tmp);
457 		tmp = read32(iirControl);
458 		TRACE("%s: FDI RX IIR 0x%" B_PRIx32 "\n", __func__, tmp);
460 		if ((tmp & FDI_RX_BIT_LOCK)) {
462 			write32(iirControl, tmp | FDI_RX_BIT_LOCK);
473 	tmp = read32(txControl);
474 	tmp &= ~FDI_LINK_TRAIN_NONE;
475 	tmp |= FDI_LINK_TRAIN_PATTERN_2;
476 	write32(txControl, tmp);
478 	tmp = read32(rxControl);
479 	tmp &= ~FDI_LINK_TRAIN_NONE;
480 	tmp |= FDI_LINK_TRAIN_PATTERN_2;
481 	write32(rxControl, tmp);
487 		tmp = read32(iirControl);
488 		TRACE("%s: FDI RX IIR 0x%" B_PRIx32 "\n", __func__, tmp);
490 		if (tmp & FDI_RX_SYMBOL_LOCK) {
492 			write32(iirControl, tmp | FDI_RX_SYMBOL_LOCK);
515 	uint32 tmp = read32(imrControl);
516 	tmp &= ~FDI_RX_SYMBOL_LOCK;
517 	tmp &= ~FDI_RX_BIT_LOCK;
518 	write32(imrControl, tmp);
522 	tmp = read32(txControl);
523 	tmp &= ~FDI_DP_PORT_WIDTH_MASK;
524 	tmp |= FDI_DP_PORT_WIDTH(lanes);
525 	tmp &= ~FDI_LINK_TRAIN_NONE;
526 	tmp |= FDI_LINK_TRAIN_PATTERN_1;
527 	tmp &= ~FDI_LINK_TRAIN_VOL_EMP_MASK;
529 	tmp |= FDI_LINK_TRAIN_400MV_0DB_SNB_B;
530 	write32(txControl, tmp);
535 	tmp = read32(rxControl);
537 		tmp &= ~FDI_LINK_TRAIN_PATTERN_MASK_CPT;
538 		tmp |= FDI_LINK_TRAIN_PATTERN_1_CPT;
540 		tmp &= ~FDI_LINK_TRAIN_NONE;
541 		tmp |= FDI_LINK_TRAIN_PATTERN_1;
543 	write32(rxControl, tmp);
551 		tmp = read32(txControl);
552 		tmp &= ~FDI_LINK_TRAIN_VOL_EMP_MASK;
553 		tmp |= gSnbBFDITrainParam[i];
554 		write32(txControl, tmp);
561 			tmp = read32(iirControl);
562 			TRACE("%s: FDI RX IIR 0x%" B_PRIx32 "\n", __func__, tmp);
563 			if (tmp & FDI_RX_BIT_LOCK) {
565 				write32(iirControl, tmp | FDI_RX_BIT_LOCK);
580 	tmp = read32(txControl);
581 	tmp &= ~FDI_LINK_TRAIN_NONE;
582 	tmp |= FDI_LINK_TRAIN_PATTERN_2;
585 	tmp &= ~FDI_LINK_TRAIN_VOL_EMP_MASK;
586 	tmp |= FDI_LINK_TRAIN_400MV_0DB_SNB_B;
587 	write32(txControl, tmp);
589 	tmp = read32(rxControl);
591 		tmp &= ~FDI_LINK_TRAIN_PATTERN_MASK_CPT;
592 		tmp |= FDI_LINK_TRAIN_PATTERN_2_CPT;
594 		tmp &= ~FDI_LINK_TRAIN_NONE;
595 		tmp |= FDI_LINK_TRAIN_PATTERN_2;
597 	write32(rxControl, tmp);
603 		tmp = read32(txControl);
604 		tmp &= ~FDI_LINK_TRAIN_VOL_EMP_MASK;
605 		tmp |= gSnbBFDITrainParam[i];
606 		write32(txControl, tmp);
613 			tmp = read32(iirControl);
614 			TRACE("%s: FDI RX IIR 0x%" B_PRIx32 "\n", __func__, tmp);
616 			if (tmp & FDI_RX_SYMBOL_LOCK) {
618 				write32(iirControl, tmp | FDI_RX_SYMBOL_LOCK);