arch/x86/ioapic.cpp

191 ioapic_configure_pin(struct ioapic& ioapic, uint8 pin, uint8 vector,
194 	uint64 entry = ioapic_read_64(ioapic, IO_APIC_REDIRECTION_TABLE + pin * 2);
200 		ioapic.level_triggered_mask |= ((uint64)1 << pin);
203 		ioapic.level_triggered_mask &= ~((uint64)1 << pin);
213 	ioapic_write_64(ioapic, IO_APIC_REDIRECTION_TABLE + pin * 2, entry, true);
232 	uint8 pin = gsi - ioapic->global_interrupt_base;
233 	return (ioapic->level_triggered_mask & ((uint64)1 << pin)) != 0;
258 	uint8 pin = gsi - ioapic->global_interrupt_base;
259 	TRACE(("ioapic_enable_io_interrupt: gsi %ld -> io-apic %u pin %u\n",
260 		gsi, ioapic->number, pin));
262 	uint64 entry = ioapic_read_64(*ioapic, IO_APIC_REDIRECTION_TABLE + pin * 2);
264 	ioapic_write_64(*ioapic, IO_APIC_REDIRECTION_TABLE + pin * 2, entry, false);
275 	uint8 pin = gsi - ioapic->global_interrupt_base;
276 	TRACE(("ioapic_disable_io_interrupt: gsi %ld -> io-apic %u pin %u\n",
277 		gsi, ioapic->number, pin));
279 	uint64 entry = ioapic_read_64(*ioapic, IO_APIC_REDIRECTION_TABLE + pin * 2);
281 	ioapic_write_64(*ioapic, IO_APIC_REDIRECTION_TABLE + pin * 2, entry, true);
292 	uint8 pin = gsi - ioapic->global_interrupt_base;
293 	TRACE(("ioapic_configure_io_interrupt: gsi %ld -> io-apic %u pin %u; "
294 		"config 0x%08lx\n", gsi, ioapic->number, pin, config));
296 	ioapic_configure_pin(*ioapic, pin, gsi, config,
461 				uint8 pin = info->GlobalIrq - ioapic->global_interrupt_base;
462 				ioapic->nmi_mask |= (uint64)1 << pin;
558 				uint8 pin = info->GlobalIrq - ioapic->global_interrupt_base;
560 				ioapic_configure_pin(*ioapic, pin, info->GlobalIrq, config,
638 	uint8 pin = gsi - ioapic->global_interrupt_base;
639 	return (ioapic->nmi_mask & ((uint64)1 << pin)) == 0;