Lines Matching defs:pci_read_config
104 uint8 irq = pci_read_config(dev, PCI_interrupt_line, 1);
119 uint32 addr = pci_read_config(dev, regid, 4) & PCI_address_memory_32_mask;
138 res->r_bushandle = pci_read_config(dev, regid, 4) & PCI_address_io_mask;
552 pci_read_config(device_t dev, int offset, int size)
558 TRACE_PCI(dev, "pci_read_config(%i, %i) = 0x%x\n", offset, size, value);
578 return pci_read_config(dev, PCI_vendor_id, 2);
585 return pci_read_config(dev, PCI_device_id, 2);
592 return pci_read_config(dev, PCI_subsystem_vendor_id, 2);
599 return pci_read_config(dev, PCI_subsystem_id, 2);
606 return pci_read_config(dev, PCI_revision, 1);
619 return pci_read_config(dev, PCI_device_id, 2) << 16 |
620 pci_read_config(dev, PCI_vendor_id, 2);
626 return pci_read_config(dev, PCI_line_size, 1);
676 uint16_t command = pci_read_config(dev, PCI_command, 2);
707 if (pci_read_config(dev, PCI_command, 2) & bit)
730 status = pci_read_config(child, PCIR_STATUS, 2);
734 headerType = pci_read_config(child, PCI_header_type, 1);
746 capabilityPointer = pci_read_config(child, capabilityPointer, 1);
749 if (pci_read_config(child, capabilityPointer + PCICAP_ID, 1)
755 capabilityPointer = pci_read_config(child,
830 val = pci_read_config(dev, cap + PCIR_EXPRESS_DEVICE_CTL, 2);
850 val = pci_read_config(dev, cap + PCIR_EXPRESS_DEVICE_CTL, 2);
868 status = pci_read_config(dev, capabilityRegister + PCIR_POWER_STATUS, 2);
917 currentPowerManagementStatus = pci_read_config(dev, capabilityRegister
920 powerManagementCapabilities = pci_read_config(dev, capabilityRegister