Lines Matching refs:registers

121 	write32(info->registers + SiS900_MAC_COMMAND, SiS900_MAC_CMD_Rx_ENABLE);
148 // read32(info->registers + SiS900_MAC_Tx_DESCR));
152 uint32 descriptor = read32(info->registers + SiS900_MAC_Tx_DESCR);
211 intr = read32(info->registers + SiS900_MAC_INTR_STATUS);
222 read32(info->registers + SiS900_MAC_WAKEUP_EVENT)));
225 write32(info->registers + SiS900_MAC_WAKEUP_EVENT,
251 write32(info->registers + SiS900_MAC_INTR_MASK, 0);
252 write32(info->registers + SiS900_MAC_INTR_ENABLE, 0);
259 write32(info->registers + SiS900_MAC_INTR_ENABLE, 0);
262 write32(info->registers + SiS900_MAC_WAKEUP_CONTROL,
266 write32(info->registers + SiS900_MAC_INTR_MASK,
272 write32(info->registers + SiS900_MAC_INTR_ENABLE,1);
403 // SiS 630E has some bugs on default value of PHY registers
436 uint32 address = info->registers + SiS900_MAC_CONFIG;
466 write32(info->registers + SiS900_MAC_Tx_CONFIG, txFlags);
467 write32(info->registers + SiS900_MAC_Rx_CONFIG, rxFlags);
547 uint32 address = info->registers + SiS900_MAC_CONFIG;
586 addr_t eepromAccess = info->registers + SiS900_MAC_EEPROM_ACCESS;
622 addr_t registers = isa.u.h0.base_registers[0];
628 write8(registers + 0x70,0x09 + i);
629 info->address.ebyte[i] = read8(registers + 0x71);
667 addr_t address = info->registers + SiS900_MAC_COMMAND;
674 write32(info->registers + SiS900_MAC_Rx_FILTER_CONTROL, SiS900_RxF_ENABLE |
681 write32(info->registers + SiS900_MAC_COMMAND, SiS900_MAC_CMD_Tx_ENABLE);
690 addr_t filterControl = info->registers + SiS900_MAC_Rx_FILTER_CONTROL;
705 addr_t filterControl = info->registers + SiS900_MAC_Rx_FILTER_CONTROL;
706 addr_t filterData = info->registers + SiS900_MAC_Rx_FILTER_DATA;
778 // set descriptor pointer registers
779 write32(info->registers + SiS900_MAC_Tx_DESCR,
781 write32(info->registers + SiS900_MAC_Rx_DESCR,