Lines Matching defs:bit
1488 * Starting with the 82571 chip, bit 31 should be used to
1937 * now gets a DONE bit writeback.
2329 /* Check if we must disable SPEED_MODE bit on PCI-E */
2579 ** Set the bit to enable interrupt
2613 ** Set the bit to enable interrupt
2856 * drained a bit. Here we use an arbitary value of 1500 which will
4644 /* Ignore Checksum bit is set */
4680 u32 index, bit;
4690 bit = vtag & 0x1F;
4691 adapter->shadow_vfta[index] |= (1 << bit);
4707 u32 index, bit;
4717 bit = vtag & 0x1F;
4718 adapter->shadow_vfta[index] &= ~(1 << bit);
4832 * em_get_hw_control sets the {CTRL_EXT|FWSM}:DRV_LOAD bit.
4856 * em_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
5108 printf("Could not set PHY Host Wakeup bit\n");
5157 link_ctrl &= 0xFFFC; /* turn off bit 1 and 2 */
5208 /* For the 64-bit byte counters the low dword must be read first. */
5277 /* Export a single 32-bit register via a read-only sysctl. */
5606 * first 32 16-bit words of the EEPROM to
5621 /* Its a bit crude, but it gets the job done */