dev/e1000/e1000_82575.c

915  *  Set the EEPROM access request bit and wait for EEPROM access grant bit.
916  *  Return successful if access grant bit set, else clear the request for
940 			DEBUGOUT("Nvm bit banging access error detected and cleared.\n");
949 			DEBUGOUT("Nvm bit banging access error detected and cleared.\n");
966  *  Stop any current commands to the EEPROM and clear the EEPROM request bit,
1055  *  e1000_get_cfg_done_82575 - Read config done bit
1058  *  Read the management control register for the config done bit for
1060  *  to read the config done bit, so an error is *ONLY* logged and returns
1207 	 * The link up bit determines when link is up on autoneg.
1689 		DEBUGOUT("Link mode mask doesn't fit bit field size\n");
2328 	/* BH SW mailbox bit in SW_FW_SYNC */
2388 	/* clear global device reset status bit */
2525 		/* if chekcsums compatibility bit is set validate checksums
2560 		DEBUGOUT("NVM Read Error while updating checksum compatibility bit.\n");
2565 		/* set compatibility bit to validate checksums appropriately */
2570 			DEBUGOUT("NVM Write Error while updating checksum compatibility bit.\n");
2731  *  e1000_set_i2c_bb - Enable I2C bit-bang
2734  *  Enable I2C bit-bang interface
2760  *  e1000_read_i2c_byte_generic - Reads 8 bit word over I2C
2851  *  e1000_write_i2c_byte_generic - Writes 8 bit word over I2C
2989 	bool bit = 0;
2995 		e1000_clock_in_i2c_bit(hw, &bit);
2996 		*data |= bit << i;
3014 	bool bit = 0;
3019 		bit = (data >> i) & 0x1;
3020 		status = e1000_clock_out_i2c_bit(hw, bit);
3040  *  Clocks in/out one bit via I2C data/clock
3082  *  e1000_clock_in_i2c_bit - Clocks in one bit via I2C data/clock
3086  *  Clocks in one bit via I2C data/clock
3111  *  e1000_clock_out_i2c_bit - Clocks in/out one bit via I2C data/clock
3115  *  Clocks out one bit via I2C data/clock
3186  *  e1000_set_i2c_data - Sets the I2C data bit
3191  *  Sets the I2C data bit
3222  *  e1000_get_i2c_data - Reads the I2C SDA data bit
3226  *  Returns the I2C data bit value