Lines Matching refs:di
36 status_t Radeon_MapDevice( device_info *di, bool mmio_only )
43 shared_info *si = di->si;
45 pci_info *pcii = &(di->pcii);
49 di->pcii.bus, di->pcii.device, di->pcii.function );
64 di->pcii.u.h0.base_registers[regs],
65 di->pcii.u.h0.base_registers[regs] + di->pcii.u.h0.base_register_sizes[regs] - 1 );
68 di->pcii.vendor_id, di->pcii.device_id,
69 di->pcii.bus, di->pcii.device, di->pcii.function );
73 di->pcii.u.h0.base_registers[regs],
74 di->pcii.u.h0.base_register_sizes[regs],
83 (void **)&(di->regs));
94 di->pcii.vendor_id, di->pcii.device_id,
95 di->pcii.bus, di->pcii.device, di->pcii.function );
99 di->rom.phys_address,
100 di->rom.size,
103 (void **)&(di->rom.rom_ptr));
109 if( di->pcii.u.h0.base_register_sizes[fb] > di->local_mem_size ) {
113 di->pcii.u.h0.base_register_sizes[fb],
114 di->local_mem_size
116 di->pcii.u.h0.base_register_sizes[fb] = di->local_mem_size;
125 di->pcii.u.h0.base_registers[fb],
126 di->pcii.u.h0.base_registers[fb] + di->pcii.u.h0.base_register_sizes[fb] - 1 );
129 di->pcii.vendor_id, di->pcii.device_id,
130 di->pcii.bus, di->pcii.device, di->pcii.function);
134 di->pcii.u.h0.base_registers[fb],
135 di->pcii.u.h0.base_register_sizes[fb],
144 di->pcii.u.h0.base_registers[fb],
145 di->pcii.u.h0.base_register_sizes[fb],
160 si->framebuffer_pci = (void *) di->pcii.u.h0.base_registers_pci[fb];
173 void Radeon_UnmapDevice(device_info *di)
175 shared_info *si = di->si;
176 pci_info *pcii = &(di->pcii);
201 status_t Radeon_FirstOpen( device_info *di )
211 di->pcii.vendor_id, di->pcii.device_id,
212 di->pcii.bus, di->pcii.device, di->pcii.function );
214 di->shared_area = create_area(
216 (void **)&(di->si),
226 if (di->shared_area < 0) {
227 result = di->shared_area;
231 memset( di->si, 0, sizeof( *di->si ));
233 si = di->si;
235 si->settings = di->settings = current_settings;
237 if (di->settings.force_acc_dma)
238 di->acc_dma = true;
239 if (di->settings.force_acc_mmio) // force mmio will override dma... a tristate fuzzylogic, grey bool would be nice...
240 di->acc_dma = false;
249 si->vendor_id = di->pcii.vendor_id;
250 si->device_id = di->pcii.device_id;
251 si->revision = di->pcii.revision;
253 si->asic = di->asic;
254 si->is_mobility = di->is_mobility;
255 si->tv_chip = di->tv_chip;
256 si->new_pll = di->new_pll;
257 si->is_igp = di->is_igp;
258 si->has_no_i2c = di->has_no_i2c;
259 si->is_atombios = di->is_atombios;
260 si->is_mobility = di->is_mobility;
261 si->panel_pwr_delay = di->si->panel_pwr_delay;
262 si->acc_dma = di->acc_dma;
264 memcpy(&si->routing, &di->routing, sizeof(disp_entity));
274 si->num_crtc = di->num_crtc;
276 if (di->is_mobility)
277 si->flatpanels[0] = di->fp_info;
279 si->pll = di->pll;
284 di->pcii.vendor_id, di->pcii.device_id,
285 di->pcii.bus, di->pcii.device, di->pcii.function );
286 di->virtual_card_area = create_area(
288 (void **)&(di->vc),
298 if (di->virtual_card_area < 0) {
299 result = di->virtual_card_area;
304 di->vc->assigned_crtc[0] = true;
305 di->vc->assigned_crtc[1] = si->num_crtc > 1;
306 di->vc->controlled_displays =
309 di->vc->fb_mem_handle = 0;
310 di->vc->cursor.mem_handle = 0;
313 di->vc->id = di->virtual_card_area;
315 result = Radeon_MapDevice( di, false );
322 if( di->asic == rt_rv100 && di->is_mobility)
323 di->dac2_cntl = INREG( di->regs, RADEON_DAC_CNTL2 );
325 memcpy(&si->tmds_pll, &di->tmds_pll, sizeof(di->tmds_pll));
326 si->tmds_pll_cntl = INREG( di->regs, RADEON_TMDS_PLL_CNTL);
327 si->tmds_transmitter_cntl = INREG( di->regs, RADEON_TMDS_TRANSMITTER_CNTL);
330 // if ( di->is_mobility ) {
332 SHOW_INFO( 2, "LVDS GEN = %8lx", INREG( di->regs, RADEON_LVDS_GEN_CNTL ));
333 SHOW_INFO( 2, "LVDS PLL = %8lx", INREG( di->regs, RADEON_LVDS_PLL_CNTL ));
334 SHOW_INFO( 2, "TMDS PLL = %8lx", INREG( di->regs, RADEON_TMDS_PLL_CNTL ));
335 SHOW_INFO( 2, "TMDS TRANS = %8lx", INREG( di->regs, RADEON_TMDS_TRANSMITTER_CNTL ));
336 SHOW_INFO( 2, "FP1 GEN = %8lx", INREG( di->regs, RADEON_FP_GEN_CNTL ));
337 SHOW_INFO( 2, "FP2 GEN = %8lx", INREG( di->regs, RADEON_FP2_GEN_CNTL ));
338 SHOW_INFO( 2, "TV DAC = %8lx", INREG( di->regs, RADEON_TV_DAC_CNTL )); //not setup right when ext dvi
341 result = Radeon_InitPCIGART( di );
345 si->memory[mt_local].size = di->local_mem_size;
347 si->memory[mt_PCI].area = di->pci_gart.buffer.area;
348 si->memory[mt_PCI].size = di->pci_gart.buffer.size;
353 Radeon_InitMemController( di );
357 result = Radeon_SetupIRQ( di, buffer );
364 di->memmgr[mt_local] = mem_init("radeon local memory", 0, di->local_mem_size, 1024,
365 di->local_mem_size / 1024);
366 if (di->memmgr[mt_local] == NULL) {
372 di->memmgr[mt_PCI] = mem_init("radeon PCI GART memory", 0, di->pci_gart.buffer.size, 4096,
373 di->pci_gart.buffer.size / 4096);
374 if (di->memmgr[mt_PCI] == NULL) {
380 di->memmgr[mt_AGP] = NULL;
383 Radeon_Set_AGP( di, !di->settings.force_pci ); // disable AGP
387 result = Radeon_InitCP( di );
391 if ( di->acc_dma )
393 result = Radeon_InitDMA( di );
402 // mem_alloc( di->local_memmgr, 0x100000, (void *)-1, &dma_block, &dma_offset );
409 if (di->is_mobility && di->settings.dynamic_clocks)
410 Radeon_SetDynamicClock( di, 1);
415 Radeon_UninitCP( di );
417 mem_destroy( di->memmgr[mt_PCI] );
419 mem_destroy( di->memmgr[mt_local] );
421 Radeon_CleanupIRQ( di );
423 Radeon_CleanupPCIGART( di );
425 Radeon_UnmapDevice( di );
427 delete_area( di->virtual_card_area );
429 delete_area( di->shared_area );
438 void Radeon_LastClose( device_info *di )
440 if ( di->acc_dma )
441 Radeon_UninitCP( di );
445 if( di->asic == rt_rv100 && di->is_mobility)
446 OUTREG( di->regs, RADEON_DAC_CNTL2, di->dac2_cntl );
449 mem_destroy( di->memmgr[mt_local] );
451 if( di->memmgr[mt_PCI] )
452 mem_destroy( di->memmgr[mt_PCI] );
454 if( di->memmgr[mt_AGP] )
455 mem_destroy( di->memmgr[mt_AGP] );
457 Radeon_CleanupIRQ( di );
458 Radeon_CleanupPCIGART( di );
459 Radeon_UnmapDevice(di);
463 log_exit( di->si->log );
467 delete_area( di->virtual_card_area );
468 delete_area( di->shared_area );