accelerants/radeon_hd/pll.cpp

542 		union adjustPixelClock args;
543 		memset(&args, 0, sizeof(args));
550 						args.v1.usPixelClock
552 						args.v1.ucTransmitterID = encoderID;
553 						args.v1.ucEncodeMode = encoderMode;
555 							args.v1.ucConfig
559 						atom_execute_table(gAtomContext, index, (uint32*)&args);
562 							= B_LENDIAN_TO_HOST_INT16(args.v1.usPixelClock);
566 						args.v3.sInput.usPixelClock
568 						args.v3.sInput.ucTransmitterID = encoderID;
569 						args.v3.sInput.ucEncodeMode = encoderMode;
570 						args.v3.sInput.ucDispPllConfig = 0;
572 							args.v3.sInput.ucDispPllConfig
580 							args.v3.sInput.ucDispPllConfig
585 							args.v3.sInput.usPixelClock
592 								args.v3.sInput.usPixelClock =
597 								args.v3.sInput.ucDispPllConfig
601 								args.v3.sInput.ucDispPllConfig
606 						args.v3.sInput.ucExtTransmitterID = externalEncoderID;
608 						atom_execute_table(gAtomContext, index, (uint32*)&args);
613 								args.v3.sOutput.ulDispPllFreq);
617 						if (args.v3.sOutput.ucRefDiv) {
620 							pll->referenceDiv = args.v3.sOutput.ucRefDiv;
622 						if (args.v3.sOutput.ucPostDiv) {
625 							pll->postDiv = args.v3.sOutput.ucPostDiv;
731 	union setPixelClock args;
732 	memset(&args, 0, sizeof(args));
736 			args.v1.usPixelClock
738 			args.v1.usRefDiv = B_HOST_TO_LENDIAN_INT16(pll->referenceDiv);
739 			args.v1.usFbDiv = B_HOST_TO_LENDIAN_INT16(pll->feedbackDiv);
740 			args.v1.ucFracFbDiv = pll->feedbackDivFrac;
741 			args.v1.ucPostDiv = pll->postDiv;
742 			args.v1.ucPpll = pll->id;
743 			args.v1.ucCRTC = crtcID;
744 			args.v1.ucRefDivSrc = 1;
747 			args.v2.usPixelClock
749 			args.v2.usRefDiv = B_HOST_TO_LENDIAN_INT16(pll->referenceDiv);
750 			args.v2.usFbDiv = B_HOST_TO_LENDIAN_INT16(pll->feedbackDiv);
751 			args.v2.ucFracFbDiv = pll->feedbackDivFrac;
752 			args.v2.ucPostDiv = pll->postDiv;
753 			args.v2.ucPpll = pll->id;
754 			args.v2.ucCRTC = crtcID;
755 			args.v2.ucRefDivSrc = 1;
758 			args.v3.usPixelClock
760 			args.v3.usRefDiv = B_HOST_TO_LENDIAN_INT16(pll->referenceDiv);
761 			args.v3.usFbDiv = B_HOST_TO_LENDIAN_INT16(pll->feedbackDiv);
762 			args.v3.ucFracFbDiv = pll->feedbackDivFrac;
763 			args.v3.ucPostDiv = pll->postDiv;
764 			args.v3.ucPpll = pll->id;
765 			args.v3.ucMiscInfo = (pll->id << 2);
768 				args.v3.ucMiscInfo |= PIXEL_CLOCK_MISC_REF_DIV_SRC;
770 			args.v3.ucTransmitterId
772 			args.v3.ucEncoderMode = display_get_encoder_mode(connectorIndex);
775 			args.v5.ucCRTC = crtcID;
776 			args.v5.usPixelClock
778 			args.v5.ucRefDiv = pll->referenceDiv;
779 			args.v5.usFbDiv = B_HOST_TO_LENDIAN_INT16(pll->feedbackDiv);
780 			args.v5.ulFbDivDecFrac
782 			args.v5.ucPostDiv = pll->postDiv;
783 			args.v5.ucMiscInfo = 0; /* HDMI depth, etc. */
786 				args.v5.ucMiscInfo |= PIXEL_CLOCK_V5_MISC_REF_DIV_SRC;
791 					args.v5.ucMiscInfo |= PIXEL_CLOCK_V5_MISC_HDMI_24BPP;
794 					args.v5.ucMiscInfo |= PIXEL_CLOCK_V5_MISC_HDMI_30BPP;
797 			args.v5.ucTransmitterID
799 			args.v5.ucEncoderMode
801 			args.v5.ucPpll = pll->id;
804 			args.v6.ulDispEngClkFreq
806 			args.v6.ucRefDiv = pll->referenceDiv;
807 			args.v6.usFbDiv = B_HOST_TO_LENDIAN_INT16(pll->feedbackDiv);
808 			args.v6.ulFbDivDecFrac
810 			args.v6.ucPostDiv = pll->postDiv;
811 			args.v6.ucMiscInfo = 0; /* HDMI depth, etc. */
814 				args.v6.ucMiscInfo |= PIXEL_CLOCK_V6_MISC_REF_DIV_SRC;
819 					args.v6.ucMiscInfo |= PIXEL_CLOCK_V6_MISC_HDMI_24BPP;
822 					args.v6.ucMiscInfo |= PIXEL_CLOCK_V6_MISC_HDMI_30BPP;
825 					args.v6.ucMiscInfo |= PIXEL_CLOCK_V6_MISC_HDMI_36BPP;
828 					args.v6.ucMiscInfo |= PIXEL_CLOCK_V6_MISC_HDMI_48BPP;
831 			args.v6.ucTransmitterID
833 			args.v6.ucEncoderMode = display_get_encoder_mode(connectorIndex);
834 			args.v6.ucPpll = pll->id;
845 	status_t result = atom_execute_table(gAtomContext, index, (uint32*)&args);
880 	union setPixelClock args;
881 	memset(&args, 0, sizeof(args));
891 					args.v5.ucCRTC = ATOM_CRTC_INVALID;
892 					args.v5.usPixelClock = B_HOST_TO_LENDIAN_INT16(clock);
893 					args.v5.ucPpll = ATOM_DCPLL;
898 					args.v6.ulDispEngClkFreq = B_HOST_TO_LENDIAN_INT32(clock);
900 						args.v6.ucPpll = ATOM_EXT_PLL1;
902 						args.v6.ucPpll = ATOM_PPLL0;
904 						args.v6.ucPpll = ATOM_DCPLL;