Lines Matching defs:args
95 union crtcSourceParam args;
96 memset(&args, 0, sizeof(args));
103 args.v1.ucCRTC = crtcID;
107 args.v1.ucDevice = ATOM_DEVICE_DFP1_INDEX;
113 args.v1.ucDevice = ATOM_DEVICE_LCD1_INDEX;
115 args.v1.ucDevice = ATOM_DEVICE_DFP3_INDEX;
120 args.v1.ucDevice = ATOM_DEVICE_DFP2_INDEX;
125 args.v1.ucDevice = ATOM_DEVICE_TV1_INDEX;
128 args.v1.ucDevice = ATOM_DEVICE_CV_INDEX;
130 args.v1.ucDevice = ATOM_DEVICE_CRT1_INDEX;
135 args.v1.ucDevice = ATOM_DEVICE_TV1_INDEX;
138 args.v1.ucDevice = ATOM_DEVICE_CV_INDEX;
140 args.v1.ucDevice = ATOM_DEVICE_CRT2_INDEX;
145 args.v2.ucCRTC = crtcID;
146 args.v2.ucEncodeMode
155 args.v2.ucEncoderID
159 args.v2.ucEncoderID
163 args.v2.ucEncoderID
167 args.v2.ucEncoderID
171 args.v2.ucEncoderID
175 args.v2.ucEncoderID
181 args.v2.ucEncoderID = ASIC_INT_DVO_ENCODER_ID;
185 args.v2.ucEncoderID = ASIC_INT_TV_ENCODER_ID;
188 args.v2.ucEncoderID = ASIC_INT_TV_ENCODER_ID;
190 args.v2.ucEncoderID = ASIC_INT_DAC1_ENCODER_ID;
194 args.v2.ucEncoderID = ASIC_INT_TV_ENCODER_ID;
197 args.v2.ucEncoderID = ASIC_INT_TV_ENCODER_ID;
199 args.v2.ucEncoderID = ASIC_INT_DAC2_ENCODER_ID;
211 atom_execute_table(gAtomContext, index, (uint32*)&args);
390 TV_ENCODER_CONTROL_PS_ALLOCATION args;
391 memset(&args, 0, sizeof(args));
395 args.sTVEncoder.ucAction = command;
398 args.sTVEncoder.ucTvStandard = ATOM_TV_CV;
401 args.sTVEncoder.ucTvStandard = ATOM_TV_NTSC;
404 args.sTVEncoder.usPixelClock = B_HOST_TO_LENDIAN_INT16(pixelClock / 10);
406 return atom_execute_table(gAtomContext, index, (uint32*)&args);
457 union lvdsEncoderControl args;
458 memset(&args, 0, sizeof(args));
468 args.v1.ucMisc = 0;
469 args.v1.ucAction = command;
471 args.v1.ucMisc |= PANEL_ENCODER_MISC_HDMI_TYPE;
472 args.v1.usPixelClock = B_HOST_TO_LENDIAN_INT16(pixelClock / 10);
476 args.v1.ucMisc |= PANEL_ENCODER_MISC_DUAL;
478 args.v1.ucMisc |= ATOM_PANEL_MISC_888RGB;
481 // args.v1.ucMisc |= PANEL_ENCODER_MISC_TMDS_LINKB;
483 args.v1.ucMisc |= PANEL_ENCODER_MISC_DUAL;
485 args.v1.ucMisc |= ATOM_PANEL_MISC_888RGB;
490 args.v2.ucMisc = 0;
491 args.v2.ucAction = command;
494 // args.v2.ucMisc |= PANEL_ENCODER_MISC_COHERENT;
497 args.v2.ucMisc |= PANEL_ENCODER_MISC_HDMI_TYPE;
498 args.v2.usPixelClock = B_HOST_TO_LENDIAN_INT16(pixelClock / 10);
499 args.v2.ucTruncate = 0;
500 args.v2.ucSpatial = 0;
501 args.v2.ucTemporal = 0;
502 args.v2.ucFRC = 0;
505 args.v2.ucMisc |= PANEL_ENCODER_MISC_DUAL;
507 args.v2.ucSpatial = PANEL_ENCODER_SPATIAL_DITHER_EN;
509 args.v2.ucSpatial
515 args.v2.ucTemporal = PANEL_ENCODER_TEMPORAL_DITHER_EN;
517 args.v2.ucTemporal
522 args.v2.ucTemporal
527 // args.v2.ucMisc |= PANEL_ENCODER_MISC_TMDS_LINKB;
529 args.v2.ucMisc |= PANEL_ENCODER_MISC_DUAL;
544 return atom_execute_table(gAtomContext, index, (uint32*)&args);
581 union digEncoderControl args;
582 memset(&args, 0, sizeof(args));
641 args.v1.ucAction = command;
642 args.v1.usPixelClock = B_HOST_TO_LENDIAN_INT16(pixelClock / 10);
645 args.v3.ucPanelMode = panelMode;
647 args.v1.ucEncoderMode
651 if (args.v1.ucEncoderMode == ATOM_ENCODER_MODE_DP
652 || args.v1.ucEncoderMode == ATOM_ENCODER_MODE_DP_MST) {
653 args.v1.ucLaneNum = dpInfo->laneCount;
655 args.v1.ucLaneNum = 8;
657 args.v1.ucLaneNum = 4;
659 if ((args.v1.ucEncoderMode == ATOM_ENCODER_MODE_DP
660 || args.v1.ucEncoderMode == ATOM_ENCODER_MODE_DP_MST)
662 args.v1.ucConfig |= ATOM_ENCODER_CONFIG_DPLINKRATE_2_70GHZ;
667 args.v1.ucConfig = ATOM_ENCODER_CONFIG_V2_TRANSMITTER1;
671 args.v1.ucConfig = ATOM_ENCODER_CONFIG_V2_TRANSMITTER2;
674 args.v1.ucConfig = ATOM_ENCODER_CONFIG_V2_TRANSMITTER3;
679 args.v1.ucConfig |= ATOM_ENCODER_CONFIG_LINKB;
681 args.v1.ucConfig |= ATOM_ENCODER_CONFIG_LINKA;
685 args.v3.ucAction = command;
686 args.v3.usPixelClock = B_HOST_TO_LENDIAN_INT16(pixelClock / 10);
689 args.v3.ucPanelMode = panelMode;
691 args.v3.ucEncoderMode
695 if (args.v3.ucEncoderMode == ATOM_ENCODER_MODE_DP
696 || args.v3.ucEncoderMode == ATOM_ENCODER_MODE_DP_MST) {
697 args.v3.ucLaneNum = dpInfo->laneCount;
699 args.v3.ucLaneNum = 8;
701 args.v3.ucLaneNum = 4;
703 if ((args.v3.ucEncoderMode == ATOM_ENCODER_MODE_DP
704 || args.v3.ucEncoderMode == ATOM_ENCODER_MODE_DP_MST)
706 args.v1.ucConfig |= ATOM_ENCODER_CONFIG_DPLINKRATE_2_70GHZ;
709 args.v3.acConfig.ucDigSel = encoder_pick_dig(connectorIndex);
714 args.v3.ucBitPerColor = PANEL_BPC_UNDEFINE;
717 args.v3.ucBitPerColor = PANEL_6BIT_PER_COLOR;
721 args.v3.ucBitPerColor = PANEL_8BIT_PER_COLOR;
724 args.v3.ucBitPerColor = PANEL_10BIT_PER_COLOR;
727 args.v3.ucBitPerColor = PANEL_12BIT_PER_COLOR;
730 args.v3.ucBitPerColor = PANEL_16BIT_PER_COLOR;
735 args.v4.ucAction = command;
736 args.v4.usPixelClock = B_HOST_TO_LENDIAN_INT16(pixelClock / 10);
739 args.v4.ucPanelMode = panelMode;
741 args.v4.ucEncoderMode
745 if (args.v4.ucEncoderMode == ATOM_ENCODER_MODE_DP
746 || args.v4.ucEncoderMode == ATOM_ENCODER_MODE_DP_MST) {
748 args.v4.ucLaneNum = dpInfo->laneCount;
750 args.v4.ucConfig
753 args.v4.ucConfig
758 args.v4.ucLaneNum = 8;
760 args.v4.ucLaneNum = 4;
762 args.v4.acConfig.ucDigSel = digEncoderID;
767 args.v4.ucBitPerColor = PANEL_BPC_UNDEFINE;
770 args.v4.ucBitPerColor = PANEL_6BIT_PER_COLOR;
774 args.v4.ucBitPerColor = PANEL_8BIT_PER_COLOR;
777 args.v4.ucBitPerColor = PANEL_10BIT_PER_COLOR;
780 args.v4.ucBitPerColor = PANEL_12BIT_PER_COLOR;
783 args.v4.ucBitPerColor = PANEL_16BIT_PER_COLOR;
787 args.v4.ucHPD_ID = 0;
793 status_t result = atom_execute_table(gAtomContext, index, (uint32*)&args);
840 union externalEncoderControl args;
841 memset(&args, 0, sizeof(args));
859 args.v1.sDigEncoder.ucAction = command;
860 args.v1.sDigEncoder.usPixelClock
862 args.v1.sDigEncoder.ucEncoderMode
867 args.v1.sDigEncoder.ucConfig
870 args.v1.sDigEncoder.ucLaneNum
873 args.v1.sDigEncoder.ucLaneNum = 8;
875 args.v1.sDigEncoder.ucLaneNum = 4;
880 args.v3.sExtEncoder.ucAction = command;
882 args.v3.sExtEncoder.usConnectorId
885 args.v3.sExtEncoder.usPixelClock
889 args.v3.sExtEncoder.ucEncoderMode
894 args.v3.sExtEncoder.ucConfig
897 args.v3.sExtEncoder.ucConfig
900 args.v1.sDigEncoder.ucLaneNum
903 args.v3.sExtEncoder.ucLaneNum = 8;
905 args.v3.sExtEncoder.ucLaneNum = 4;
913 args.v3.sExtEncoder.ucConfig
918 args.v3.sExtEncoder.ucConfig
923 args.v3.sExtEncoder.ucConfig
932 args.v3.sExtEncoder.ucBitPerColor
936 args.v3.sExtEncoder.ucBitPerColor
941 args.v3.sExtEncoder.ucBitPerColor
945 args.v3.sExtEncoder.ucBitPerColor
949 args.v3.sExtEncoder.ucBitPerColor
953 args.v3.sExtEncoder.ucBitPerColor
973 return atom_execute_table(gAtomContext, index, (uint32*)&args);
985 DAC_ENCODER_CONTROL_PS_ALLOCATION args;
986 memset(&args, 0, sizeof(args));
999 args.ucAction = command;
1002 args.ucDacStandard = ATOM_DAC1_PS2;
1004 args.ucDacStandard = ATOM_DAC1_CV;
1009 args.ucDacStandard = ATOM_DAC1_NTSC;
1012 args.ucDacStandard = ATOM_DAC1_PAL;
1016 args.usPixelClock = B_HOST_TO_LENDIAN_INT16(pixelClock / 10);
1018 return atom_execute_table(gAtomContext, index, (uint32*)&args);
1052 DAC_LOAD_DETECTION_PS_ALLOCATION args;
1057 memset(&args, 0, sizeof(args));
1066 args.sDacload.ucMisc = 0;
1070 args.sDacload.ucDacType = ATOM_DAC_A;
1072 args.sDacload.ucDacType = ATOM_DAC_B;
1076 args.sDacload.usDeviceID
1078 atom_execute_table(gAtomContext, index, (uint32*)&args);
1086 args.sDacload.usDeviceID
1088 atom_execute_table(gAtomContext, index, (uint32*)&args);
1096 args.sDacload.usDeviceID
1099 args.sDacload.ucMisc = DAC_LOAD_MISC_YPrPb;
1100 atom_execute_table(gAtomContext, index, (uint32*)&args);
1108 args.sDacload.usDeviceID
1111 args.sDacload.ucMisc = DAC_LOAD_MISC_YPrPb;
1112 atom_execute_table(gAtomContext, index, (uint32*)&args);
1214 union digTransmitterControl args;
1215 memset(&args, 0, sizeof(args));
1245 args.v1.ucAction = command;
1247 args.v1.usInitInfo
1251 args.v1.asMode.ucLaneSel = laneNumber;
1252 args.v1.asMode.ucLaneSet = laneSet;
1255 args.v1.usPixelClock
1258 args.v1.usPixelClock = B_HOST_TO_LENDIAN_INT16(
1261 args.v1.usPixelClock
1266 args.v1.ucConfig = ATOM_TRANSMITTER_CONFIG_CLKSRC_PPLL;
1269 args.v1.ucConfig
1272 args.v1.ucConfig
1282 args.v1.ucConfig
1285 args.v1.ucConfig
1288 args.v1.ucConfig
1291 args.v1.ucConfig
1295 args.v1.ucConfig
1298 args.v1.ucConfig
1305 args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LINKB;
1307 args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LINKA;
1310 args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_COHERENT;
1315 args.v1.ucConfig
1319 args.v1.ucConfig
1325 args.v2.ucAction = command;
1327 args.v2.usInitInfo
1331 args.v2.asMode.ucLaneSel = laneNumber;
1332 args.v2.asMode.ucLaneSet = laneSet;
1335 args.v2.usPixelClock
1338 args.v2.usPixelClock = B_HOST_TO_LENDIAN_INT16(
1341 args.v2.usPixelClock
1345 args.v2.acConfig.ucEncoderSel = digEncoderID;
1347 args.v2.acConfig.ucLinkSel = 1;
1351 args.v2.acConfig.ucTransmitterSel = 0;
1354 args.v2.acConfig.ucTransmitterSel = 1;
1357 args.v2.acConfig.ucTransmitterSel = 2;
1362 args.v2.acConfig.fCoherentMode = 1;
1363 args.v2.acConfig.fDPConnector = 1;
1368 args.v2.acConfig.fCoherentMode = 1;
1372 args.v2.acConfig.fDualLinkConnector = 1;
1376 args.v3.ucAction = command;
1378 args.v3.usInitInfo
1382 args.v3.asMode.ucLaneSel = laneNumber;
1383 args.v3.asMode.ucLaneSet = laneSet;
1386 args.v3.usPixelClock
1389 args.v3.usPixelClock = B_HOST_TO_LENDIAN_INT16(
1392 args.v3.usPixelClock
1398 args.v3.ucLaneNum = dpLaneCount;
1400 args.v3.ucLaneNum = 8;
1402 args.v3.ucLaneNum = 4;
1405 args.v3.acConfig.ucLinkSel = 1;
1407 args.v3.acConfig.ucEncoderSel = 1;
1415 args.v3.acConfig.ucRefClkSource = 2; // EXT clock
1417 args.v3.acConfig.ucRefClkSource = pll->id;
1421 args.v3.acConfig.ucTransmitterSel = 0;
1424 args.v3.acConfig.ucTransmitterSel = 1;
1427 args.v3.acConfig.ucTransmitterSel = 2;
1432 args.v3.acConfig.fCoherentMode = 1;
1437 args.v3.acConfig.fCoherentMode = 1;
1440 args.v3.acConfig.fDualLinkConnector = 1;
1444 args.v4.ucAction = command;
1446 args.v4.usInitInfo
1450 args.v4.asMode.ucLaneSel = laneNumber;
1451 args.v4.asMode.ucLaneSet = laneSet;
1454 args.v4.usPixelClock
1457 args.v4.usPixelClock = B_HOST_TO_LENDIAN_INT16(
1460 args.v4.usPixelClock
1466 args.v4.ucLaneNum = dpLaneCount;
1468 args.v4.ucLaneNum = 8;
1470 args.v4.ucLaneNum = 4;
1473 args.v4.acConfig.ucLinkSel = 1;
1475 args.v4.acConfig.ucEncoderSel = 1;
1482 args.v4.acConfig.ucRefClkSource
1485 args.v4.acConfig.ucRefClkSource
1489 args.v4.acConfig.ucRefClkSource = pll->id;
1493 args.v4.acConfig.ucTransmitterSel = 0;
1496 args.v4.acConfig.ucTransmitterSel = 1;
1499 args.v4.acConfig.ucTransmitterSel = 2;
1504 args.v4.acConfig.fCoherentMode = 1;
1509 args.v4.acConfig.fCoherentMode = 1;
1512 args.v4.acConfig.fDualLinkConnector = 1;
1516 args.v5.ucAction = command;
1519 args.v5.usSymClock
1522 args.v5.usSymClock
1528 args.v5.ucPhyId = ATOM_PHY_ID_UNIPHYB;
1530 args.v5.ucPhyId = ATOM_PHY_ID_UNIPHYA;
1534 args.v5.ucPhyId = ATOM_PHY_ID_UNIPHYD;
1536 args.v5.ucPhyId = ATOM_PHY_ID_UNIPHYC;
1540 args.v5.ucPhyId = ATOM_PHY_ID_UNIPHYF;
1542 args.v5.ucPhyId = ATOM_PHY_ID_UNIPHYE;
1546 args.v5.ucLaneNum = dpLaneCount;
1548 args.v5.ucLaneNum = 8;
1550 args.v5.ucLaneNum = 4;
1553 args.v5.ucConnObjId = connectorObjectID;
1554 args.v5.ucDigMode
1558 args.v5.asConfig.ucPhyClkSrcId
1561 args.v5.asConfig.ucPhyClkSrcId = pll->id;
1565 args.v5.asConfig.ucCoherentMode = 1;
1570 args.v5.asConfig.ucCoherentMode = 1;
1574 args.v5.asConfig.ucHPDSel = 0;
1576 args.v5.ucDigEncoderSel = 1 << digEncoderID;
1577 args.v5.ucDPLaneSet = laneSet;
1587 return atom_execute_table(gAtomContext, index, (uint32*)&args);
1723 DISPLAY_DEVICE_OUTPUT_CONTROL_PS_ALLOCATION args;
1724 memset(&args, 0, sizeof(args));
1787 args.ucAction = ATOM_ENABLE;
1792 args.ucAction = ATOM_DISABLE;
1796 atom_execute_table(gAtomContext, index, (uint32*)&args);
1799 args.ucAction = args.ucAction == ATOM_DISABLE
1801 atom_execute_table(gAtomContext, index, (uint32*)&args);