Lines Matching defs:latency
173 * (CAS latency is dependant on MGA setup on some (DRAM) boards) */
177 uint8 latency = 0;
194 LOG(4,("INIT: RAM access errors; tuning CAS latency if prudent...\n"));
205 for (latency = 4; latency >= 2; latency-- )
208 ACCW(MCTLWTST, ((si->ps.mctlwtst_reg & 0xfffffffc) | (latency - 2)));
237 LOG(4,("INIT: RAM access OK. CAS latency set to %d cycles.\n", latency));
239 LOG(4,("INIT: RAM access not fixable. CAS latency set to %d cycles.\n", latency));
743 /* calculate powergraphics CAS-latency from pins CAS-latency, and update register setting */