Lines Matching defs:all

140 init_expmed_one_conv (struct init_expmed_rtl *all, machine_mode to_mode,
161 which = (to_size < from_size ? all->trunc : all->zext);
163 PUT_MODE (all->reg, from_mode);
168 init_expmed_one_mode (struct init_expmed_rtl *all,
176 PUT_MODE (all->reg, mode);
177 PUT_MODE (all->plus, mode);
178 PUT_MODE (all->neg, mode);
179 PUT_MODE (all->mult, mode);
180 PUT_MODE (all->sdiv, mode);
181 PUT_MODE (all->udiv, mode);
182 PUT_MODE (all->sdiv_32, mode);
183 PUT_MODE (all->smod_32, mode);
184 PUT_MODE (all->wide_trunc, mode);
185 PUT_MODE (all->shift, mode);
186 PUT_MODE (all->shift_mult, mode);
187 PUT_MODE (all->shift_add, mode);
188 PUT_MODE (all->shift_sub0, mode);
189 PUT_MODE (all->shift_sub1, mode);
190 PUT_MODE (all->zext, mode);
191 PUT_MODE (all->trunc, mode);
193 set_add_cost (speed, mode, set_src_cost (all->plus, speed));
194 set_neg_cost (speed, mode, set_src_cost (all->neg, speed));
195 set_mul_cost (speed, mode, set_src_cost (all->mult, speed));
196 set_sdiv_cost (speed, mode, set_src_cost (all->sdiv, speed));
197 set_udiv_cost (speed, mode, set_src_cost (all->udiv, speed));
199 set_sdiv_pow2_cheap (speed, mode, (set_src_cost (all->sdiv_32, speed)
201 set_smod_pow2_cheap (speed, mode, (set_src_cost (all->smod_32, speed)
215 XEXP (all->shift, 1) = all->cint[m];
216 XEXP (all->shift_mult, 1) = all->pow2[m];
218 set_shift_cost (speed, mode, m, set_src_cost (all->shift, speed));
219 set_shiftadd_cost (speed, mode, m, set_src_cost (all->shift_add, speed));
220 set_shiftsub0_cost (speed, mode, m, set_src_cost (all->shift_sub0, speed));
221 set_shiftsub1_cost (speed, mode, m, set_src_cost (all->shift_sub1, speed));
228 init_expmed_one_conv (all, mode, mode_from, speed);
235 PUT_MODE (all->zext, wider_mode);
236 PUT_MODE (all->wide_mult, wider_mode);
237 PUT_MODE (all->wide_lshr, wider_mode);
238 XEXP (all->wide_lshr, 1) = GEN_INT (mode_bitsize);
241 set_src_cost (all->wide_mult, speed));
243 set_src_cost (all->wide_trunc, speed));
251 struct init_expmed_rtl all;
255 memset (&all, 0, sizeof all);
258 all.pow2[m] = GEN_INT ((HOST_WIDE_INT) 1 << m);
259 all.cint[m] = GEN_INT (m);
263 all.reg = gen_rtx_raw_REG (mode, LAST_VIRTUAL_REGISTER + 1);
264 all.plus = gen_rtx_PLUS (mode, all.reg, all.reg);
265 all.neg = gen_rtx_NEG (mode, all.reg);
266 all.mult = gen_rtx_MULT (mode, all.reg, all.reg);
267 all.sdiv = gen_rtx_DIV (mode, all.reg, all.reg);
268 all.udiv = gen_rtx_UDIV (mode, all.reg, all.reg);
269 all.sdiv_32 = gen_rtx_DIV (mode, all.reg, all.pow2[5]);
270 all.smod_32 = gen_rtx_MOD (mode, all.reg, all.pow2[5]);
271 all.zext = gen_rtx_ZERO_EXTEND (mode, all.reg);
272 all.wide_mult = gen_rtx_MULT (mode, all.zext, all.zext);
273 all.wide_lshr = gen_rtx_LSHIFTRT (mode, all.wide_mult, all.reg);
274 all.wide_trunc = gen_rtx_TRUNCATE (mode, all.wide_lshr);
275 all.shift = gen_rtx_ASHIFT (mode, all.reg, all.reg);
276 all.shift_mult = gen_rtx_MULT (mode, all.reg, all.reg);
277 all.shift_add = gen_rtx_PLUS (mode, all.shift_mult, all.reg);
278 all.shift_sub0 = gen_rtx_MINUS (mode, all.shift_mult, all.reg);
279 all.shift_sub1 = gen_rtx_MINUS (mode, all.reg, all.shift_mult);
280 all.trunc = gen_rtx_TRUNCATE (mode, all.reg);
289 init_expmed_one_mode (&all, mode, speed);
294 init_expmed_one_mode (&all, mode, speed);
299 init_expmed_one_mode (&all, mode, speed);
311 ggc_free (all.trunc);
312 ggc_free (all.shift_sub1);
313 ggc_free (all.shift_sub0);
314 ggc_free (all.shift_add);
315 ggc_free (all.shift_mult);
316 ggc_free (all.shift);
317 ggc_free (all.wide_trunc);
318 ggc_free (all.wide_lshr);
319 ggc_free (all.wide_mult);
320 ggc_free (all.zext);
321 ggc_free (all.smod_32);
322 ggc_free (all.sdiv_32);
323 ggc_free (all.udiv);
324 ggc_free (all.sdiv);
325 ggc_free (all.mult);
326 ggc_free (all.neg);
327 ggc_free (all.plus);
328 ggc_free (all.reg);
595 if it has all the bits we will actually use. However,
2194 on all machines. */
2413 If retval.cost >= COST_LIMIT, no algorithm was found and all
3143 all elements of the vector constant are identical. */
3173 vector lshift (by scalar or vector) at all. If not, we can't use
3655 mode == word_mode, however all the cost calculations in
3941 For some special operands this code emits all RTL for the desired
3956 In all cases but EXACT_DIV_EXPR, this multiplication requires the upper
4046 later. It will require going over all usages of SIZE below. */
5670 the constant zero. Reject all other comparisons at this point. Only