config/sparc/sparc.c

2987 	  rtx pat;
2989 	    pat = gen_seqsidi_special (operands[0], x, y);
2991 	    pat = gen_seqsisi_special (operands[0], x, y);
2992           emit_insn (pat);
2997 	  rtx pat = gen_seqdi_special (operands[0], x, y);
2998           emit_insn (pat);
3007           rtx pat;
3009 	    pat = gen_snesidi_special (operands[0], x, y);
3011 	    pat = gen_snesisi_special (operands[0], x, y);
3012           emit_insn (pat);
3017 	  rtx pat;
3019 	    pat = gen_snedi_special_vis3 (operands[0], x, y);
3021 	    pat = gen_snedi_special (operands[0], x, y);
3022           emit_insn (pat);
3517   rtx pat;
3529   pat = PATTERN (trial);
3536   if (GET_CODE (pat) == SET
3537       && GET_CODE (SET_SRC (pat)) == PLUS)
3539       rtx unspec = XEXP (SET_SRC (pat), 1);
3561   rtx pat = PATTERN (trial);
3562   rtx src = SET_SRC (pat);
3603   else if (return_p && TARGET_V9 && !epilogue_renumber (&pat, 1))
3644   rtx pat;
3661   pat = PATTERN (trial);
3662   if (GET_CODE (pat) == PARALLEL)
3668       for (i = XVECLEN (pat, 0) - 1; i >= 0; i--)
3670 	  rtx expr = XVECEXP (pat, 0, i);
3679       return !epilogue_renumber (&pat, 1);
3682   if (GET_CODE (pat) != SET)
3685   if (GET_CODE (SET_DEST (pat)) != REG)
3688   regno = REGNO (SET_DEST (pat));
3699     return TARGET_V9 && !epilogue_renumber (&pat, 1);
3709   rtx pat;
3717   pat = PATTERN (trial);
3727       if (reg_mentioned_p (gen_rtx_REG (Pmode, 1), pat))
3733   if (GET_CODE (pat) != SET)
3738   if (GET_CODE (SET_DEST (pat)) != REG
3739       || (REGNO (SET_DEST (pat)) >= 8 && REGNO (SET_DEST (pat)) < 24)
3740       || ! SPARC_INT_REG_P (REGNO (SET_DEST (pat))))
3745   if (reg_mentioned_p (gen_rtx_REG (Pmode, 15), pat))
4635 sparc_emit_call_insn (rtx pat, rtx addr)
4639   insn = emit_call_insn (pat);
5900 output_restore (rtx pat)
5904   if (! pat)
5910   gcc_assert (GET_CODE (pat) == SET);
5912   operands[0] = SET_DEST (pat);
5913   pat = SET_SRC (pat);
5915   switch (GET_CODE (pat))
5918 	operands[1] = XEXP (pat, 0);
5919 	operands[2] = XEXP (pat, 1);
5923 	operands[1] = XEXP (pat, 0);
5924 	operands[2] = XEXP (pat, 1);
5928 	operands[1] = XEXP (pat, 0);
5929 	gcc_assert (XEXP (pat, 1) == const1_rtx);
5933 	operands[1] = pat;
5991 	  rtx delay, pat;
5996 	  pat = PATTERN (delay);
5998 	  if (TARGET_V9 && ! epilogue_renumber (&pat, 1))
6000 	      epilogue_renumber (&pat, 0);
6006 	      output_restore (pat);
9495 	  rtx pat = PATTERN(insn);
9498 	  if (GET_CODE (pat) != SET || GET_CODE (dep_pat) != SET)
9504 	  if (rtx_equal_p (SET_DEST (dep_pat), SET_SRC (pat)))
9535   rtx pat = PATTERN(insn);
9555 	  if (GET_CODE (pat) != SET || GET_CODE (dep_pat) != SET)
9558 	  if (rtx_equal_p (SET_DEST (dep_pat), SET_SRC (pat)))
9569 	      if (GET_CODE (pat) != SET || GET_CODE (dep_pat) != SET
9571 		  || GET_CODE (SET_SRC (pat)) != MEM
9573 				    XEXP (SET_SRC (pat), 0)))
9679   register rtx pat = PATTERN (insn);
9681   switch (GET_CODE (SET_SRC (pat)))
9701 	rtx op0 = XEXP (SET_SRC (pat), 0);
9702 	rtx op1 = XEXP (SET_SRC (pat), 1);
9714 	rtx op0 = XEXP (SET_SRC (pat), 0);
9715 	rtx op1 = XEXP (SET_SRC (pat), 1);
9723       return GET_MODE (SET_SRC (pat)) == SImode;
9726       return ! (CONST_DOUBLE_LOW (SET_SRC (pat)) & 0x80000000);
9728       return ! (INTVAL (SET_SRC (pat)) & 0x80000000);
9731       return - (GET_MODE (SET_SRC (pat)) == SImode);
9733       return sparc_check_64 (SET_SRC (pat), insn);
9884 	    rtx pat = PATTERN (insn);
9885 	    if (GET_CODE (pat) != SET)
9887 	    if (rtx_equal_p (x, SET_DEST (pat)))
9889 	    if (y && rtx_equal_p (y, SET_DEST (pat)))
9891 	    if (reg_overlap_mentioned_p (SET_DEST (pat), y))
10738   rtx pat, op[4];
10791       pat = GEN_FCN (icode) (op[0]);
10795 	pat = GEN_FCN (icode) (op[0], op[1]);
10797 	pat = GEN_FCN (icode) (op[1]);
10800       pat = GEN_FCN (icode) (op[0], op[1], op[2]);
10803       pat = GEN_FCN (icode) (op[0], op[1], op[2], op[3]);
10809   if (!pat)
10812   emit_insn (pat);