Lines Matching defs:pat

11399       rtx pat = PATTERN (c_insn);
11400 if (GET_CODE (pat) == PARALLEL)
11402 rtx vec = XVECEXP (pat, 0, 0);
16940 rtx pat = PATTERN (insn);
16942 if (vzeroupper_operation (pat, VOIDmode)
16943 || vzeroall_operation (pat, VOIDmode))
16951 note_stores (pat, ix86_check_avx256_stores, &avx_reg256_found);
26761 rtx pat = PATTERN (condgen);
26762 for (i = 0; i < XVECLEN (pat, 0); i++)
26763 if (GET_CODE (XVECEXP (pat, 0, i)) == SET)
26765 rtx set_src = SET_SRC (XVECEXP (pat, 0, i));
26767 compare_set = XVECEXP (pat, 0, i);
26769 alu_set = XVECEXP (pat, 0, i);
36112 rtx pat;
36143 pat = GEN_FCN (icode) (target, op0, op1);
36144 if (! pat)
36147 emit_insn (pat);
36159 rtx pat;
36348 pat = GEN_FCN (icode) (target, args[0].op);
36353 pat = GEN_FCN (icode) (target, args[0].op, args[1].op,
36356 pat = GEN_FCN (icode) (target, args[0].op, args[1].op);
36363 pat = GEN_FCN (icode) (target, cmp_op, args[0].op, args[1].op);
36368 pat = GEN_FCN (icode) (target, args[0].op, args[1].op, args[2].op);
36372 pat = GEN_FCN (icode) (target, args[0].op, args[1].op, args[2].op, args[3].op);
36379 if (! pat)
36382 emit_insn (pat);
36393 rtx pat;
36415 pat = GEN_FCN (icode) (target, op0, op1);
36416 if (! pat)
36418 emit_insn (pat);
36428 rtx pat;
36462 pat = GEN_FCN (d->icode) (target, op0, op1, op2);
36463 if (! pat)
36465 emit_insn (pat);
36475 rtx pat;
36505 pat = GEN_FCN (d->icode) (op0, op1);
36506 if (! pat)
36508 emit_insn (pat);
36512 SET_DEST (pat),
36524 rtx pat;
36544 pat = GEN_FCN (d->icode) (target, op0, op1);
36545 if (! pat)
36547 emit_insn (pat);
36555 rtx pat;
36582 pat = GEN_FCN (d->icode) (target, op0, op1, op2);
36583 if (! pat)
36585 emit_insn (pat);
36595 rtx pat;
36620 pat = GEN_FCN (d->icode) (op0, op1);
36621 if (! pat)
36623 emit_insn (pat);
36627 SET_DEST (pat),
36639 rtx pat;
36691 pat = GEN_FCN (d->icode) (target, scratch1, op0, op1, op2, op3, op4);
36702 pat = GEN_FCN (d->icode) (scratch0, target, op0, op1, op2, op3, op4);
36711 pat = GEN_FCN (d->icode) (scratch0, scratch1, op0, op1, op2, op3, op4);
36714 if (! pat)
36717 emit_insn (pat);
36744 rtx pat;
36786 pat = GEN_FCN (d->icode) (target, scratch1, op0, op1, op2);
36797 pat = GEN_FCN (d->icode) (scratch0, target, op0, op1, op2);
36806 pat = GEN_FCN (d->icode) (scratch0, scratch1, op0, op1, op2);
36809 if (! pat)
36812 emit_insn (pat);
36839 rtx pat, real_target;
37774 pat = GEN_FCN (icode) (real_target, args[0].op);
37777 pat = GEN_FCN (icode) (real_target, args[0].op, args[1].op);
37780 pat = GEN_FCN (icode) (real_target, args[0].op, args[1].op,
37784 pat = GEN_FCN (icode) (real_target, args[0].op, args[1].op,
37788 pat = GEN_FCN (icode) (real_target, args[0].op, args[1].op,
37791 pat = GEN_FCN (icode) (real_target, args[0].op, args[1].op,
37799 if (! pat)
37802 emit_insn (pat);
37824 ix86_erase_embedded_rounding (rtx pat)
37826 if (GET_CODE (pat) == INSN)
37827 pat = PATTERN (pat);
37829 gcc_assert (GET_CODE (pat) == PARALLEL);
37831 if (XVECLEN (pat, 0) == 2)
37833 rtx p0 = XVECEXP (pat, 0, 0);
37834 rtx p1 = XVECEXP (pat, 0, 1);
37844 rtx *res = XALLOCAVEC (rtx, XVECLEN (pat, 0));
37848 for (; i < XVECLEN (pat, 0); ++i)
37850 rtx elem = XVECEXP (pat, 0, i);
37857 gcc_assert (j >= XVECLEN (pat, 0) - 1);
37859 return gen_rtx_PARALLEL (GET_MODE (pat), gen_rtvec_v (j, res));
37869 rtx pat, set_dst;
37941 pat = GEN_FCN (icode) (op0, op1, op3);
37942 if (! pat)
37948 pat = ix86_erase_embedded_rounding (pat);
37949 if (! pat)
37952 set_dst = SET_DEST (pat);
37956 gcc_assert (GET_CODE (XVECEXP (pat, 0, 0)) == SET);
37957 set_dst = SET_DEST (XVECEXP (pat, 0, 0));
37960 emit_insn (pat);
37974 rtx pat;
38149 pat = GEN_FCN (icode) (target, args[0].op);
38152 pat = GEN_FCN (icode) (target, args[0].op, args[1].op);
38155 pat = GEN_FCN (icode) (target, args[0].op, args[1].op,
38159 pat = GEN_FCN (icode) (target, args[0].op, args[1].op,
38163 pat = GEN_FCN (icode) (target, args[0].op, args[1].op,
38166 pat = GEN_FCN (icode) (target, args[0].op, args[1].op,
38174 if (!pat)
38178 pat = ix86_erase_embedded_rounding (pat);
38180 emit_insn (pat);
38192 rtx pat, op;
38556 pat = GEN_FCN (icode) (target);
38559 pat = GEN_FCN (icode) (target, args[0].op);
38562 pat = GEN_FCN (icode) (target, args[0].op, args[1].op);
38565 pat = GEN_FCN (icode) (target, args[0].op, args[1].op, args[2].op);
38571 if (! pat)
38573 emit_insn (pat);
38745 rtx op0, op1, op2, op3, op4, pat, insn;
39157 pat = GEN_FCN (icode) (op0, op1, op2);
39158 if (! pat)
39160 emit_insn (pat);
39400 pat = GEN_FCN (icode) (op0);
39401 if (pat)
39402 emit_insn (pat);
39479 pat = GEN_FCN (icode) (op0, op1, op2);
39506 pat = GEN_FCN (icode) (op0, op1);
39509 if (pat)
39510 emit_insn (pat);
39550 pat = GEN_FCN (icode) (target, op0, op1, op2);
39551 if (pat)
39552 emit_insn (pat);
39601 pat = gen_rtx_GEU (VOIDmode, gen_rtx_REG (CCCmode, FLAGS_REG),
39604 gen_rtx_IF_THEN_ELSE (SImode, pat, op2, op1)));
39636 pat = gen_rtx_LTU (QImode, gen_rtx_REG (CCCmode, FLAGS_REG),
39638 emit_insn (gen_rtx_SET (VOIDmode, op2, pat));
39697 pat = gen_rtx_LTU (mode0, op1, const0_rtx);
39698 emit_insn (GEN_FCN (icode) (op0, op2, op3, op1, pat));
39704 PUT_MODE (pat, QImode);
39705 emit_insn (gen_rtx_SET (VOIDmode, target, pat));
40210 pat = GEN_FCN (icode) (subtarget, op0, op1, op2, op3, op4);
40211 if (! pat)
40213 emit_insn (pat);
40294 pat = GEN_FCN (icode) (op0, op1, op2, op3, op4);
40295 if (! pat)
40298 emit_insn (pat);
40353 pat = GEN_FCN (icode) (op0, op1, op2, op3, op4);
40354 if (! pat)
40357 emit_insn (pat);