config/alpha/alpha.c

68 #include "target.h"
69 #include "target-def.h"
70 #include "common/common-target.h"
376 /* Parse target option strings.  */
1257   /* Can't do indirect tail calls, since we don't know if the target
1262   /* Otherwise, we can make a tail call if the target function shares
1768 alpha_emit_set_const_1 (rtx target, machine_mode mode,
1775     = (flag_expensive_optimizations && can_create_pseudo_p () ? 0 : target);
1802 	  /* We used to use copy_to_suggested_reg (GEN_INT (c), target, mode)
1810 	  if (target == NULL)
1811 	    target = gen_reg_rtx (mode);
1812 	  emit_insn (gen_rtx_SET (VOIDmode, target, GEN_INT (c)));
1813 	  return target;
1821 	      emit_insn (gen_rtx_SET (VOIDmode, target, GEN_INT (high << 16)));
1822 	      temp = target;
1844 	  if (target == NULL)
1845 	    target = gen_reg_rtx (mode);
1847 	  insn = gen_rtx_SET (VOIDmode, target, insn);
1849 	  return target;
1879 				   target, 0, OPTAB_WIDEN);
1889 	  return expand_unop (mode, one_cmpl_optab, temp, target, 0);
1918 				     target, 0, OPTAB_WIDEN);
1946 				     target, 1, OPTAB_WIDEN);
1972 				     target, 0, OPTAB_WIDEN);
1978   /* Finally, see if can load a value into the target that is the same as the
2001 			       target, 0, OPTAB_WIDEN);
2016 alpha_emit_set_const (rtx target, machine_mode mode,
2020   rtx orig_target = target;
2027       && REG_P (target) && REGNO (target) < FIRST_PSEUDO_REGISTER)
2029       result = alpha_emit_set_const_1 (target, mode, c, 1, no_output);
2033       target = no_output ? NULL : gen_lowpart (DImode, target);
2038       target = no_output ? NULL : gen_lowpart (DImode, target);
2045       result = alpha_emit_set_const_1 (target, mode, c, i, no_output);
2065       if (result == target)
2080 alpha_emit_set_long_const (rtx target, HOST_WIDE_INT c1, HOST_WIDE_INT c2)
2110       emit_move_insn (target, GEN_INT (d4));
2112 	emit_move_insn (target, gen_rtx_PLUS (DImode, target, GEN_INT (d3)));
2115     emit_move_insn (target, GEN_INT (d3));
2118   emit_move_insn (target, gen_rtx_ASHIFT (DImode, target, GEN_INT (32)));
2122     emit_move_insn (target, gen_rtx_PLUS (DImode, target, GEN_INT (d2)));
2124     emit_move_insn (target, gen_rtx_PLUS (DImode, target, GEN_INT (d1)));
2126   return target;
2928   rtx target, subtarget, tmp;
2943   subtarget = target = dest;
2946       target = gen_lowpart (DImode, dest);
2950 	subtarget = target;
2952   /* Below, we must be careful to use copy_rtx on target and subtarget
2967       emit_insn (gen_rtx_SET (VOIDmode, target, tmp));
2974       emit_insn (gen_negdi2 (target, copy_rtx (subtarget)));
2984 	emit_insn (gen_adddi3 (target, copy_rtx (subtarget), GEN_INT (f)));
2993 	      emit_insn (gen_rtx_SET (VOIDmode, target, tmp));
3123 alpha_emit_xfloating_libcall (rtx func, rtx target, rtx operands[],
3161   switch (GET_MODE (target))
3185   emit_libcall_block (tmp, target, reg, equiv);
3500       /* We must use tgt here for the target.  Alpha-vms port fails if we use
3501 	 addr for the target, because addr is marked as a pointer and combine
4951 alpha_expand_builtin_establish_vms_condition_handler (rtx target, rtx handler)
4959   emit_move_insn (target, handler_slot);
4973 alpha_expand_builtin_revert_vms_condition_handler (rtx target)
4980   alpha_expand_builtin_establish_vms_condition_handler (target, const0_rtx);
5621    M_TRAMP.  FNDECL is target function's decl.  CHAIN_VALUE is an rtx
6726    SUBTARGET may be used as the target for computing one of EXP's operands.
6730 alpha_expand_builtin (tree exp, rtx target,
6776       if (!target
6777 	  || GET_MODE (target) != tmode
6778 	  || !(*insn_data[icode].operand[0].predicate) (target, tmode))
6779 	target = gen_reg_rtx (tmode);
6785       pat = GEN_FCN (icode) (target);
6789         pat = GEN_FCN (icode) (target, op[0]);
6794       pat = GEN_FCN (icode) (target, op[0], op[1]);
6804     return target;
8541   /* Generate a tail call to the target function.  */
8920    that are marked "fake".  These instructions do not exist on that target,
9982 /* Initialize the GCC target structure.  */