Lines Matching refs:to2
11 vaddpd (%rcx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
16 vaddpd 1016(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
17 vaddpd 1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
18 vaddpd -1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
19 vaddpd -1032(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
97 vblendmpd (%rcx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
102 vblendmpd 1016(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
103 vblendmpd 1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
104 vblendmpd -1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
105 vblendmpd -1032(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
202 vcmppd $123, (%rcx){1to2}, %xmm29, %k5 # AVX512{F,VL}
207 vcmppd $123, 1016(%rdx){1to2}, %xmm29, %k5 # AVX512{F,VL} Disp8
208 vcmppd $123, 1024(%rdx){1to2}, %xmm29, %k5 # AVX512{F,VL}
209 vcmppd $123, -1024(%rdx){1to2}, %xmm29, %k5 # AVX512{F,VL} Disp8
210 vcmppd $123, -1032(%rdx){1to2}, %xmm29, %k5 # AVX512{F,VL}
298 vcvtdq2pd (%rcx){1to2}, %xmm30 # AVX512{F,VL}
303 vcvtdq2pd 508(%rdx){1to2}, %xmm30 # AVX512{F,VL} Disp8
304 vcvtdq2pd 512(%rdx){1to2}, %xmm30 # AVX512{F,VL}
305 vcvtdq2pd -512(%rdx){1to2}, %xmm30 # AVX512{F,VL} Disp8
306 vcvtdq2pd -516(%rdx){1to2}, %xmm30 # AVX512{F,VL}
354 vcvtpd2dq (%rcx){1to2}, %xmm30 # AVX512{F,VL}
359 vcvtpd2dqx 1016(%rdx){1to2}, %xmm30 # AVX512{F,VL} Disp8
360 vcvtpd2dqx 1024(%rdx){1to2}, %xmm30 # AVX512{F,VL}
361 vcvtpd2dqx -1024(%rdx){1to2}, %xmm30 # AVX512{F,VL} Disp8
362 vcvtpd2dqx -1032(%rdx){1to2}, %xmm30 # AVX512{F,VL}
382 vcvtpd2ps (%rcx){1to2}, %xmm30 # AVX512{F,VL}
387 vcvtpd2psx 1016(%rdx){1to2}, %xmm30 # AVX512{F,VL} Disp8
388 vcvtpd2psx 1024(%rdx){1to2}, %xmm30 # AVX512{F,VL}
389 vcvtpd2psx -1024(%rdx){1to2}, %xmm30 # AVX512{F,VL} Disp8
390 vcvtpd2psx -1032(%rdx){1to2}, %xmm30 # AVX512{F,VL}
410 vcvtpd2udq (%rcx){1to2}, %xmm30 # AVX512{F,VL}
415 vcvtpd2udqx 1016(%rdx){1to2}, %xmm30 # AVX512{F,VL} Disp8
416 vcvtpd2udqx 1024(%rdx){1to2}, %xmm30 # AVX512{F,VL}
417 vcvtpd2udqx -1024(%rdx){1to2}, %xmm30 # AVX512{F,VL} Disp8
418 vcvtpd2udqx -1032(%rdx){1to2}, %xmm30 # AVX512{F,VL}
484 vcvtps2pd (%rcx){1to2}, %xmm30 # AVX512{F,VL}
489 vcvtps2pd 508(%rdx){1to2}, %xmm30 # AVX512{F,VL} Disp8
490 vcvtps2pd 512(%rdx){1to2}, %xmm30 # AVX512{F,VL}
491 vcvtps2pd -512(%rdx){1to2}, %xmm30 # AVX512{F,VL} Disp8
492 vcvtps2pd -516(%rdx){1to2}, %xmm30 # AVX512{F,VL}
548 vcvttpd2dq (%rcx){1to2}, %xmm30 # AVX512{F,VL}
553 vcvttpd2dqx 1016(%rdx){1to2}, %xmm30 # AVX512{F,VL} Disp8
554 vcvttpd2dqx 1024(%rdx){1to2}, %xmm30 # AVX512{F,VL}
555 vcvttpd2dqx -1024(%rdx){1to2}, %xmm30 # AVX512{F,VL} Disp8
556 vcvttpd2dqx -1032(%rdx){1to2}, %xmm30 # AVX512{F,VL}
604 vcvtudq2pd (%rcx){1to2}, %xmm30 # AVX512{F,VL}
609 vcvtudq2pd 508(%rdx){1to2}, %xmm30 # AVX512{F,VL} Disp8
610 vcvtudq2pd 512(%rdx){1to2}, %xmm30 # AVX512{F,VL}
611 vcvtudq2pd -512(%rdx){1to2}, %xmm30 # AVX512{F,VL} Disp8
612 vcvtudq2pd -516(%rdx){1to2}, %xmm30 # AVX512{F,VL}
660 vdivpd (%rcx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
665 vdivpd 1016(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
666 vdivpd 1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
667 vdivpd -1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
668 vdivpd -1032(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
768 vfmadd132pd (%rcx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
773 vfmadd132pd 1016(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
774 vfmadd132pd 1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
775 vfmadd132pd -1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
776 vfmadd132pd -1032(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
824 vfmadd213pd (%rcx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
829 vfmadd213pd 1016(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
830 vfmadd213pd 1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
831 vfmadd213pd -1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
832 vfmadd213pd -1032(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
880 vfmadd231pd (%rcx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
885 vfmadd231pd 1016(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
886 vfmadd231pd 1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
887 vfmadd231pd -1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
888 vfmadd231pd -1032(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
936 vfmaddsub132pd (%rcx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
941 vfmaddsub132pd 1016(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
942 vfmaddsub132pd 1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
943 vfmaddsub132pd -1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
944 vfmaddsub132pd -1032(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
992 vfmaddsub213pd (%rcx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
997 vfmaddsub213pd 1016(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
998 vfmaddsub213pd 1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
999 vfmaddsub213pd -1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
1000 vfmaddsub213pd -1032(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
1048 vfmaddsub231pd (%rcx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
1053 vfmaddsub231pd 1016(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
1054 vfmaddsub231pd 1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
1055 vfmaddsub231pd -1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
1056 vfmaddsub231pd -1032(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
1104 vfmsub132pd (%rcx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
1109 vfmsub132pd 1016(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
1110 vfmsub132pd 1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
1111 vfmsub132pd -1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
1112 vfmsub132pd -1032(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
1160 vfmsub213pd (%rcx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
1165 vfmsub213pd 1016(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
1166 vfmsub213pd 1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
1167 vfmsub213pd -1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
1168 vfmsub213pd -1032(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
1216 vfmsub231pd (%rcx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
1221 vfmsub231pd 1016(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
1222 vfmsub231pd 1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
1223 vfmsub231pd -1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
1224 vfmsub231pd -1032(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
1272 vfmsubadd132pd (%rcx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
1277 vfmsubadd132pd 1016(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
1278 vfmsubadd132pd 1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
1279 vfmsubadd132pd -1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
1280 vfmsubadd132pd -1032(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
1328 vfmsubadd213pd (%rcx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
1333 vfmsubadd213pd 1016(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
1334 vfmsubadd213pd 1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
1335 vfmsubadd213pd -1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
1336 vfmsubadd213pd -1032(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
1384 vfmsubadd231pd (%rcx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
1389 vfmsubadd231pd 1016(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
1390 vfmsubadd231pd 1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
1391 vfmsubadd231pd -1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
1392 vfmsubadd231pd -1032(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
1440 vfnmadd132pd (%rcx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
1445 vfnmadd132pd 1016(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
1446 vfnmadd132pd 1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
1447 vfnmadd132pd -1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
1448 vfnmadd132pd -1032(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
1496 vfnmadd213pd (%rcx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
1501 vfnmadd213pd 1016(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
1502 vfnmadd213pd 1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
1503 vfnmadd213pd -1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
1504 vfnmadd213pd -1032(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
1552 vfnmadd231pd (%rcx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
1557 vfnmadd231pd 1016(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
1558 vfnmadd231pd 1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
1559 vfnmadd231pd -1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
1560 vfnmadd231pd -1032(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
1608 vfnmsub132pd (%rcx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
1613 vfnmsub132pd 1016(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
1614 vfnmsub132pd 1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
1615 vfnmsub132pd -1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
1616 vfnmsub132pd -1032(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
1664 vfnmsub213pd (%rcx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
1669 vfnmsub213pd 1016(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
1670 vfnmsub213pd 1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
1671 vfnmsub213pd -1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
1672 vfnmsub213pd -1032(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
1720 vfnmsub231pd (%rcx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
1725 vfnmsub231pd 1016(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
1726 vfnmsub231pd 1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
1727 vfnmsub231pd -1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
1728 vfnmsub231pd -1032(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
1800 vgetexppd (%rcx){1to2}, %xmm30 # AVX512{F,VL}
1805 vgetexppd 1016(%rdx){1to2}, %xmm30 # AVX512{F,VL} Disp8
1806 vgetexppd 1024(%rdx){1to2}, %xmm30 # AVX512{F,VL}
1807 vgetexppd -1024(%rdx){1to2}, %xmm30 # AVX512{F,VL} Disp8
1808 vgetexppd -1032(%rdx){1to2}, %xmm30 # AVX512{F,VL}
1857 vgetmantpd $123, (%rcx){1to2}, %xmm30 # AVX512{F,VL}
1862 vgetmantpd $123, 1016(%rdx){1to2}, %xmm30 # AVX512{F,VL} Disp8
1863 vgetmantpd $123, 1024(%rdx){1to2}, %xmm30 # AVX512{F,VL}
1864 vgetmantpd $123, -1024(%rdx){1to2}, %xmm30 # AVX512{F,VL} Disp8
1865 vgetmantpd $123, -1032(%rdx){1to2}, %xmm30 # AVX512{F,VL}
1936 vmaxpd (%rcx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
1941 vmaxpd 1016(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
1942 vmaxpd 1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
1943 vmaxpd -1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
1944 vmaxpd -1032(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
1992 vminpd (%rcx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
1997 vminpd 1016(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
1998 vminpd 1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
1999 vminpd -1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
2000 vminpd -1032(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
2294 vmulpd (%rcx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
2299 vmulpd 1016(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
2300 vmulpd 1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
2301 vmulpd -1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
2302 vmulpd -1032(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
2378 vpabsq (%rcx){1to2}, %xmm30 # AVX512{F,VL}
2383 vpabsq 1016(%rdx){1to2}, %xmm30 # AVX512{F,VL} Disp8
2384 vpabsq 1024(%rdx){1to2}, %xmm30 # AVX512{F,VL}
2385 vpabsq -1024(%rdx){1to2}, %xmm30 # AVX512{F,VL} Disp8
2386 vpabsq -1032(%rdx){1to2}, %xmm30 # AVX512{F,VL}
2434 vpaddq (%rcx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
2439 vpaddq 1016(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
2440 vpaddq 1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
2441 vpaddq -1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
2442 vpaddq -1032(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
2518 vpandnq (%rcx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
2523 vpandnq 1016(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
2524 vpandnq 1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
2525 vpandnq -1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
2526 vpandnq -1032(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
2546 vpandq (%rcx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
2551 vpandq 1016(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
2552 vpandq 1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
2553 vpandq -1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
2554 vpandq -1032(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
2717 vpcmpeqq (%rcx){1to2}, %xmm30, %k5 # AVX512{F,VL}
2722 vpcmpeqq 1016(%rdx){1to2}, %xmm30, %k5 # AVX512{F,VL} Disp8
2723 vpcmpeqq 1024(%rdx){1to2}, %xmm30, %k5 # AVX512{F,VL}
2724 vpcmpeqq -1024(%rdx){1to2}, %xmm30, %k5 # AVX512{F,VL} Disp8
2725 vpcmpeqq -1032(%rdx){1to2}, %xmm30, %k5 # AVX512{F,VL}
2769 vpcmpgtq (%rcx){1to2}, %xmm30, %k5 # AVX512{F,VL}
2774 vpcmpgtq 1016(%rdx){1to2}, %xmm30, %k5 # AVX512{F,VL} Disp8
2775 vpcmpgtq 1024(%rdx){1to2}, %xmm30, %k5 # AVX512{F,VL}
2776 vpcmpgtq -1024(%rdx){1to2}, %xmm30, %k5 # AVX512{F,VL} Disp8
2777 vpcmpgtq -1032(%rdx){1to2}, %xmm30, %k5 # AVX512{F,VL}
2796 vpcmpq $123, (%rcx){1to2}, %xmm30, %k5 # AVX512{F,VL}
2801 vpcmpq $123, 1016(%rdx){1to2}, %xmm30, %k5 # AVX512{F,VL} Disp8
2802 vpcmpq $123, 1024(%rdx){1to2}, %xmm30, %k5 # AVX512{F,VL}
2803 vpcmpq $123, -1024(%rdx){1to2}, %xmm30, %k5 # AVX512{F,VL} Disp8
2804 vpcmpq $123, -1032(%rdx){1to2}, %xmm30, %k5 # AVX512{F,VL}
2852 vpcmpuq $123, (%rcx){1to2}, %xmm30, %k5 # AVX512{F,VL}
2857 vpcmpuq $123, 1016(%rdx){1to2}, %xmm30, %k5 # AVX512{F,VL} Disp8
2858 vpcmpuq $123, 1024(%rdx){1to2}, %xmm30, %k5 # AVX512{F,VL}
2859 vpcmpuq $123, -1024(%rdx){1to2}, %xmm30, %k5 # AVX512{F,VL} Disp8
2860 vpcmpuq $123, -1032(%rdx){1to2}, %xmm30, %k5 # AVX512{F,VL}
2880 vpblendmq (%rcx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
2885 vpblendmq 1016(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
2886 vpblendmq 1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
2887 vpblendmq -1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
2888 vpblendmq -1032(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
2943 vpermilpd $123, (%rcx){1to2}, %xmm30 # AVX512{F,VL}
2948 vpermilpd $123, 1016(%rdx){1to2}, %xmm30 # AVX512{F,VL} Disp8
2949 vpermilpd $123, 1024(%rdx){1to2}, %xmm30 # AVX512{F,VL}
2950 vpermilpd $123, -1024(%rdx){1to2}, %xmm30 # AVX512{F,VL} Disp8
2951 vpermilpd $123, -1032(%rdx){1to2}, %xmm30 # AVX512{F,VL}
2972 vpermilpd (%rcx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
2977 vpermilpd 1016(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
2978 vpermilpd 1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
2979 vpermilpd -1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
2980 vpermilpd -1032(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
3198 vpmaxsq (%rcx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
3203 vpmaxsq 1016(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
3204 vpmaxsq 1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
3205 vpmaxsq -1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
3206 vpmaxsq -1032(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
3254 vpmaxuq (%rcx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
3259 vpmaxuq 1016(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
3260 vpmaxuq 1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
3261 vpmaxuq -1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
3262 vpmaxuq -1032(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
3310 vpminsq (%rcx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
3315 vpminsq 1016(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
3316 vpminsq 1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
3317 vpminsq -1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
3318 vpminsq -1032(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
3366 vpminuq (%rcx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
3371 vpminuq 1016(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
3372 vpminuq 1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
3373 vpminuq -1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
3374 vpminuq -1032(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
3574 vpmuldq (%rcx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
3579 vpmuldq 1016(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
3580 vpmuldq 1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
3581 vpmuldq -1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
3582 vpmuldq -1032(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
3630 vpmuludq (%rcx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
3635 vpmuludq 1016(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
3636 vpmuludq 1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
3637 vpmuludq -1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
3638 vpmuludq -1032(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
3686 vporq (%rcx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
3691 vporq 1016(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
3692 vporq 1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
3693 vporq -1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
3694 vporq -1032(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
3840 vpsllvq (%rcx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
3845 vpsllvq 1016(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
3846 vpsllvq 1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
3847 vpsllvq -1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
3848 vpsllvq -1032(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
3932 vpsravq (%rcx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
3937 vpsravq 1016(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
3938 vpsravq 1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
3939 vpsravq -1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
3940 vpsravq -1032(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
4024 vpsrlvq (%rcx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
4029 vpsrlvq 1016(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
4030 vpsrlvq 1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
4031 vpsrlvq -1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
4032 vpsrlvq -1032(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
4083 vpsrlq $123, (%rcx){1to2}, %xmm30 # AVX512{F,VL}
4088 vpsrlq $123, 1016(%rdx){1to2}, %xmm30 # AVX512{F,VL} Disp8
4089 vpsrlq $123, 1024(%rdx){1to2}, %xmm30 # AVX512{F,VL}
4090 vpsrlq $123, -1024(%rdx){1to2}, %xmm30 # AVX512{F,VL} Disp8
4091 vpsrlq $123, -1032(%rdx){1to2}, %xmm30 # AVX512{F,VL}
4140 vpsubq (%rcx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
4145 vpsubq 1016(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
4146 vpsubq 1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
4147 vpsubq -1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
4148 vpsubq -1032(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
4193 vptestmq (%rcx){1to2}, %xmm30, %k5 # AVX512{F,VL}
4198 vptestmq 1016(%rdx){1to2}, %xmm30, %k5 # AVX512{F,VL} Disp8
4199 vptestmq 1024(%rdx){1to2}, %xmm30, %k5 # AVX512{F,VL}
4200 vptestmq -1024(%rdx){1to2}, %xmm30, %k5 # AVX512{F,VL} Disp8
4201 vptestmq -1032(%rdx){1to2}, %xmm30, %k5 # AVX512{F,VL}
4248 vpunpckhqdq (%rcx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
4253 vpunpckhqdq 1016(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
4254 vpunpckhqdq 1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
4255 vpunpckhqdq -1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
4256 vpunpckhqdq -1032(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
4304 vpunpcklqdq (%rcx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
4309 vpunpcklqdq 1016(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
4310 vpunpcklqdq 1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
4311 vpunpcklqdq -1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
4312 vpunpcklqdq -1032(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
4360 vpxorq (%rcx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
4365 vpxorq 1016(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
4366 vpxorq 1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
4367 vpxorq -1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
4368 vpxorq -1032(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
4388 vrcp14pd (%rcx){1to2}, %xmm30 # AVX512{F,VL}
4393 vrcp14pd 1016(%rdx){1to2}, %xmm30 # AVX512{F,VL} Disp8
4394 vrcp14pd 1024(%rdx){1to2}, %xmm30 # AVX512{F,VL}
4395 vrcp14pd -1024(%rdx){1to2}, %xmm30 # AVX512{F,VL} Disp8
4396 vrcp14pd -1032(%rdx){1to2}, %xmm30 # AVX512{F,VL}
4444 vrsqrt14pd (%rcx){1to2}, %xmm30 # AVX512{F,VL}
4449 vrsqrt14pd 1016(%rdx){1to2}, %xmm30 # AVX512{F,VL} Disp8
4450 vrsqrt14pd 1024(%rdx){1to2}, %xmm30 # AVX512{F,VL}
4451 vrsqrt14pd -1024(%rdx){1to2}, %xmm30 # AVX512{F,VL} Disp8
4452 vrsqrt14pd -1032(%rdx){1to2}, %xmm30 # AVX512{F,VL}
4533 vshufpd $123, (%rcx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
4538 vshufpd $123, 1016(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
4539 vshufpd $123, 1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
4540 vshufpd $123, -1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
4541 vshufpd $123, -1032(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
4592 vsqrtpd (%rcx){1to2}, %xmm30 # AVX512{F,VL}
4597 vsqrtpd 1016(%rdx){1to2}, %xmm30 # AVX512{F,VL} Disp8
4598 vsqrtpd 1024(%rdx){1to2}, %xmm30 # AVX512{F,VL}
4599 vsqrtpd -1024(%rdx){1to2}, %xmm30 # AVX512{F,VL} Disp8
4600 vsqrtpd -1032(%rdx){1to2}, %xmm30 # AVX512{F,VL}
4648 vsubpd (%rcx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
4653 vsubpd 1016(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
4654 vsubpd 1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
4655 vsubpd -1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
4656 vsubpd -1032(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
4704 vunpckhpd (%rcx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
4709 vunpckhpd 1016(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
4710 vunpckhpd 1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
4711 vunpckhpd -1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
4712 vunpckhpd -1032(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
4760 vunpcklpd (%rcx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
4765 vunpcklpd 1016(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
4766 vunpcklpd 1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
4767 vunpcklpd -1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
4768 vunpcklpd -1032(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
4847 vpternlogq $123, (%rcx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
4852 vpternlogq $123, 1016(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
4853 vpternlogq $123, 1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
4854 vpternlogq $123, -1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
4855 vpternlogq $123, -1032(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
5082 vpermt2q (%rcx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
5087 vpermt2q 1016(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
5088 vpermt2q 1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
5089 vpermt2q -1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
5090 vpermt2q -1032(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
5138 vpermt2pd (%rcx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
5143 vpermt2pd 1016(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
5144 vpermt2pd 1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
5145 vpermt2pd -1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
5146 vpermt2pd -1032(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
5167 valignq $123, (%rcx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
5172 valignq $123, 1016(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
5173 valignq $123, 1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
5174 valignq $123, -1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
5175 valignq $123, -1032(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
5196 vscalefpd (%rcx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
5201 vscalefpd 1016(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
5202 vscalefpd 1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
5203 vscalefpd -1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
5204 vscalefpd -1032(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
5253 vfixupimmpd $123, (%rcx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
5258 vfixupimmpd $123, 1016(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
5259 vfixupimmpd $123, 1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
5260 vfixupimmpd $123, -1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
5261 vfixupimmpd $123, -1032(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
5343 vpsllq $123, (%rcx){1to2}, %xmm30 # AVX512{F,VL}
5348 vpsllq $123, 1016(%rdx){1to2}, %xmm30 # AVX512{F,VL} Disp8
5349 vpsllq $123, 1024(%rdx){1to2}, %xmm30 # AVX512{F,VL}
5350 vpsllq $123, -1024(%rdx){1to2}, %xmm30 # AVX512{F,VL} Disp8
5351 vpsllq $123, -1032(%rdx){1to2}, %xmm30 # AVX512{F,VL}
5403 vpsraq $123, (%rcx){1to2}, %xmm30 # AVX512{F,VL}
5408 vpsraq $123, 1016(%rdx){1to2}, %xmm30 # AVX512{F,VL} Disp8
5409 vpsraq $123, 1024(%rdx){1to2}, %xmm30 # AVX512{F,VL}
5410 vpsraq $123, -1024(%rdx){1to2}, %xmm30 # AVX512{F,VL} Disp8
5411 vpsraq $123, -1032(%rdx){1to2}, %xmm30 # AVX512{F,VL}
5490 vprolvq (%rcx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
5495 vprolvq 1016(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
5496 vprolvq 1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
5497 vprolvq -1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
5498 vprolvq -1032(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
5519 vprolq $123, (%rcx){1to2}, %xmm30 # AVX512{F,VL}
5524 vprolq $123, 1016(%rdx){1to2}, %xmm30 # AVX512{F,VL} Disp8
5525 vprolq $123, 1024(%rdx){1to2}, %xmm30 # AVX512{F,VL}
5526 vprolq $123, -1024(%rdx){1to2}, %xmm30 # AVX512{F,VL} Disp8
5527 vprolq $123, -1032(%rdx){1to2}, %xmm30 # AVX512{F,VL}
5606 vprorvq (%rcx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
5611 vprorvq 1016(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
5612 vprorvq 1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
5613 vprorvq -1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
5614 vprorvq -1032(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
5635 vprorq $123, (%rcx){1to2}, %xmm30 # AVX512{F,VL}
5640 vprorq $123, 1016(%rdx){1to2}, %xmm30 # AVX512{F,VL} Disp8
5641 vprorq $123, 1024(%rdx){1to2}, %xmm30 # AVX512{F,VL}
5642 vprorq $123, -1024(%rdx){1to2}, %xmm30 # AVX512{F,VL} Disp8
5643 vprorq $123, -1032(%rdx){1to2}, %xmm30 # AVX512{F,VL}
5665 vrndscalepd $123, (%rcx){1to2}, %xmm30 # AVX512{F,VL}
5670 vrndscalepd $123, 1016(%rdx){1to2}, %xmm30 # AVX512{F,VL} Disp8
5671 vrndscalepd $123, 1024(%rdx){1to2}, %xmm30 # AVX512{F,VL}
5672 vrndscalepd $123, -1024(%rdx){1to2}, %xmm30 # AVX512{F,VL} Disp8
5673 vrndscalepd $123, -1032(%rdx){1to2}, %xmm30 # AVX512{F,VL}
6098 vcvttpd2udqx (%rcx){1to2}, %xmm30 # AVX512{F,VL}
6103 vcvttpd2udqx 1016(%rdx){1to2}, %xmm30 # AVX512{F,VL} Disp8
6104 vcvttpd2udqx 1024(%rdx){1to2}, %xmm30 # AVX512{F,VL}
6105 vcvttpd2udqx -1024(%rdx){1to2}, %xmm30 # AVX512{F,VL} Disp8
6106 vcvttpd2udqx -1032(%rdx){1to2}, %xmm30 # AVX512{F,VL}
6182 vpermi2q (%rcx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
6187 vpermi2q 1016(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
6188 vpermi2q 1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
6189 vpermi2q -1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
6190 vpermi2q -1032(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
6238 vpermi2pd (%rcx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
6243 vpermi2pd 1016(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
6244 vpermi2pd 1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
6245 vpermi2pd -1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL} Disp8
6246 vpermi2pd -1032(%rdx){1to2}, %xmm29, %xmm30 # AVX512{F,VL}
6291 vptestnmq (%rcx){1to2}, %xmm29, %k5 # AVX512{F,VL}
6296 vptestnmq 1016(%rdx){1to2}, %xmm29, %k5 # AVX512{F,VL} Disp8
6297 vptestnmq 1024(%rdx){1to2}, %xmm29, %k5 # AVX512{F,VL}
6298 vptestnmq -1024(%rdx){1to2}, %xmm29, %k5 # AVX512{F,VL} Disp8
6299 vptestnmq -1032(%rdx){1to2}, %xmm29, %k5 # AVX512{F,VL}
6320 vaddpd xmm30, xmm29, [rcx]{1to2} # AVX512{F,VL}
6325 vaddpd xmm30, xmm29, [rdx+1016]{1to2} # AVX512{F,VL} Disp8
6326 vaddpd xmm30, xmm29, [rdx+1024]{1to2} # AVX512{F,VL}
6327 vaddpd xmm30, xmm29, [rdx-1024]{1to2} # AVX512{F,VL} Disp8
6328 vaddpd xmm30, xmm29, [rdx-1032]{1to2} # AVX512{F,VL}
6406 vblendmpd xmm30, xmm29, [rcx]{1to2} # AVX512{F,VL}
6411 vblendmpd xmm30, xmm29, [rdx+1016]{1to2} # AVX512{F,VL} Disp8
6412 vblendmpd xmm30, xmm29, [rdx+1024]{1to2} # AVX512{F,VL}
6413 vblendmpd xmm30, xmm29, [rdx-1024]{1to2} # AVX512{F,VL} Disp8
6414 vblendmpd xmm30, xmm29, [rdx-1032]{1to2} # AVX512{F,VL}
6511 vcmppd k5, xmm29, [rcx]{1to2}, 123 # AVX512{F,VL}
6516 vcmppd k5, xmm29, [rdx+1016]{1to2}, 123 # AVX512{F,VL} Disp8
6517 vcmppd k5, xmm29, [rdx+1024]{1to2}, 123 # AVX512{F,VL}
6518 vcmppd k5, xmm29, [rdx-1024]{1to2}, 123 # AVX512{F,VL} Disp8
6519 vcmppd k5, xmm29, [rdx-1032]{1to2}, 123 # AVX512{F,VL}
6607 vcvtdq2pd xmm30, [rcx]{1to2} # AVX512{F,VL}
6612 vcvtdq2pd xmm30, [rdx+508]{1to2} # AVX512{F,VL} Disp8
6613 vcvtdq2pd xmm30, [rdx+512]{1to2} # AVX512{F,VL}
6614 vcvtdq2pd xmm30, [rdx-512]{1to2} # AVX512{F,VL} Disp8
6615 vcvtdq2pd xmm30, [rdx-516]{1to2} # AVX512{F,VL}
6663 vcvtpd2dq xmm30, [rcx]{1to2} # AVX512{F,VL}
6668 vcvtpd2dq xmm30, QWORD PTR [rdx+1016]{1to2} # AVX512{F,VL} Disp8
6669 vcvtpd2dq xmm30, QWORD PTR [rdx+1024]{1to2} # AVX512{F,VL}
6670 vcvtpd2dq xmm30, QWORD PTR [rdx-1024]{1to2} # AVX512{F,VL} Disp8
6671 vcvtpd2dq xmm30, QWORD PTR [rdx-1032]{1to2} # AVX512{F,VL}
6691 vcvtpd2ps xmm30, [rcx]{1to2} # AVX512{F,VL}
6696 vcvtpd2ps xmm30, QWORD PTR [rdx+1016]{1to2} # AVX512{F,VL} Disp8
6697 vcvtpd2ps xmm30, QWORD PTR [rdx+1024]{1to2} # AVX512{F,VL}
6698 vcvtpd2ps xmm30, QWORD PTR [rdx-1024]{1to2} # AVX512{F,VL} Disp8
6699 vcvtpd2ps xmm30, QWORD PTR [rdx-1032]{1to2} # AVX512{F,VL}
6719 vcvtpd2udq xmm30, [rcx]{1to2} # AVX512{F,VL}
6724 vcvtpd2udq xmm30, QWORD PTR [rdx+1016]{1to2} # AVX512{F,VL} Disp8
6725 vcvtpd2udq xmm30, QWORD PTR [rdx+1024]{1to2} # AVX512{F,VL}
6726 vcvtpd2udq xmm30, QWORD PTR [rdx-1024]{1to2} # AVX512{F,VL} Disp8
6727 vcvtpd2udq xmm30, QWORD PTR [rdx-1032]{1to2} # AVX512{F,VL}
6793 vcvtps2pd xmm30, [rcx]{1to2} # AVX512{F,VL}
6798 vcvtps2pd xmm30, [rdx+508]{1to2} # AVX512{F,VL} Disp8
6799 vcvtps2pd xmm30, [rdx+512]{1to2} # AVX512{F,VL}
6800 vcvtps2pd xmm30, [rdx-512]{1to2} # AVX512{F,VL} Disp8
6801 vcvtps2pd xmm30, [rdx-516]{1to2} # AVX512{F,VL}
6857 vcvttpd2dq xmm30, [rcx]{1to2} # AVX512{F,VL}
6862 vcvttpd2dq xmm30, QWORD PTR [rdx+1016]{1to2} # AVX512{F,VL} Disp8
6863 vcvttpd2dq xmm30, QWORD PTR [rdx+1024]{1to2} # AVX512{F,VL}
6864 vcvttpd2dq xmm30, QWORD PTR [rdx-1024]{1to2} # AVX512{F,VL} Disp8
6865 vcvttpd2dq xmm30, QWORD PTR [rdx-1032]{1to2} # AVX512{F,VL}
6913 vcvtudq2pd xmm30, [rcx]{1to2} # AVX512{F,VL}
6918 vcvtudq2pd xmm30, [rdx+508]{1to2} # AVX512{F,VL} Disp8
6919 vcvtudq2pd xmm30, [rdx+512]{1to2} # AVX512{F,VL}
6920 vcvtudq2pd xmm30, [rdx-512]{1to2} # AVX512{F,VL} Disp8
6921 vcvtudq2pd xmm30, [rdx-516]{1to2} # AVX512{F,VL}
6969 vdivpd xmm30, xmm29, [rcx]{1to2} # AVX512{F,VL}
6974 vdivpd xmm30, xmm29, [rdx+1016]{1to2} # AVX512{F,VL} Disp8
6975 vdivpd xmm30, xmm29, [rdx+1024]{1to2} # AVX512{F,VL}
6976 vdivpd xmm30, xmm29, [rdx-1024]{1to2} # AVX512{F,VL} Disp8
6977 vdivpd xmm30, xmm29, [rdx-1032]{1to2} # AVX512{F,VL}
7077 vfmadd132pd xmm30, xmm29, [rcx]{1to2} # AVX512{F,VL}
7082 vfmadd132pd xmm30, xmm29, [rdx+1016]{1to2} # AVX512{F,VL} Disp8
7083 vfmadd132pd xmm30, xmm29, [rdx+1024]{1to2} # AVX512{F,VL}
7084 vfmadd132pd xmm30, xmm29, [rdx-1024]{1to2} # AVX512{F,VL} Disp8
7085 vfmadd132pd xmm30, xmm29, [rdx-1032]{1to2} # AVX512{F,VL}
7133 vfmadd213pd xmm30, xmm29, [rcx]{1to2} # AVX512{F,VL}
7138 vfmadd213pd xmm30, xmm29, [rdx+1016]{1to2} # AVX512{F,VL} Disp8
7139 vfmadd213pd xmm30, xmm29, [rdx+1024]{1to2} # AVX512{F,VL}
7140 vfmadd213pd xmm30, xmm29, [rdx-1024]{1to2} # AVX512{F,VL} Disp8
7141 vfmadd213pd xmm30, xmm29, [rdx-1032]{1to2} # AVX512{F,VL}
7189 vfmadd231pd xmm30, xmm29, [rcx]{1to2} # AVX512{F,VL}
7194 vfmadd231pd xmm30, xmm29, [rdx+1016]{1to2} # AVX512{F,VL} Disp8
7195 vfmadd231pd xmm30, xmm29, [rdx+1024]{1to2} # AVX512{F,VL}
7196 vfmadd231pd xmm30, xmm29, [rdx-1024]{1to2} # AVX512{F,VL} Disp8
7197 vfmadd231pd xmm30, xmm29, [rdx-1032]{1to2} # AVX512{F,VL}
7245 vfmaddsub132pd xmm30, xmm29, [rcx]{1to2} # AVX512{F,VL}
7250 vfmaddsub132pd xmm30, xmm29, [rdx+1016]{1to2} # AVX512{F,VL} Disp8
7251 vfmaddsub132pd xmm30, xmm29, [rdx+1024]{1to2} # AVX512{F,VL}
7252 vfmaddsub132pd xmm30, xmm29, [rdx-1024]{1to2} # AVX512{F,VL} Disp8
7253 vfmaddsub132pd xmm30, xmm29, [rdx-1032]{1to2} # AVX512{F,VL}
7301 vfmaddsub213pd xmm30, xmm29, [rcx]{1to2} # AVX512{F,VL}
7306 vfmaddsub213pd xmm30, xmm29, [rdx+1016]{1to2} # AVX512{F,VL} Disp8
7307 vfmaddsub213pd xmm30, xmm29, [rdx+1024]{1to2} # AVX512{F,VL}
7308 vfmaddsub213pd xmm30, xmm29, [rdx-1024]{1to2} # AVX512{F,VL} Disp8
7309 vfmaddsub213pd xmm30, xmm29, [rdx-1032]{1to2} # AVX512{F,VL}
7357 vfmaddsub231pd xmm30, xmm29, [rcx]{1to2} # AVX512{F,VL}
7362 vfmaddsub231pd xmm30, xmm29, [rdx+1016]{1to2} # AVX512{F,VL} Disp8
7363 vfmaddsub231pd xmm30, xmm29, [rdx+1024]{1to2} # AVX512{F,VL}
7364 vfmaddsub231pd xmm30, xmm29, [rdx-1024]{1to2} # AVX512{F,VL} Disp8
7365 vfmaddsub231pd xmm30, xmm29, [rdx-1032]{1to2} # AVX512{F,VL}
7413 vfmsub132pd xmm30, xmm29, [rcx]{1to2} # AVX512{F,VL}
7418 vfmsub132pd xmm30, xmm29, [rdx+1016]{1to2} # AVX512{F,VL} Disp8
7419 vfmsub132pd xmm30, xmm29, [rdx+1024]{1to2} # AVX512{F,VL}
7420 vfmsub132pd xmm30, xmm29, [rdx-1024]{1to2} # AVX512{F,VL} Disp8
7421 vfmsub132pd xmm30, xmm29, [rdx-1032]{1to2} # AVX512{F,VL}
7469 vfmsub213pd xmm30, xmm29, [rcx]{1to2} # AVX512{F,VL}
7474 vfmsub213pd xmm30, xmm29, [rdx+1016]{1to2} # AVX512{F,VL} Disp8
7475 vfmsub213pd xmm30, xmm29, [rdx+1024]{1to2} # AVX512{F,VL}
7476 vfmsub213pd xmm30, xmm29, [rdx-1024]{1to2} # AVX512{F,VL} Disp8
7477 vfmsub213pd xmm30, xmm29, [rdx-1032]{1to2} # AVX512{F,VL}
7525 vfmsub231pd xmm30, xmm29, [rcx]{1to2} # AVX512{F,VL}
7530 vfmsub231pd xmm30, xmm29, [rdx+1016]{1to2} # AVX512{F,VL} Disp8
7531 vfmsub231pd xmm30, xmm29, [rdx+1024]{1to2} # AVX512{F,VL}
7532 vfmsub231pd xmm30, xmm29, [rdx-1024]{1to2} # AVX512{F,VL} Disp8
7533 vfmsub231pd xmm30, xmm29, [rdx-1032]{1to2} # AVX512{F,VL}
7581 vfmsubadd132pd xmm30, xmm29, [rcx]{1to2} # AVX512{F,VL}
7586 vfmsubadd132pd xmm30, xmm29, [rdx+1016]{1to2} # AVX512{F,VL} Disp8
7587 vfmsubadd132pd xmm30, xmm29, [rdx+1024]{1to2} # AVX512{F,VL}
7588 vfmsubadd132pd xmm30, xmm29, [rdx-1024]{1to2} # AVX512{F,VL} Disp8
7589 vfmsubadd132pd xmm30, xmm29, [rdx-1032]{1to2} # AVX512{F,VL}
7637 vfmsubadd213pd xmm30, xmm29, [rcx]{1to2} # AVX512{F,VL}
7642 vfmsubadd213pd xmm30, xmm29, [rdx+1016]{1to2} # AVX512{F,VL} Disp8
7643 vfmsubadd213pd xmm30, xmm29, [rdx+1024]{1to2} # AVX512{F,VL}
7644 vfmsubadd213pd xmm30, xmm29, [rdx-1024]{1to2} # AVX512{F,VL} Disp8
7645 vfmsubadd213pd xmm30, xmm29, [rdx-1032]{1to2} # AVX512{F,VL}
7693 vfmsubadd231pd xmm30, xmm29, [rcx]{1to2} # AVX512{F,VL}
7698 vfmsubadd231pd xmm30, xmm29, [rdx+1016]{1to2} # AVX512{F,VL} Disp8
7699 vfmsubadd231pd xmm30, xmm29, [rdx+1024]{1to2} # AVX512{F,VL}
7700 vfmsubadd231pd xmm30, xmm29, [rdx-1024]{1to2} # AVX512{F,VL} Disp8
7701 vfmsubadd231pd xmm30, xmm29, [rdx-1032]{1to2} # AVX512{F,VL}
7749 vfnmadd132pd xmm30, xmm29, [rcx]{1to2} # AVX512{F,VL}
7754 vfnmadd132pd xmm30, xmm29, [rdx+1016]{1to2} # AVX512{F,VL} Disp8
7755 vfnmadd132pd xmm30, xmm29, [rdx+1024]{1to2} # AVX512{F,VL}
7756 vfnmadd132pd xmm30, xmm29, [rdx-1024]{1to2} # AVX512{F,VL} Disp8
7757 vfnmadd132pd xmm30, xmm29, [rdx-1032]{1to2} # AVX512{F,VL}
7805 vfnmadd213pd xmm30, xmm29, [rcx]{1to2} # AVX512{F,VL}
7810 vfnmadd213pd xmm30, xmm29, [rdx+1016]{1to2} # AVX512{F,VL} Disp8
7811 vfnmadd213pd xmm30, xmm29, [rdx+1024]{1to2} # AVX512{F,VL}
7812 vfnmadd213pd xmm30, xmm29, [rdx-1024]{1to2} # AVX512{F,VL} Disp8
7813 vfnmadd213pd xmm30, xmm29, [rdx-1032]{1to2} # AVX512{F,VL}
7861 vfnmadd231pd xmm30, xmm29, [rcx]{1to2} # AVX512{F,VL}
7866 vfnmadd231pd xmm30, xmm29, [rdx+1016]{1to2} # AVX512{F,VL} Disp8
7867 vfnmadd231pd xmm30, xmm29, [rdx+1024]{1to2} # AVX512{F,VL}
7868 vfnmadd231pd xmm30, xmm29, [rdx-1024]{1to2} # AVX512{F,VL} Disp8
7869 vfnmadd231pd xmm30, xmm29, [rdx-1032]{1to2} # AVX512{F,VL}
7917 vfnmsub132pd xmm30, xmm29, [rcx]{1to2} # AVX512{F,VL}
7922 vfnmsub132pd xmm30, xmm29, [rdx+1016]{1to2} # AVX512{F,VL} Disp8
7923 vfnmsub132pd xmm30, xmm29, [rdx+1024]{1to2} # AVX512{F,VL}
7924 vfnmsub132pd xmm30, xmm29, [rdx-1024]{1to2} # AVX512{F,VL} Disp8
7925 vfnmsub132pd xmm30, xmm29, [rdx-1032]{1to2} # AVX512{F,VL}
7973 vfnmsub213pd xmm30, xmm29, [rcx]{1to2} # AVX512{F,VL}
7978 vfnmsub213pd xmm30, xmm29, [rdx+1016]{1to2} # AVX512{F,VL} Disp8
7979 vfnmsub213pd xmm30, xmm29, [rdx+1024]{1to2} # AVX512{F,VL}
7980 vfnmsub213pd xmm30, xmm29, [rdx-1024]{1to2} # AVX512{F,VL} Disp8
7981 vfnmsub213pd xmm30, xmm29, [rdx-1032]{1to2} # AVX512{F,VL}
8029 vfnmsub231pd xmm30, xmm29, [rcx]{1to2} # AVX512{F,VL}
8034 vfnmsub231pd xmm30, xmm29, [rdx+1016]{1to2} # AVX512{F,VL} Disp8
8035 vfnmsub231pd xmm30, xmm29, [rdx+1024]{1to2} # AVX512{F,VL}
8036 vfnmsub231pd xmm30, xmm29, [rdx-1024]{1to2} # AVX512{F,VL} Disp8
8037 vfnmsub231pd xmm30, xmm29, [rdx-1032]{1to2} # AVX512{F,VL}
8109 vgetexppd xmm30, [rcx]{1to2} # AVX512{F,VL}
8114 vgetexppd xmm30, [rdx+1016]{1to2} # AVX512{F,VL} Disp8
8115 vgetexppd xmm30, [rdx+1024]{1to2} # AVX512{F,VL}
8116 vgetexppd xmm30, [rdx-1024]{1to2} # AVX512{F,VL} Disp8
8117 vgetexppd xmm30, [rdx-1032]{1to2} # AVX512{F,VL}
8166 vgetmantpd xmm30, [rcx]{1to2}, 123 # AVX512{F,VL}
8171 vgetmantpd xmm30, [rdx+1016]{1to2}, 123 # AVX512{F,VL} Disp8
8172 vgetmantpd xmm30, [rdx+1024]{1to2}, 123 # AVX512{F,VL}
8173 vgetmantpd xmm30, [rdx-1024]{1to2}, 123 # AVX512{F,VL} Disp8
8174 vgetmantpd xmm30, [rdx-1032]{1to2}, 123 # AVX512{F,VL}
8245 vmaxpd xmm30, xmm29, [rcx]{1to2} # AVX512{F,VL}
8250 vmaxpd xmm30, xmm29, [rdx+1016]{1to2} # AVX512{F,VL} Disp8
8251 vmaxpd xmm30, xmm29, [rdx+1024]{1to2} # AVX512{F,VL}
8252 vmaxpd xmm30, xmm29, [rdx-1024]{1to2} # AVX512{F,VL} Disp8
8253 vmaxpd xmm30, xmm29, [rdx-1032]{1to2} # AVX512{F,VL}
8301 vminpd xmm30, xmm29, [rcx]{1to2} # AVX512{F,VL}
8306 vminpd xmm30, xmm29, [rdx+1016]{1to2} # AVX512{F,VL} Disp8
8307 vminpd xmm30, xmm29, [rdx+1024]{1to2} # AVX512{F,VL}
8308 vminpd xmm30, xmm29, [rdx-1024]{1to2} # AVX512{F,VL} Disp8
8309 vminpd xmm30, xmm29, [rdx-1032]{1to2} # AVX512{F,VL}
8603 vmulpd xmm30, xmm29, [rcx]{1to2} # AVX512{F,VL}
8608 vmulpd xmm30, xmm29, [rdx+1016]{1to2} # AVX512{F,VL} Disp8
8609 vmulpd xmm30, xmm29, [rdx+1024]{1to2} # AVX512{F,VL}
8610 vmulpd xmm30, xmm29, [rdx-1024]{1to2} # AVX512{F,VL} Disp8
8611 vmulpd xmm30, xmm29, [rdx-1032]{1to2} # AVX512{F,VL}
8687 vpabsq xmm30, [rcx]{1to2} # AVX512{F,VL}
8692 vpabsq xmm30, [rdx+1016]{1to2} # AVX512{F,VL} Disp8
8693 vpabsq xmm30, [rdx+1024]{1to2} # AVX512{F,VL}
8694 vpabsq xmm30, [rdx-1024]{1to2} # AVX512{F,VL} Disp8
8695 vpabsq xmm30, [rdx-1032]{1to2} # AVX512{F,VL}
8743 vpaddq xmm30, xmm29, [rcx]{1to2} # AVX512{F,VL}
8748 vpaddq xmm30, xmm29, [rdx+1016]{1to2} # AVX512{F,VL} Disp8
8749 vpaddq xmm30, xmm29, [rdx+1024]{1to2} # AVX512{F,VL}
8750 vpaddq xmm30, xmm29, [rdx-1024]{1to2} # AVX512{F,VL} Disp8
8751 vpaddq xmm30, xmm29, [rdx-1032]{1to2} # AVX512{F,VL}
8827 vpandnq xmm30, xmm29, [rcx]{1to2} # AVX512{F,VL}
8832 vpandnq xmm30, xmm29, [rdx+1016]{1to2} # AVX512{F,VL} Disp8
8833 vpandnq xmm30, xmm29, [rdx+1024]{1to2} # AVX512{F,VL}
8834 vpandnq xmm30, xmm29, [rdx-1024]{1to2} # AVX512{F,VL} Disp8
8835 vpandnq xmm30, xmm29, [rdx-1032]{1to2} # AVX512{F,VL}
8855 vpandq xmm30, xmm29, [rcx]{1to2} # AVX512{F,VL}
8860 vpandq xmm30, xmm29, [rdx+1016]{1to2} # AVX512{F,VL} Disp8
8861 vpandq xmm30, xmm29, [rdx+1024]{1to2} # AVX512{F,VL}
8862 vpandq xmm30, xmm29, [rdx-1024]{1to2} # AVX512{F,VL} Disp8
8863 vpandq xmm30, xmm29, [rdx-1032]{1to2} # AVX512{F,VL}
9026 vpcmpeqq k5, xmm30, [rcx]{1to2} # AVX512{F,VL}
9031 vpcmpeqq k5, xmm30, [rdx+1016]{1to2} # AVX512{F,VL} Disp8
9032 vpcmpeqq k5, xmm30, [rdx+1024]{1to2} # AVX512{F,VL}
9033 vpcmpeqq k5, xmm30, [rdx-1024]{1to2} # AVX512{F,VL} Disp8
9034 vpcmpeqq k5, xmm30, [rdx-1032]{1to2} # AVX512{F,VL}
9078 vpcmpgtq k5, xmm30, [rcx]{1to2} # AVX512{F,VL}
9083 vpcmpgtq k5, xmm30, [rdx+1016]{1to2} # AVX512{F,VL} Disp8
9084 vpcmpgtq k5, xmm30, [rdx+1024]{1to2} # AVX512{F,VL}
9085 vpcmpgtq k5, xmm30, [rdx-1024]{1to2} # AVX512{F,VL} Disp8
9086 vpcmpgtq k5, xmm30, [rdx-1032]{1to2} # AVX512{F,VL}
9105 vpcmpq k5, xmm30, [rcx]{1to2}, 123 # AVX512{F,VL}
9110 vpcmpq k5, xmm30, [rdx+1016]{1to2}, 123 # AVX512{F,VL} Disp8
9111 vpcmpq k5, xmm30, [rdx+1024]{1to2}, 123 # AVX512{F,VL}
9112 vpcmpq k5, xmm30, [rdx-1024]{1to2}, 123 # AVX512{F,VL} Disp8
9113 vpcmpq k5, xmm30, [rdx-1032]{1to2}, 123 # AVX512{F,VL}
9161 vpcmpuq k5, xmm30, [rcx]{1to2}, 123 # AVX512{F,VL}
9166 vpcmpuq k5, xmm30, [rdx+1016]{1to2}, 123 # AVX512{F,VL} Disp8
9167 vpcmpuq k5, xmm30, [rdx+1024]{1to2}, 123 # AVX512{F,VL}
9168 vpcmpuq k5, xmm30, [rdx-1024]{1to2}, 123 # AVX512{F,VL} Disp8
9169 vpcmpuq k5, xmm30, [rdx-1032]{1to2}, 123 # AVX512{F,VL}
9189 vpblendmq xmm30, xmm29, [rcx]{1to2} # AVX512{F,VL}
9194 vpblendmq xmm30, xmm29, [rdx+1016]{1to2} # AVX512{F,VL} Disp8
9195 vpblendmq xmm30, xmm29, [rdx+1024]{1to2} # AVX512{F,VL}
9196 vpblendmq xmm30, xmm29, [rdx-1024]{1to2} # AVX512{F,VL} Disp8
9197 vpblendmq xmm30, xmm29, [rdx-1032]{1to2} # AVX512{F,VL}
9252 vpermilpd xmm30, [rcx]{1to2}, 123 # AVX512{F,VL}
9257 vpermilpd xmm30, [rdx+1016]{1to2}, 123 # AVX512{F,VL} Disp8
9258 vpermilpd xmm30, [rdx+1024]{1to2}, 123 # AVX512{F,VL}
9259 vpermilpd xmm30, [rdx-1024]{1to2}, 123 # AVX512{F,VL} Disp8
9260 vpermilpd xmm30, [rdx-1032]{1to2}, 123 # AVX512{F,VL}
9281 vpermilpd xmm30, xmm29, [rcx]{1to2} # AVX512{F,VL}
9286 vpermilpd xmm30, xmm29, [rdx+1016]{1to2} # AVX512{F,VL} Disp8
9287 vpermilpd xmm30, xmm29, [rdx+1024]{1to2} # AVX512{F,VL}
9288 vpermilpd xmm30, xmm29, [rdx-1024]{1to2} # AVX512{F,VL} Disp8
9289 vpermilpd xmm30, xmm29, [rdx-1032]{1to2} # AVX512{F,VL}
9507 vpmaxsq xmm30, xmm29, [rcx]{1to2} # AVX512{F,VL}
9512 vpmaxsq xmm30, xmm29, [rdx+1016]{1to2} # AVX512{F,VL} Disp8
9513 vpmaxsq xmm30, xmm29, [rdx+1024]{1to2} # AVX512{F,VL}
9514 vpmaxsq xmm30, xmm29, [rdx-1024]{1to2} # AVX512{F,VL} Disp8
9515 vpmaxsq xmm30, xmm29, [rdx-1032]{1to2} # AVX512{F,VL}
9563 vpmaxuq xmm30, xmm29, [rcx]{1to2} # AVX512{F,VL}
9568 vpmaxuq xmm30, xmm29, [rdx+1016]{1to2} # AVX512{F,VL} Disp8
9569 vpmaxuq xmm30, xmm29, [rdx+1024]{1to2} # AVX512{F,VL}
9570 vpmaxuq xmm30, xmm29, [rdx-1024]{1to2} # AVX512{F,VL} Disp8
9571 vpmaxuq xmm30, xmm29, [rdx-1032]{1to2} # AVX512{F,VL}
9619 vpminsq xmm30, xmm29, [rcx]{1to2} # AVX512{F,VL}
9624 vpminsq xmm30, xmm29, [rdx+1016]{1to2} # AVX512{F,VL} Disp8
9625 vpminsq xmm30, xmm29, [rdx+1024]{1to2} # AVX512{F,VL}
9626 vpminsq xmm30, xmm29, [rdx-1024]{1to2} # AVX512{F,VL} Disp8
9627 vpminsq xmm30, xmm29, [rdx-1032]{1to2} # AVX512{F,VL}
9675 vpminuq xmm30, xmm29, [rcx]{1to2} # AVX512{F,VL}
9680 vpminuq xmm30, xmm29, [rdx+1016]{1to2} # AVX512{F,VL} Disp8
9681 vpminuq xmm30, xmm29, [rdx+1024]{1to2} # AVX512{F,VL}
9682 vpminuq xmm30, xmm29, [rdx-1024]{1to2} # AVX512{F,VL} Disp8
9683 vpminuq xmm30, xmm29, [rdx-1032]{1to2} # AVX512{F,VL}
9883 vpmuldq xmm30, xmm29, [rcx]{1to2} # AVX512{F,VL}
9888 vpmuldq xmm30, xmm29, [rdx+1016]{1to2} # AVX512{F,VL} Disp8
9889 vpmuldq xmm30, xmm29, [rdx+1024]{1to2} # AVX512{F,VL}
9890 vpmuldq xmm30, xmm29, [rdx-1024]{1to2} # AVX512{F,VL} Disp8
9891 vpmuldq xmm30, xmm29, [rdx-1032]{1to2} # AVX512{F,VL}
9939 vpmuludq xmm30, xmm29, [rcx]{1to2} # AVX512{F,VL}
9944 vpmuludq xmm30, xmm29, [rdx+1016]{1to2} # AVX512{F,VL} Disp8
9945 vpmuludq xmm30, xmm29, [rdx+1024]{1to2} # AVX512{F,VL}
9946 vpmuludq xmm30, xmm29, [rdx-1024]{1to2} # AVX512{F,VL} Disp8
9947 vpmuludq xmm30, xmm29, [rdx-1032]{1to2} # AVX512{F,VL}
9995 vporq xmm30, xmm29, [rcx]{1to2} # AVX512{F,VL}
10000 vporq xmm30, xmm29, [rdx+1016]{1to2} # AVX512{F,VL} Disp8
10001 vporq xmm30, xmm29, [rdx+1024]{1to2} # AVX512{F,VL}
10002 vporq xmm30, xmm29, [rdx-1024]{1to2} # AVX512{F,VL} Disp8
10003 vporq xmm30, xmm29, [rdx-1032]{1to2} # AVX512{F,VL}
10149 vpsllvq xmm30, xmm29, [rcx]{1to2} # AVX512{F,VL}
10154 vpsllvq xmm30, xmm29, [rdx+1016]{1to2} # AVX512{F,VL} Disp8
10155 vpsllvq xmm30, xmm29, [rdx+1024]{1to2} # AVX512{F,VL}
10156 vpsllvq xmm30, xmm29, [rdx-1024]{1to2} # AVX512{F,VL} Disp8
10157 vpsllvq xmm30, xmm29, [rdx-1032]{1to2} # AVX512{F,VL}
10241 vpsravq xmm30, xmm29, [rcx]{1to2} # AVX512{F,VL}
10246 vpsravq xmm30, xmm29, [rdx+1016]{1to2} # AVX512{F,VL} Disp8
10247 vpsravq xmm30, xmm29, [rdx+1024]{1to2} # AVX512{F,VL}
10248 vpsravq xmm30, xmm29, [rdx-1024]{1to2} # AVX512{F,VL} Disp8
10249 vpsravq xmm30, xmm29, [rdx-1032]{1to2} # AVX512{F,VL}
10333 vpsrlvq xmm30, xmm29, [rcx]{1to2} # AVX512{F,VL}
10338 vpsrlvq xmm30, xmm29, [rdx+1016]{1to2} # AVX512{F,VL} Disp8
10339 vpsrlvq xmm30, xmm29, [rdx+1024]{1to2} # AVX512{F,VL}
10340 vpsrlvq xmm30, xmm29, [rdx-1024]{1to2} # AVX512{F,VL} Disp8
10341 vpsrlvq xmm30, xmm29, [rdx-1032]{1to2} # AVX512{F,VL}
10392 vpsrlq xmm30, [rcx]{1to2}, 123 # AVX512{F,VL}
10397 vpsrlq xmm30, [rdx+1016]{1to2}, 123 # AVX512{F,VL} Disp8
10398 vpsrlq xmm30, [rdx+1024]{1to2}, 123 # AVX512{F,VL}
10399 vpsrlq xmm30, [rdx-1024]{1to2}, 123 # AVX512{F,VL} Disp8
10400 vpsrlq xmm30, [rdx-1032]{1to2}, 123 # AVX512{F,VL}
10449 vpsubq xmm30, xmm29, [rcx]{1to2} # AVX512{F,VL}
10454 vpsubq xmm30, xmm29, [rdx+1016]{1to2} # AVX512{F,VL} Disp8
10455 vpsubq xmm30, xmm29, [rdx+1024]{1to2} # AVX512{F,VL}
10456 vpsubq xmm30, xmm29, [rdx-1024]{1to2} # AVX512{F,VL} Disp8
10457 vpsubq xmm30, xmm29, [rdx-1032]{1to2} # AVX512{F,VL}
10502 vptestmq k5, xmm30, [rcx]{1to2} # AVX512{F,VL}
10507 vptestmq k5, xmm30, [rdx+1016]{1to2} # AVX512{F,VL} Disp8
10508 vptestmq k5, xmm30, [rdx+1024]{1to2} # AVX512{F,VL}
10509 vptestmq k5, xmm30, [rdx-1024]{1to2} # AVX512{F,VL} Disp8
10510 vptestmq k5, xmm30, [rdx-1032]{1to2} # AVX512{F,VL}
10557 vpunpckhqdq xmm30, xmm29, [rcx]{1to2} # AVX512{F,VL}
10562 vpunpckhqdq xmm30, xmm29, [rdx+1016]{1to2} # AVX512{F,VL} Disp8
10563 vpunpckhqdq xmm30, xmm29, [rdx+1024]{1to2} # AVX512{F,VL}
10564 vpunpckhqdq xmm30, xmm29, [rdx-1024]{1to2} # AVX512{F,VL} Disp8
10565 vpunpckhqdq xmm30, xmm29, [rdx-1032]{1to2} # AVX512{F,VL}
10613 vpunpcklqdq xmm30, xmm29, [rcx]{1to2} # AVX512{F,VL}
10618 vpunpcklqdq xmm30, xmm29, [rdx+1016]{1to2} # AVX512{F,VL} Disp8
10619 vpunpcklqdq xmm30, xmm29, [rdx+1024]{1to2} # AVX512{F,VL}
10620 vpunpcklqdq xmm30, xmm29, [rdx-1024]{1to2} # AVX512{F,VL} Disp8
10621 vpunpcklqdq xmm30, xmm29, [rdx-1032]{1to2} # AVX512{F,VL}
10669 vpxorq xmm30, xmm29, [rcx]{1to2} # AVX512{F,VL}
10674 vpxorq xmm30, xmm29, [rdx+1016]{1to2} # AVX512{F,VL} Disp8
10675 vpxorq xmm30, xmm29, [rdx+1024]{1to2} # AVX512{F,VL}
10676 vpxorq xmm30, xmm29, [rdx-1024]{1to2} # AVX512{F,VL} Disp8
10677 vpxorq xmm30, xmm29, [rdx-1032]{1to2} # AVX512{F,VL}
10697 vrcp14pd xmm30, [rcx]{1to2} # AVX512{F,VL}
10702 vrcp14pd xmm30, [rdx+1016]{1to2} # AVX512{F,VL} Disp8
10703 vrcp14pd xmm30, [rdx+1024]{1to2} # AVX512{F,VL}
10704 vrcp14pd xmm30, [rdx-1024]{1to2} # AVX512{F,VL} Disp8
10705 vrcp14pd xmm30, [rdx-1032]{1to2} # AVX512{F,VL}
10753 vrsqrt14pd xmm30, [rcx]{1to2} # AVX512{F,VL}
10758 vrsqrt14pd xmm30, [rdx+1016]{1to2} # AVX512{F,VL} Disp8
10759 vrsqrt14pd xmm30, [rdx+1024]{1to2} # AVX512{F,VL}
10760 vrsqrt14pd xmm30, [rdx-1024]{1to2} # AVX512{F,VL} Disp8
10761 vrsqrt14pd xmm30, [rdx-1032]{1to2} # AVX512{F,VL}
10842 vshufpd xmm30, xmm29, [rcx]{1to2}, 123 # AVX512{F,VL}
10847 vshufpd xmm30, xmm29, [rdx+1016]{1to2}, 123 # AVX512{F,VL} Disp8
10848 vshufpd xmm30, xmm29, [rdx+1024]{1to2}, 123 # AVX512{F,VL}
10849 vshufpd xmm30, xmm29, [rdx-1024]{1to2}, 123 # AVX512{F,VL} Disp8
10850 vshufpd xmm30, xmm29, [rdx-1032]{1to2}, 123 # AVX512{F,VL}
10901 vsqrtpd xmm30, [rcx]{1to2} # AVX512{F,VL}
10906 vsqrtpd xmm30, [rdx+1016]{1to2} # AVX512{F,VL} Disp8
10907 vsqrtpd xmm30, [rdx+1024]{1to2} # AVX512{F,VL}
10908 vsqrtpd xmm30, [rdx-1024]{1to2} # AVX512{F,VL} Disp8
10909 vsqrtpd xmm30, [rdx-1032]{1to2} # AVX512{F,VL}
10957 vsubpd xmm30, xmm29, [rcx]{1to2} # AVX512{F,VL}
10962 vsubpd xmm30, xmm29, [rdx+1016]{1to2} # AVX512{F,VL} Disp8
10963 vsubpd xmm30, xmm29, [rdx+1024]{1to2} # AVX512{F,VL}
10964 vsubpd xmm30, xmm29, [rdx-1024]{1to2} # AVX512{F,VL} Disp8
10965 vsubpd xmm30, xmm29, [rdx-1032]{1to2} # AVX512{F,VL}
11013 vunpckhpd xmm30, xmm29, [rcx]{1to2} # AVX512{F,VL}
11018 vunpckhpd xmm30, xmm29, [rdx+1016]{1to2} # AVX512{F,VL} Disp8
11019 vunpckhpd xmm30, xmm29, [rdx+1024]{1to2} # AVX512{F,VL}
11020 vunpckhpd xmm30, xmm29, [rdx-1024]{1to2} # AVX512{F,VL} Disp8
11021 vunpckhpd xmm30, xmm29, [rdx-1032]{1to2} # AVX512{F,VL}
11069 vunpcklpd xmm30, xmm29, [rcx]{1to2} # AVX512{F,VL}
11074 vunpcklpd xmm30, xmm29, [rdx+1016]{1to2} # AVX512{F,VL} Disp8
11075 vunpcklpd xmm30, xmm29, [rdx+1024]{1to2} # AVX512{F,VL}
11076 vunpcklpd xmm30, xmm29, [rdx-1024]{1to2} # AVX512{F,VL} Disp8
11077 vunpcklpd xmm30, xmm29, [rdx-1032]{1to2} # AVX512{F,VL}
11156 vpternlogq xmm30, xmm29, [rcx]{1to2}, 123 # AVX512{F,VL}
11161 vpternlogq xmm30, xmm29, [rdx+1016]{1to2}, 123 # AVX512{F,VL} Disp8
11162 vpternlogq xmm30, xmm29, [rdx+1024]{1to2}, 123 # AVX512{F,VL}
11163 vpternlogq xmm30, xmm29, [rdx-1024]{1to2}, 123 # AVX512{F,VL} Disp8
11164 vpternlogq xmm30, xmm29, [rdx-1032]{1to2}, 123 # AVX512{F,VL}
11391 vpermt2q xmm30, xmm29, [rcx]{1to2} # AVX512{F,VL}
11396 vpermt2q xmm30, xmm29, [rdx+1016]{1to2} # AVX512{F,VL} Disp8
11397 vpermt2q xmm30, xmm29, [rdx+1024]{1to2} # AVX512{F,VL}
11398 vpermt2q xmm30, xmm29, [rdx-1024]{1to2} # AVX512{F,VL} Disp8
11399 vpermt2q xmm30, xmm29, [rdx-1032]{1to2} # AVX512{F,VL}
11447 vpermt2pd xmm30, xmm29, [rcx]{1to2} # AVX512{F,VL}
11452 vpermt2pd xmm30, xmm29, [rdx+1016]{1to2} # AVX512{F,VL} Disp8
11453 vpermt2pd xmm30, xmm29, [rdx+1024]{1to2} # AVX512{F,VL}
11454 vpermt2pd xmm30, xmm29, [rdx-1024]{1to2} # AVX512{F,VL} Disp8
11455 vpermt2pd xmm30, xmm29, [rdx-1032]{1to2} # AVX512{F,VL}
11476 valignq xmm30, xmm29, [rcx]{1to2}, 123 # AVX512{F,VL}
11481 valignq xmm30, xmm29, [rdx+1016]{1to2}, 123 # AVX512{F,VL} Disp8
11482 valignq xmm30, xmm29, [rdx+1024]{1to2}, 123 # AVX512{F,VL}
11483 valignq xmm30, xmm29, [rdx-1024]{1to2}, 123 # AVX512{F,VL} Disp8
11484 valignq xmm30, xmm29, [rdx-1032]{1to2}, 123 # AVX512{F,VL}
11505 vscalefpd xmm30, xmm29, [rcx]{1to2} # AVX512{F,VL}
11510 vscalefpd xmm30, xmm29, [rdx+1016]{1to2} # AVX512{F,VL} Disp8
11511 vscalefpd xmm30, xmm29, [rdx+1024]{1to2} # AVX512{F,VL}
11512 vscalefpd xmm30, xmm29, [rdx-1024]{1to2} # AVX512{F,VL} Disp8
11513 vscalefpd xmm30, xmm29, [rdx-1032]{1to2} # AVX512{F,VL}
11562 vfixupimmpd xmm30, xmm29, [rcx]{1to2}, 123 # AVX512{F,VL}
11567 vfixupimmpd xmm30, xmm29, [rdx+1016]{1to2}, 123 # AVX512{F,VL} Disp8
11568 vfixupimmpd xmm30, xmm29, [rdx+1024]{1to2}, 123 # AVX512{F,VL}
11569 vfixupimmpd xmm30, xmm29, [rdx-1024]{1to2}, 123 # AVX512{F,VL} Disp8
11570 vfixupimmpd xmm30, xmm29, [rdx-1032]{1to2}, 123 # AVX512{F,VL}
11652 vpsllq xmm30, [rcx]{1to2}, 123 # AVX512{F,VL}
11657 vpsllq xmm30, [rdx+1016]{1to2}, 123 # AVX512{F,VL} Disp8
11658 vpsllq xmm30, [rdx+1024]{1to2}, 123 # AVX512{F,VL}
11659 vpsllq xmm30, [rdx-1024]{1to2}, 123 # AVX512{F,VL} Disp8
11660 vpsllq xmm30, [rdx-1032]{1to2}, 123 # AVX512{F,VL}
11712 vpsraq xmm30, [rcx]{1to2}, 123 # AVX512{F,VL}
11717 vpsraq xmm30, [rdx+1016]{1to2}, 123 # AVX512{F,VL} Disp8
11718 vpsraq xmm30, [rdx+1024]{1to2}, 123 # AVX512{F,VL}
11719 vpsraq xmm30, [rdx-1024]{1to2}, 123 # AVX512{F,VL} Disp8
11720 vpsraq xmm30, [rdx-1032]{1to2}, 123 # AVX512{F,VL}
11799 vprolvq xmm30, xmm29, [rcx]{1to2} # AVX512{F,VL}
11804 vprolvq xmm30, xmm29, [rdx+1016]{1to2} # AVX512{F,VL} Disp8
11805 vprolvq xmm30, xmm29, [rdx+1024]{1to2} # AVX512{F,VL}
11806 vprolvq xmm30, xmm29, [rdx-1024]{1to2} # AVX512{F,VL} Disp8
11807 vprolvq xmm30, xmm29, [rdx-1032]{1to2} # AVX512{F,VL}
11828 vprolq xmm30, [rcx]{1to2}, 123 # AVX512{F,VL}
11833 vprolq xmm30, [rdx+1016]{1to2}, 123 # AVX512{F,VL} Disp8
11834 vprolq xmm30, [rdx+1024]{1to2}, 123 # AVX512{F,VL}
11835 vprolq xmm30, [rdx-1024]{1to2}, 123 # AVX512{F,VL} Disp8
11836 vprolq xmm30, [rdx-1032]{1to2}, 123 # AVX512{F,VL}
11915 vprorvq xmm30, xmm29, [rcx]{1to2} # AVX512{F,VL}
11920 vprorvq xmm30, xmm29, [rdx+1016]{1to2} # AVX512{F,VL} Disp8
11921 vprorvq xmm30, xmm29, [rdx+1024]{1to2} # AVX512{F,VL}
11922 vprorvq xmm30, xmm29, [rdx-1024]{1to2} # AVX512{F,VL} Disp8
11923 vprorvq xmm30, xmm29, [rdx-1032]{1to2} # AVX512{F,VL}
11944 vprorq xmm30, [rcx]{1to2}, 123 # AVX512{F,VL}
11949 vprorq xmm30, [rdx+1016]{1to2}, 123 # AVX512{F,VL} Disp8
11950 vprorq xmm30, [rdx+1024]{1to2}, 123 # AVX512{F,VL}
11951 vprorq xmm30, [rdx-1024]{1to2}, 123 # AVX512{F,VL} Disp8
11952 vprorq xmm30, [rdx-1032]{1to2}, 123 # AVX512{F,VL}
11974 vrndscalepd xmm30, [rcx]{1to2}, 123 # AVX512{F,VL}
11979 vrndscalepd xmm30, [rdx+1016]{1to2}, 123 # AVX512{F,VL} Disp8
11980 vrndscalepd xmm30, [rdx+1024]{1to2}, 123 # AVX512{F,VL}
11981 vrndscalepd xmm30, [rdx-1024]{1to2}, 123 # AVX512{F,VL} Disp8
11982 vrndscalepd xmm30, [rdx-1032]{1to2}, 123 # AVX512{F,VL}
12407 vcvttpd2udq xmm30, [rcx]{1to2} # AVX512{F,VL}
12412 vcvttpd2udq xmm30, QWORD PTR [rdx+1016]{1to2} # AVX512{F,VL} Disp8
12413 vcvttpd2udq xmm30, QWORD PTR [rdx+1024]{1to2} # AVX512{F,VL}
12414 vcvttpd2udq xmm30, QWORD PTR [rdx-1024]{1to2} # AVX512{F,VL} Disp8
12415 vcvttpd2udq xmm30, QWORD PTR [rdx-1032]{1to2} # AVX512{F,VL}
12491 vpermi2q xmm30, xmm29, [rcx]{1to2} # AVX512{F,VL}
12496 vpermi2q xmm30, xmm29, [rdx+1016]{1to2} # AVX512{F,VL} Disp8
12497 vpermi2q xmm30, xmm29, [rdx+1024]{1to2} # AVX512{F,VL}
12498 vpermi2q xmm30, xmm29, [rdx-1024]{1to2} # AVX512{F,VL} Disp8
12499 vpermi2q xmm30, xmm29, [rdx-1032]{1to2} # AVX512{F,VL}
12547 vpermi2pd xmm30, xmm29, [rcx]{1to2} # AVX512{F,VL}
12552 vpermi2pd xmm30, xmm29, [rdx+1016]{1to2} # AVX512{F,VL} Disp8
12553 vpermi2pd xmm30, xmm29, [rdx+1024]{1to2} # AVX512{F,VL}
12554 vpermi2pd xmm30, xmm29, [rdx-1024]{1to2} # AVX512{F,VL} Disp8
12555 vpermi2pd xmm30, xmm29, [rdx-1032]{1to2} # AVX512{F,VL}
12600 vptestnmq k5, xmm29, [rcx]{1to2} # AVX512{F,VL}
12605 vptestnmq k5, xmm29, [rdx+1016]{1to2} # AVX512{F,VL} Disp8
12606 vptestnmq k5, xmm29, [rdx+1024]{1to2} # AVX512{F,VL}
12607 vptestnmq k5, xmm29, [rdx-1024]{1to2} # AVX512{F,VL} Disp8
12608 vptestnmq k5, xmm29, [rdx-1032]{1to2} # AVX512{F,VL}