gas/config/tc-arm.c

660   /* Which architecture variant provides this instruction.  */
1836       /* VFPv3 allows 32 D registers, except for the VFPv3-D16 variant.  */
5415       /* Record the relocation type (always the ALU variant here).  */
9676 /* VFP instructions.  In a logical order: SP variant first, monad
10391    holds variant (1).
11658       /* Definitely a 32-bit variant.  */
15289   /* Only encodes the 'U present' variant of the instruction.
15423       /* Maximum shift variant.  */
17761   OT_odd_infix_unc,	/* This is the unconditional variant of an
17764 			   this variant will accept a suffix.  */
17780    to encode each conditional variant as a literal string in the opcode
18386 /* Whether wide instruction variant can be used if available for a valid OPCODE
18396      of variant T3 of B.W is checked in do_t_branch.  */
18414   /* OPCODE with narrow only instruction variant or wide variant not
18457       arm_feature_set variant;
18459       variant = cpu_variant;
18461       if (!ARM_CPU_HAS_FEATURE (variant, arm_arch_t2))
18462 	ARM_CLEAR_FEATURE (variant, variant, fpu_any_hard);
18466 	      && !ARM_CPU_HAS_FEATURE (variant, *opcode->tvariant)))
18486       if (!ARM_CPU_HAS_FEATURE (variant, arm_ext_v6t2)
18487 	  && !t32_insn_ok (variant, opcode))
18493 	      if (ARM_CPU_HAS_FEATURE (variant, arm_ext_v8m))
18495 			  "variant of instruction `%s'"), str);
18538 	variant = arm_arch_none;
18540 	variant = cpu_variant;
18541       if (inst.size == 4 && !t32_insn_ok (variant, opcode))
19092 /* The normal sort of mnemonic; has a Thumb variant; takes a conditional suffix.  */
19104 /* Second most common sort of mnemonic: has a Thumb variant, takes a conditional
19437      BLX(2).  Only this variant has conditional execution.  */
20683   /* Special case. Types S8 S16 S32 U8 U16 U32. Handles max shift variant.  */
20685   /* CVT with optional immediate for fixed-point variant.  */
20829     VFP FMA variant; NEON and VFP FMA always includes the NEON
21477   /* Force misaligned offsets to 32-bit variant.  */
21553   /* Force misaligned targets to 32-bit variant.  */
25024   /* Set the cpu variant based on the command-line options.  We prefer
25682   /* The official spelling of this variant is ARMv6KZ, the name "armv6zk" is
25689   /* The official spelling of this variant is ARMv6KZ, the name "armv6zkt2" is