Lines Matching defs:immediate
378 /* An immediate operand can start with #, and ld*, st*, pld operands
464 unsigned regisimm : 1; /* 64-bit immediate, reg forms high 32 bits. */
948 /* Prefix characters that indicate the start of an immediate
1000 immediates, as can be used in Neon VMVN and VMOV immediate instructions. */
1020 inst.error = _("immediate expression requires a # prefix");
1190 /* Generic immediate-value read function for use in directives.
4759 /* Generic immediate-value read function for use in insn parsing.
4760 STR points to the beginning of the immediate (the leading #);
4762 issue an error. PREFIX_OPT is true if the immediate prefix is
4779 inst.error = _("immediate value out of range");
4787 /* Less-generic immediate-value read function with the possibility of loading a
4788 big (64-bit) immediate, as required by Neon VMOV, VMVN and logic immediate
4860 /* Returns the pseudo-register number of an FPA immediate constant,
4949 inst.error = _("invalid FPA immediate expression");
5078 SHIFT_IMMEDIATE, /* Shift operand must be an immediate. */
5079 SHIFT_LSL_OR_ASR_IMMEDIATE, /* Shift must be LSL or ASR immediate. */
5080 SHIFT_ASR_IMMEDIATE, /* Shift must be ASR immediate. */
5081 SHIFT_LSL_IMMEDIATE, /* Shift must be LSL immediate. */
5177 #<immediate>
5178 #<immediate>, <rotate>
5183 multiple of 2 between 0 and 30. Validation of immediate operands
5375 #<immediate>
5376 #<immediate>, <rotate>
5481 =immediate .isreg=0 .reloc.exp=immediate
5688 /* We might be using the immediate for alignment already. If we
5784 inst.error = _("immediate value out of range");
6497 OP_RNDQ_I0, /* Neon D or Q reg, or immediate zero. */
6498 OP_RVSD_I0, /* VFP S or D reg, or immediate zero. */
6499 OP_RSVD_FI0, /* VFP S or D reg, or floating point immediate zero. */
6505 OP_RNDQ_Ibig, /* Neon D or Q reg, or big immediate for logic and VMVN. */
6506 OP_RNDQ_I63b, /* Neon D or Q reg, or immediate for shift. */
6507 OP_RIWR_I32z, /* iWMMXt wR register, or immediate 0 .. 32 for iWMMXt2. */
6509 OP_I0, /* immediate zero */
6510 OP_I7, /* immediate value 0 .. 7 */
6524 OP_I4b, /* immediate, prefix optional, 1 .. 4 */
6536 OP_EXPi, /* same, with optional immediate prefix */
6539 OP_IROT1, /* VCADD rotate immediate: 90, 270. */
6540 OP_IROT2, /* VCMLA rotate immediate: 0, 90, 180, 270. */
6554 OP_RF_IF, /* FPA register or immediate */
6559 OP_oI7b, /* immediate, prefix optional, 0 .. 7 */
6574 OP_oSHll, /* LSL immediate */
6575 OP_oSHar, /* ASR immediate */
6576 OP_oSHllar, /* LSL or ASR immediate */
6693 goto immediate; \
6795 = _("only floating point zero is allowed as immediate value");
6848 /* There's a possibility of getting a 64-bit immediate here, so
6853 inst.error = _("immediate value is out of range");
6970 /* Register or immediate. */
7030 immediate:
7169 do not signal immediate failures for the register constraints;
7345 /* If VAL can be encoded in the immediate field of an ARM instruction,
7363 /* If VAL can be encoded in the immediate field of a Thumb32 instruction,
7447 /* Encode a <shift> in an ARM-format instruction. The immediate,
7575 else /* immediate offset in inst.reloc */
7631 else /* immediate offset in inst.reloc */
7648 /* Write immediate bits [7:0] to the following locations:
7712 /* For immediate of above form, return 0bABCD. */
7733 MVN). If the immediate looks like a repeated pattern then also
7829 /* Don't allow MVN with 8-bit immediate. */
8452 BKPT <16 bit unsigned immediate>
8955 /* In both ARM and thumb state 'ldr pc, #imm' with an immediate
9064 /* ARM V6T2 16-bit immediate register load: MOV[WT]{cond} Rd, #<imm16>. */
9902 inst.error = _("immediate value out of range, expected range [0, 16]");
9909 inst.error = _("immediate value out of range, expected range [1, 32]");
10135 _("immediate operand requires iWMMXt2"));
10211 /* Maverick shift immediate instructions.
10223 /* Bits 0-3 of the insn should have bits 0-3 of the immediate.
10224 Bits 5-7 of the insn should have bits 4-6 of the immediate.
10506 is the SP-{plus,minus}-immediate form of the instruction. */
10602 _("immediate value out of range"));
10798 /* For an immediate, we always generate a 32-bit opcode;
10886 /* For an immediate, we always generate a 32-bit opcode;
11120 between the two is the maximum immediate allowed - which is passed in
11130 _("immediate value out of range"));
12017 /* Some mov with immediate shift have narrow variants.
12133 _("only lo regs allowed with immediate"));
12208 /* For an immediate, we always generate a 32-bit opcode;
12310 _("Thumb encoding does not support an immediate here"));
13162 _("immediate value out of range"));
13253 X(vshll, 0x1b20300, N_INV, 0x0800a10), /* max shift, immediate. */ \
14620 _("immediate out of range for shift"));
14656 _("immediate out of range for shift"));
14691 neon_cmode_for_logic_imm (unsigned immediate, unsigned *immbits, int size)
14699 immediate |= immediate << 8;
14705 if (immediate == (immediate & 0x000000ff))
14707 *immbits = immediate;
14710 else if (immediate == (immediate & 0x0000ff00))
14712 *immbits = immediate >> 8;
14715 else if (immediate == (immediate & 0x00ff0000))
14717 *immbits = immediate >> 16;
14720 else if (immediate == (immediate & 0xff000000))
14722 *immbits = immediate >> 24;
14725 if ((immediate & 0xffff) != (immediate >> 16))
14727 immediate &= 0xffff;
14730 if (immediate == (immediate & 0x000000ff))
14732 *immbits = immediate;
14735 else if (immediate == (immediate & 0x0000ff00))
14737 *immbits = immediate >> 8;
14742 first_error (_("immediate value out of range"));
14783 /* .i64 is a pseudo-op, so the immediate must be a repeating
15264 _("immediate out of range for insert"));
15276 _("immediate out of range for insert"));
15288 _("immediate out of range for shift"));
15293 /* The rest of the bits are the same as other immediate shifts. */
15330 /* This gets the bounds check, size encoding and immediate bits calculation
15345 _("immediate out of range"));
15357 /* This gets the bounds check, size encoding and immediate bits calculation
15372 _("immediate out of range"));
15394 /* This gets the bounds check, size encoding and immediate bits calculation
15398 /* If immediate is zero then we are a pseudo-instruction for
15409 _("immediate out of range for narrowing operation"));
15509 /* The instruction versions which take an immediate take one register
15542 /* Conversions with immediate bitshift. */
15741 /* Fixed-point conversion with #0 immediate is encoded as an
15988 _("operand size must be specified for immediate VMOV"));
15998 _("immediate has bits set outside the operand size"));
16007 /* Flip from VMOV/VMVN to VMVN/VMOV. Some immediate types are unavailable
16014 first_error (_("immediate out of range"));
16282 (VFP float immediate load.)
16501 first_error (_("immediate out of range"));
16568 _("immediate out of range for shift"));
16829 /* Bits [4:6] of the immediate in a list specifier encode register stride
17323 _("immediate out of range"));
17363 constraint (rot != 90 && rot != 270, _("immediate out of range"));
20567 /* If not immediate, fall back to neon_dyadic_i64_su.
20599 /* Comparisons. Types S8 S16 S32 U8 U16 U32 F32. Non-immediate versions fall
20670 /* QSHL{U} immediate accepts S8 S16 S32 S64 U8 U16 U32 U64. */
20673 /* Right shift immediate, saturating & narrowing, with rounding variants.
20685 /* CVT with optional immediate for fixed-point variant. */
21266 really need it, like an immediate that's a trivial constant. So we're
21461 /* Return the size of a relaxable immediate operand instruction.
21462 SHIFT and SIZE specify the form of the allowable immediate. */
21562 /* Return the size of a relaxable add/sub immediate instruction. */
22509 an immediate address, eg:
22571 /* Subroutine of md_apply_fix. Check to see if an immediate can be
22572 computed as two separate immediate values, added together. We
22619 negative immediate constant by altering the instruction. A bit of
22820 for the 2 are identical for the immediate values. */
22896 msg = _("undefined symbol %s used as an immediate value");
22923 /* MOV accepts both ARM modified immediate (A1 encoding) and
22964 msg = _("undefined symbol %s used as an immediate value");
23040 _("bad immediate value for offset (%ld)"),
23070 _("bad immediate value for 8-bit offset (%ld)"),
23089 _("bad immediate value for offset (%ld)"), (long) value);
23099 load/store instruction with immediate offset:
23246 _("undefined symbol %s used as an immediate value"),
23258 Thumb2 modified immediate encoding (T2). */
23276 /* 12 bit immediate for addw/subw. */
23290 /* MOV accepts both Thumb2 modified immediate (T2 encoding) and
23721 /* This is a fp16 vstr/vldr. The immediate offset in the mnemonic
23749 It requires the immediate offset in the instruction is shifted
23842 the following immediate relocations:
23867 _("invalid Hi register with immediate"));
23876 _("immediate value out of range"));
23883 _("invalid immediate for stack address calculation"));
23930 _("invalid immediate for address calculation (value = 0x%08lX)"),
23940 _("immediate value out of range"));
23948 _("immediate value out of range"));
23960 _("invalid immediate: %ld is out of range"),