Lines Matching defs:defined

59 /* Pre-defined "_GLOBAL_OFFSET_TABLE_"	*/
99 unsigned char defined;
928 atype.defined = 0;
971 atype.defined |= NTA_HASVARWIDTH | NTA_HASTYPE;
978 atype.defined |= NTA_HASINDEX;
980 atype.defined |= NTA_HASTYPE;
1003 atype.defined |= NTA_HASINDEX;
1018 else if (!in_reg_list && (atype.defined & NTA_HASINDEX) != 0)
1026 if (type == REG_TYPE_VN && atype.defined == 0)
1079 && e1.defined == e2.defined
1126 typeinfo_first.defined = 0;
1150 if (type == REG_TYPE_VN && typeinfo.defined == 0)
1157 if (typeinfo.defined & NTA_HASINDEX)
1258 /* Only warn about a redefinition if it's not defined as the
1311 /* If TC_CASE_SENSITIVE is defined, then newname already points to
1368 /* The .unreq directive deletes an alias which was previously defined
1445 /* This code is to handle mapping symbols as defined in the ARM AArch64 ELF
3339 For different addressing modes defined in the A64 ISA:
3874 implementation defined system register name S<op0>_<op1>_<Cn>_<Cm>_<op2>.
4917 if (!vectype->defined || vectype->type == NT_invtype)
4927 if (vectype->defined & (NTA_HASINDEX | NTA_HASVARWIDTH))
5212 /* In reloc.c, these pseudo relocation types should be defined in similar
5401 if (vectype.defined & NTA_HASINDEX)
5459 if (vectype.type == NT_invtype || !(vectype.defined & NTA_HASINDEX))
5508 if (!(vectype.defined & NTA_HASINDEX))
5515 if (vectype.defined & NTA_HASINDEX)
5517 if (!(vectype.defined & NTA_HASTYPE))
6767 /* Table of all register names defined by default. The user can
6979 #else /* OBJ_ELF is defined. */
7052 #if defined (OBJ_MAYBE_ELF) || defined (OBJ_ELF)