Lines Matching defs:regs
23 void general_regs_fill_test_values(zx_thread_state_general_regs_t* regs) {
24 for (uint32_t index = 0; index < sizeof(*regs); ++index) {
25 ((uint8_t*)regs)[index] = static_cast<uint8_t>(index + 1);
37 regs->rflags =
53 regs->cpsr = 0xf0000000;
57 void fp_regs_fill_test_values(zx_thread_state_fp_regs* regs) {
58 memset(regs, 0, sizeof(zx_thread_state_fp_regs));
61 regs->st[i].low = i;
64 WriteNaNDouble(®s->st[7].low);
72 void vector_regs_fill_test_values(zx_thread_state_vector_regs* regs) {
73 memset(regs, 0, sizeof(zx_thread_state_vector_regs));
77 regs->zmm[i].v[0] = i;
78 regs->zmm[i].v[1] = i << 8;
79 regs->zmm[i].v[2] = 0;
80 regs->zmm[i].v[3] = 0;
84 WriteNaNDouble(®s->zmm[15].v[0]);
87 regs->v[i].low = i;
88 regs->v[i].high = i << 8;
92 WriteNaNDouble(®s->v[31].low);
155 // No FP regs on ARM (uses vector regs for FP).
469 // 128 bits so need to add 16 bytes each time. The 32 bytes is the start of the FP regs in