gpio/aml-axg-gpio/aml-axg-gpio.c

28 #define READ32_GPIO_REG(index, offset) \
29         readl((uint32_t*)gpio->mmios[index].vaddr + offset)
30 #define WRITE32_GPIO_REG(index, offset, value) \
31         writel(value, (uint32_t*)gpio->mmios[index].vaddr + offset)
103 static zx_status_t aml_gpio_config_in(void* ctx, uint32_t index, uint32_t flags) {
108     if ((status = aml_pin_to_block(gpio, index, &block)) != ZX_OK) {
109         zxlogf(ERROR, "aml_gpio_config: pin not found %u\n", index);
113     uint32_t pinindex = index - block->pin_block;
145 static zx_status_t aml_gpio_config_out(void* ctx, uint32_t index, uint8_t initial_value) {
150     if ((status = aml_pin_to_block(gpio, index, &block)) != ZX_OK) {
151         zxlogf(ERROR, "aml_gpio_config: pin not found %u\n", index);
155     uint32_t pinindex = index - block->pin_block;
221 static zx_status_t aml_gpio_read(void* ctx, uint32_t index, uint8_t* out_value) {
226     if ((status = aml_pin_to_block(gpio, index, &block)) != ZX_OK) {
227         zxlogf(ERROR, "aml_config_pinmux: pin not found %u\n", index);
231     uint32_t pinindex = index - block->pin_block;
249 static zx_status_t aml_gpio_write(void* ctx, uint32_t index, uint8_t value) {
254     if ((status = aml_pin_to_block(gpio, index, &block)) != ZX_OK) {
255         zxlogf(ERROR, "aml_gpio_write: pin not found %u\n", index);
259     uint32_t pinindex = index - block->pin_block;
296     uint32_t index = aml_gpio_get_unsed_irq_index(interrupt->irq_status);
297     if (index > interrupt->irq_count) {
304             zxlogf(ERROR, "GPIO Interrupt already configured for this pin %u\n", (int)index);
309     zxlogf(INFO, "GPIO Interrupt index %d allocated\n", (int)index);
324     status = pdev_get_interrupt(&gpio->pdev, index, flags_,
332     uint32_t pin_select_offset  = ((index>3)? interrupt->pin_4_7_select_offset: interrupt->pin_0_3_select_offset);
333     // Select GPIO IRQ(index) and program it to
336     regval |= (((pin - block->pin_block) + block->pin_start) << (index * BITS_PER_GPIO_INTERRUPT));
343         mode_reg_val = mode_reg_val | (1 << index);
344         mode_reg_val = mode_reg_val | ((1 << index) << GPIO_INTERRUPT_POLARITY_SHIFT);
347         mode_reg_val = mode_reg_val | (1 << index);
348         mode_reg_val = mode_reg_val & ~((1 << index) << GPIO_INTERRUPT_POLARITY_SHIFT);
351         mode_reg_val = mode_reg_val & ~(1 << index);
352         mode_reg_val = mode_reg_val | ((1 << index) << GPIO_INTERRUPT_POLARITY_SHIFT);
355         mode_reg_val = mode_reg_val & ~(1 << index);
356         mode_reg_val = mode_reg_val & ~((1 << index) << GPIO_INTERRUPT_POLARITY_SHIFT);
367                                regval | (0x7 << (index * BITS_PER_FILTER_SELECT)));
368     interrupt->irq_status |= 1 << index;
369     interrupt->irq_info[index] = pin;