ethernet/intel-ethernet/ie.c

25 #define writel(v, a) (*REG32(eth->iobase + (a)) = (v))
26 #define readl(a)     (*REG32(eth->iobase + (a)))
31 void eth_dump_regs(ethdev_t* eth) {
44 unsigned eth_handle_irq(ethdev_t* eth) {
49 bool eth_status_online(ethdev_t* eth) {
53 status_t eth_rx(ethdev_t* eth, void** data, size_t* len) {
54     uint32_t n = eth->rx_rd_ptr;
55     uint64_t info = eth->rxd[n].info;
64     *data = eth->rxb + ETH_RXBUF_SIZE * n;
70 void eth_rx_ack(ethdev_t* eth) {
71     uint32_t n = eth->rx_rd_ptr;
74     eth->rxd[n].info = 0;
77     eth->rx_rd_ptr = n;
80 void eth_enable_rx(ethdev_t* eth) {
85 void eth_disable_rx(ethdev_t* eth) {
90 static void reap_tx_buffers(ethdev_t* eth) {
91     uint32_t n = eth->tx_rd_ptr;
93         uint64_t info = eth->txd[n].info;
97         framebuf_t* frame = list_remove_head_type(&eth->busy_frames, framebuf_t, node);
102         list_add_tail(&eth->free_frames, &frame->node);
103         eth->txd[n].info = 0;
106     eth->tx_rd_ptr = n;
109 status_t eth_tx(ethdev_t* eth, const void* data, size_t len) {
111         printf("intel-eth: unsupported packet length %zu\n", len);
117     mtx_lock(&eth->send_lock);
119     reap_tx_buffers(eth);
122     framebuf_t *frame = list_remove_head_type(&eth->free_frames, framebuf_t, node);
128     uint32_t n = eth->tx_wr_ptr;
135     eth->txd[n].addr = frame->phys;
136     eth->txd[n].info = IE_TXD_LEN(len) | IE_TXD_EOP | IE_TXD_IFCS | IE_TXD_RS;
137     list_add_tail(&eth->busy_frames, &frame->node);
141     eth->tx_wr_ptr = n;
145     mtx_unlock(&eth->send_lock);
150 size_t eth_tx_queued(ethdev_t* eth) {
151     reap_tx_buffers(eth);
152     return ((eth->tx_wr_ptr + ETH_TXBUF_COUNT) - eth->tx_rd_ptr) & (ETH_TXBUF_COUNT - 1);
155 void eth_enable_tx(ethdev_t* eth) {
160 void eth_disable_tx(ethdev_t* eth) {
165 void eth_start_promisc(ethdev_t* eth) {
170 void eth_stop_promisc(ethdev_t* eth) {
175 static zx_status_t wait_for_mdic(ethdev_t* eth, uint32_t* reg_value) {
186     printf("intel-eth: timed out waiting for MDIC to be ready\n");
196 static zx_status_t phy_read(ethdev_t* eth, uint8_t phyadd, uint8_t regadd, uint16_t* result) {
201     zx_status_t status = wait_for_mdic(eth, &mdic);
208 static zx_status_t phy_write(ethdev_t* eth, uint8_t phyadd, uint8_t regadd, uint16_t value) {
214     return wait_for_mdic(eth, NULL);
217 static zx_status_t get_phy_addr(ethdev_t* eth, uint8_t* phy_addr) {
218     if (eth->phy_addr != 0) {
219         *phy_addr = eth->phy_addr;
223         zx_status_t status = phy_read(eth, addr, IE_PHY_PID, &pid);
230     printf("intel-eth: unable to identify valid PHY address\n");
234 zx_status_t eth_enable_phy(ethdev_t* eth) {
236     zx_status_t status = get_phy_addr(eth, &phy_addr);
242     status = phy_read(eth, phy_addr, IE_PHY_PCTRL, &phy_ctrl);
248         return phy_write(eth, phy_addr, IE_PHY_PCTRL, phy_ctrl & ~IE_PHY_PCTRL_POWER_DOWN);
253 zx_status_t eth_disable_phy(ethdev_t* eth) {
255     zx_status_t status = get_phy_addr(eth, &phy_addr);
261     status = phy_read(eth, phy_addr, IE_PHY_PCTRL, &phy_ctrl);
265     return phy_write(eth, phy_addr, IE_PHY_PCTRL, phy_ctrl | IE_PHY_PCTRL_POWER_DOWN);
268 status_t eth_reset_hw(ethdev_t* eth) {
273     memcpy(eth->mac + 0, &n, 4);
275     memcpy(eth->mac + 4, &n, 2);
276     printf("eth: mac: %02x:%02x:%02x:%02x:%02x:%02x\n",
277            eth->mac[0],eth->mac[1],eth->mac[2],
278            eth->mac[3],eth->mac[4],eth->mac[5]);
281     if (eth->pci_did == IE_DID_I211_AT) {
294     if (eth->pci_did == IE_DID_I211_AT) {
298             printf("eth: reset failed (1)\n");
303             printf("eth: reset failed (2)\n");
310             printf("eth: reset failed\n");
316     if (eth->pci_did == IE_DID_I211_AT) {
327 void eth_init_hw(ethdev_t* eth) {
339     eth->rx_rd_ptr = 0;
340     writel(eth->rxd_phys, IE_RDBAL);
341     writel(eth->rxd_phys >> 32, IE_RDBAH);
345     if (eth->pci_did == IE_DID_I211_AT) {
353     if (eth->pci_did == IE_DID_I211_AT) {
364     eth->tx_wr_ptr = 0;
365     eth->tx_rd_ptr = 0;
366     writel(eth->txd_phys, IE_TDBAL);
367     writel(eth->txd_phys >> 32, IE_TDBAH);
371     if (eth->pci_did == IE_DID_I211_AT) {
379     if (eth->pci_did == IE_DID_I211_AT) {
384     if (eth->pci_did == IE_DID_I211_AT) {
393     if (eth->pci_did == IE_DID_I211_AT) {
402 void eth_setup_buffers(ethdev_t* eth, void* iomem, zx_paddr_t iophys) {
403     printf("eth: iomem @%p (phys %" PRIxPTR ")\n", iomem, iophys);
405     list_initialize(&eth->free_frames);
406     list_initialize(&eth->busy_frames);
408     eth->rxd = iomem;
409     eth->rxd_phys = iophys;
412     memset(eth->rxd, 0, ETH_DRING_SIZE);
414     eth->txd = iomem;
415     eth->txd_phys = iophys;
418     memset(eth->txd, 0, ETH_DRING_SIZE);
420     eth->rxb = iomem;
421     eth->rxb_phys = iophys;
426         eth->rxd[n].addr = eth->rxb_phys + ETH_RXBUF_SIZE * n;
433         list_add_tail(&eth->free_frames, &txb->node);