display/vim-display/hdmitx.cpp

139     // c. Setup i2c timings (based on u-boot source)
369     active_lines = (p->timings.vactive / (1 + p->timings.interlace_mode));
370     total_lines = (active_lines + p->timings.vblank0) +
371                     ((active_lines + p->timings.vblank1)*p->timings.interlace_mode);
373     venc_total_pixels =  (p->timings.htotal / (p->timings.pixel_repeat + 1)) *
374                             (p->timings.venc_pixel_repeat + 1);
376     venc_active_pixels = (p->timings.hactive / (p->timings.pixel_repeat + 1)) *
377                             (p->timings.venc_pixel_repeat + 1);
379     venc_fp = (p->timings.hfront / (p->timings.pixel_repeat + 1)) *
380                             (p->timings.venc_pixel_repeat + 1);
382     venc_hsync = (p->timings.hsync / (p->timings.pixel_repeat + 1)) *
383                             (p->timings.venc_pixel_repeat + 1);
387     WRITE32_REG(VPU, VPU_ENCP_VIDEO_HAVON_BEGIN, p->timings.hsync + p->timings.hback);
388     WRITE32_REG(VPU, VPU_ENCP_VIDEO_HAVON_END, p->timings.hsync + p->timings.hback +
389         p->timings.hactive - 1);
391     WRITE32_REG(VPU, VPU_ENCP_VIDEO_VAVON_BLINE, p->timings.vsync + p->timings.vback);
392     WRITE32_REG(VPU, VPU_ENCP_VIDEO_VAVON_ELINE, p->timings.vsync + p->timings.vback +
393         p->timings.vactive - 1);
396     WRITE32_REG(VPU, VPU_ENCP_VIDEO_HSO_END, p->timings.hsync);
399     WRITE32_REG(VPU, VPU_ENCP_VIDEO_VSO_ELINE, p->timings.vsync);
403     h_begin = p->timings.hsync + p->timings.hback + 2;  // 2 is the HDMI Latency
412     v_begin = p->timings.vsync + p->timings.vback;
417     if (p->timings.interlace_mode) {
436     if (v_begin >= (p->timings.vback + p->timings.vsync + (1 - vsync_adjust))) {
437         vs_begin = v_begin - p->timings.vback - p->timings.vsync - (1 - vsync_adjust);
439         vs_begin = p->timings.vtotal + v_begin - p->timings.vback - p->timings.vsync -
442     vs_end = vs_begin + p->timings.vsync;
453     WRITE32_REG(VPU, VPU_HDMI_SETTING, (p->timings.hpol << 2) | (p->timings.vpol << 3) | (4 << 5));
455     if (p->timings.venc_pixel_repeat) {
557     hdmi_data |= FC_INVIDCONF_VSYNC_POL(p->timings.vpol);
558     hdmi_data |= FC_INVIDCONF_HSYNC_POL(p->timings.hpol);
561     if (p->timings.interlace_mode) {
567     hdmi_data = p->timings.hactive;
572     hdmi_data = p->timings.hblank;
577     hdmi_data = p->timings.vactive;
582     hdmi_data = p->timings.vblank0;
586     hdmi_data = p->timings.hfront;
591     hdmi_data = p->timings.hsync;
596     hdmi_data = p->timings.vfront;
600     hdmi_data = p->timings.vsync;
649     hdmi_data = p->timings.vactive;
660                                 ((p->timings.pixel_repeat + 1) << 4) |
661                                 (p->timings.pixel_repeat) << 0);
792     WRITE32_REG(VPU, VPU_ENCP_VIDEO_MAX_PXCNT, (p->timings.venc_pixel_repeat)?
793                 ((p->timings.htotal << 1) - 1) : (p->timings.htotal - 1));
794     WRITE32_REG(VPU, VPU_ENCP_VIDEO_MAX_LNCNT, p->timings.vtotal - 1);
796     if (p->timings.venc_pixel_repeat) {