display/astro-display/astro-clock.cpp

27     lcd_timing_.vid_pixel_on = de_hstart;
28     lcd_timing_.vid_line_on = de_vstart;
29     lcd_timing_.de_hs_addr = de_hstart;
30     lcd_timing_.de_he_addr = de_hstart + d.h_active;
31     lcd_timing_.de_vs_addr = de_vstart;
32     lcd_timing_.de_ve_addr = de_vstart + d.v_active - 1;
37     lcd_timing_.hs_hs_addr = hstart;
38     lcd_timing_.hs_he_addr = hend;
39     lcd_timing_.hs_vs_addr = 0;
40     lcd_timing_.hs_ve_addr = d.v_period - 1;
43     lcd_timing_.vs_hs_addr = (hstart + d.h_period) % d.h_period;
44     lcd_timing_.vs_he_addr = lcd_timing_.vs_hs_addr;
47     lcd_timing_.vs_vs_addr = vstart;
48     lcd_timing_.vs_ve_addr = vend;
272     WRITE32_REG(VPU, ENCL_VIDEO_HAVON_BEGIN, lcd_timing_.vid_pixel_on);
273     WRITE32_REG(VPU, ENCL_VIDEO_HAVON_END,   d.h_active - 1 + lcd_timing_.vid_pixel_on);
274     WRITE32_REG(VPU, ENCL_VIDEO_VAVON_BLINE, lcd_timing_.vid_line_on);
275     WRITE32_REG(VPU, ENCL_VIDEO_VAVON_ELINE, d.v_active - 1  + lcd_timing_.vid_line_on);
276     WRITE32_REG(VPU, ENCL_VIDEO_HSO_BEGIN, lcd_timing_.hs_hs_addr);
277     WRITE32_REG(VPU, ENCL_VIDEO_HSO_END,   lcd_timing_.hs_he_addr);
278     WRITE32_REG(VPU, ENCL_VIDEO_VSO_BEGIN, lcd_timing_.vs_hs_addr);
279     WRITE32_REG(VPU, ENCL_VIDEO_VSO_END,   lcd_timing_.vs_he_addr);
280     WRITE32_REG(VPU, ENCL_VIDEO_VSO_BLINE, lcd_timing_.vs_vs_addr);
281     WRITE32_REG(VPU, ENCL_VIDEO_VSO_ELINE, lcd_timing_.vs_ve_addr);
290     WRITE32_REG(VPU, L_OEH_HS_ADDR, lcd_timing_.de_hs_addr);
291     WRITE32_REG(VPU, L_OEH_HE_ADDR, lcd_timing_.de_he_addr);
292     WRITE32_REG(VPU, L_OEH_VS_ADDR, lcd_timing_.de_vs_addr);
293     WRITE32_REG(VPU, L_OEH_VE_ADDR, lcd_timing_.de_ve_addr);
295     WRITE32_REG(VPU, L_OEV1_HS_ADDR,  lcd_timing_.de_hs_addr);
296     WRITE32_REG(VPU, L_OEV1_HE_ADDR,  lcd_timing_.de_he_addr);
297     WRITE32_REG(VPU, L_OEV1_VS_ADDR,  lcd_timing_.de_vs_addr);
298     WRITE32_REG(VPU, L_OEV1_VE_ADDR,  lcd_timing_.de_ve_addr);
302         WRITE32_REG(VPU, L_STH1_HS_ADDR, lcd_timing_.hs_he_addr);
303         WRITE32_REG(VPU, L_STH1_HE_ADDR, lcd_timing_.hs_hs_addr);
305         WRITE32_REG(VPU, L_STH1_HS_ADDR, lcd_timing_.hs_hs_addr);
306         WRITE32_REG(VPU, L_STH1_HE_ADDR, lcd_timing_.hs_he_addr);
308     WRITE32_REG(VPU, L_STH1_VS_ADDR, lcd_timing_.hs_vs_addr);
309     WRITE32_REG(VPU, L_STH1_VE_ADDR, lcd_timing_.hs_ve_addr);
312     WRITE32_REG(VPU, L_STV1_HS_ADDR, lcd_timing_.vs_hs_addr);
313     WRITE32_REG(VPU, L_STV1_HE_ADDR, lcd_timing_.vs_he_addr);
315         WRITE32_REG(VPU, L_STV1_VS_ADDR, lcd_timing_.vs_ve_addr);
316         WRITE32_REG(VPU, L_STV1_VE_ADDR, lcd_timing_.vs_vs_addr);
318         WRITE32_REG(VPU, L_STV1_VS_ADDR, lcd_timing_.vs_vs_addr);
319         WRITE32_REG(VPU, L_STV1_VE_ADDR, lcd_timing_.vs_ve_addr);
323     WRITE32_REG(VPU, L_DE_HS_ADDR,    lcd_timing_.de_hs_addr);
324     WRITE32_REG(VPU, L_DE_HE_ADDR,    lcd_timing_.de_he_addr);
325     WRITE32_REG(VPU, L_DE_VS_ADDR,    lcd_timing_.de_vs_addr);
326     WRITE32_REG(VPU, L_DE_VE_ADDR,    lcd_timing_.de_ve_addr);
329     WRITE32_REG(VPU, L_HSYNC_HS_ADDR,  lcd_timing_.hs_hs_addr);
330     WRITE32_REG(VPU, L_HSYNC_HE_ADDR,  lcd_timing_.hs_he_addr);
331     WRITE32_REG(VPU, L_HSYNC_VS_ADDR,  lcd_timing_.hs_vs_addr);
332     WRITE32_REG(VPU, L_HSYNC_VE_ADDR,  lcd_timing_.hs_ve_addr);
335     WRITE32_REG(VPU, L_VSYNC_HS_ADDR,  lcd_timing_.vs_hs_addr);
336     WRITE32_REG(VPU, L_VSYNC_HE_ADDR,  lcd_timing_.vs_he_addr);
337     WRITE32_REG(VPU, L_VSYNC_VS_ADDR,  lcd_timing_.vs_vs_addr);
338     WRITE32_REG(VPU, L_VSYNC_VE_ADDR,  lcd_timing_.vs_ve_addr);
406     DISP_INFO("vid_pixel_on = 0x%x (%u)\n", lcd_timing_.vid_pixel_on,
407               lcd_timing_.vid_pixel_on);
408     DISP_INFO("vid_line_on = 0x%x (%u)\n", lcd_timing_.vid_line_on,
409               lcd_timing_.vid_line_on);
410     DISP_INFO("de_hs_addr = 0x%x (%u)\n", lcd_timing_.de_hs_addr,
411               lcd_timing_.de_hs_addr);
412     DISP_INFO("de_he_addr = 0x%x (%u)\n", lcd_timing_.de_he_addr,
413               lcd_timing_.de_he_addr);
414     DISP_INFO("de_vs_addr = 0x%x (%u)\n", lcd_timing_.de_vs_addr,
415               lcd_timing_.de_vs_addr);
416     DISP_INFO("de_ve_addr = 0x%x (%u)\n", lcd_timing_.de_ve_addr,
417               lcd_timing_.de_ve_addr);
418     DISP_INFO("hs_hs_addr = 0x%x (%u)\n", lcd_timing_.hs_hs_addr,
419               lcd_timing_.hs_hs_addr);
420     DISP_INFO("hs_he_addr = 0x%x (%u)\n", lcd_timing_.hs_he_addr,
421               lcd_timing_.hs_he_addr);
422     DISP_INFO("hs_vs_addr = 0x%x (%u)\n", lcd_timing_.hs_vs_addr,
423               lcd_timing_.hs_vs_addr);
424     DISP_INFO("hs_ve_addr = 0x%x (%u)\n", lcd_timing_.hs_ve_addr,
425               lcd_timing_.hs_ve_addr);
426     DISP_INFO("vs_hs_addr = 0x%x (%u)\n", lcd_timing_.vs_hs_addr,
427               lcd_timing_.vs_hs_addr);
428     DISP_INFO("vs_he_addr = 0x%x (%u)\n", lcd_timing_.vs_he_addr,
429               lcd_timing_.vs_he_addr);
430     DISP_INFO("vs_vs_addr = 0x%x (%u)\n", lcd_timing_.vs_vs_addr,
431               lcd_timing_.vs_vs_addr);
432     DISP_INFO("vs_ve_addr = 0x%x (%u)\n", lcd_timing_.vs_ve_addr,
433               lcd_timing_.vs_ve_addr);