Lines Matching refs:offset

16 void PciLegacyBackend::IoReadLocked(uint16_t offset, uint8_t* val) TA_REQ(lock_) {
17 *val = inp(static_cast<uint16_t>(bar0_base_ + offset));
18 zxlogf(SPEW, "%s: IoReadLocked8(%#x) = %#x\n", tag(), offset, *val);
20 void PciLegacyBackend::IoReadLocked(uint16_t offset, uint16_t* val) TA_REQ(lock_) {
21 *val = inpw(static_cast<uint16_t>(bar0_base_ + offset));
22 zxlogf(SPEW, "%s: IoReadLocked16(%#x) = %#x\n", tag(), offset, *val);
24 void PciLegacyBackend::IoReadLocked(uint16_t offset, uint32_t* val) TA_REQ(lock_) {
25 *val = inpd(static_cast<uint16_t>(bar0_base_ + offset));
26 zxlogf(SPEW, "%s: IoReadLocked32(%#x) = %#x\n", tag(), offset, *val);
28 void PciLegacyBackend::IoWriteLocked(uint16_t offset, uint8_t val) TA_REQ(lock_) {
29 outp(static_cast<uint16_t>(bar0_base_ + offset), val);
30 zxlogf(SPEW, "%s: IoWriteLocked8(%#x) = %#x\n", tag(), offset, val);
32 void PciLegacyBackend::IoWriteLocked(uint16_t offset, uint16_t val) TA_REQ(lock_) {
33 outpw(static_cast<uint16_t>(bar0_base_ + offset), val);
34 zxlogf(SPEW, "%s: IoWriteLocked16(%#x) = %#x\n", tag(), offset, val);
36 void PciLegacyBackend::IoWriteLocked(uint16_t offset, uint32_t val) TA_REQ(lock_) {
37 outpd(static_cast<uint16_t>(bar0_base_ + offset), val);
38 zxlogf(SPEW, "%s: IoWriteLocked32(%#x) = %#x\n", tag(), offset, val);
56 // the extra two fields here that offset the device config.
72 void PciLegacyBackend::DeviceConfigRead(uint16_t offset, uint8_t* value) {
74 IoReadLocked(static_cast<uint16_t>(device_cfg_offset_ + offset), value);
77 void PciLegacyBackend::DeviceConfigRead(uint16_t offset, uint16_t* value) {
79 IoReadLocked(static_cast<uint16_t>(device_cfg_offset_ + offset), value);
82 void PciLegacyBackend::DeviceConfigRead(uint16_t offset, uint32_t* value) {
84 IoReadLocked(static_cast<uint16_t>(device_cfg_offset_ + offset), value);
87 void PciLegacyBackend::DeviceConfigRead(uint16_t offset, uint64_t* value) {
91 IoReadLocked(static_cast<uint16_t>(device_cfg_offset_ + offset), &val[0]);
92 IoReadLocked(static_cast<uint16_t>(device_cfg_offset_ + offset + sizeof(uint32_t)), &val[1]);
95 void PciLegacyBackend::DeviceConfigWrite(uint16_t offset, uint8_t value) {
97 IoWriteLocked(static_cast<uint16_t>(device_cfg_offset_ + offset), value);
100 void PciLegacyBackend::DeviceConfigWrite(uint16_t offset, uint16_t value) {
102 IoWriteLocked(static_cast<uint16_t>(device_cfg_offset_ + offset), value);
105 void PciLegacyBackend::DeviceConfigWrite(uint16_t offset, uint32_t value) {
107 IoWriteLocked(static_cast<uint16_t>(device_cfg_offset_ + offset), value);
109 void PciLegacyBackend::DeviceConfigWrite(uint16_t offset, uint64_t value) {
112 IoWriteLocked(static_cast<uint16_t>(device_cfg_offset_ + offset), words[0]);
113 IoWriteLocked(static_cast<uint16_t>(device_cfg_offset_ + offset + sizeof(uint32_t)), words[1]);