Lines Matching defs:PciLegacyBackend

16 void PciLegacyBackend::IoReadLocked(uint16_t offset, uint8_t* val) TA_REQ(lock_) {
20 void PciLegacyBackend::IoReadLocked(uint16_t offset, uint16_t* val) TA_REQ(lock_) {
24 void PciLegacyBackend::IoReadLocked(uint16_t offset, uint32_t* val) TA_REQ(lock_) {
28 void PciLegacyBackend::IoWriteLocked(uint16_t offset, uint8_t val) TA_REQ(lock_) {
32 void PciLegacyBackend::IoWriteLocked(uint16_t offset, uint16_t val) TA_REQ(lock_) {
36 void PciLegacyBackend::IoWriteLocked(uint16_t offset, uint32_t val) TA_REQ(lock_) {
41 zx_status_t PciLegacyBackend::Init() {
65 PciLegacyBackend::~PciLegacyBackend() {
72 void PciLegacyBackend::DeviceConfigRead(uint16_t offset, uint8_t* value) {
77 void PciLegacyBackend::DeviceConfigRead(uint16_t offset, uint16_t* value) {
82 void PciLegacyBackend::DeviceConfigRead(uint16_t offset, uint32_t* value) {
87 void PciLegacyBackend::DeviceConfigRead(uint16_t offset, uint64_t* value) {
95 void PciLegacyBackend::DeviceConfigWrite(uint16_t offset, uint8_t value) {
100 void PciLegacyBackend::DeviceConfigWrite(uint16_t offset, uint16_t value) {
105 void PciLegacyBackend::DeviceConfigWrite(uint16_t offset, uint32_t value) {
109 void PciLegacyBackend::DeviceConfigWrite(uint16_t offset, uint64_t value) {
117 uint16_t PciLegacyBackend::GetRingSize(uint16_t index) {
127 void PciLegacyBackend::SetRing(uint16_t index, uint16_t count, zx_paddr_t pa_desc,
137 void PciLegacyBackend::RingKick(uint16_t ring_index) {
143 bool PciLegacyBackend::ReadFeature(uint32_t feature) {
159 void PciLegacyBackend::SetFeature(uint32_t feature) {
175 zx_status_t PciLegacyBackend::ConfirmFeatures() {
179 void PciLegacyBackend::DeviceReset() {
185 void PciLegacyBackend::SetStatusBits(uint8_t bits) {
192 void PciLegacyBackend::DriverStatusAck() {
197 void PciLegacyBackend::DriverStatusOk() {
202 uint32_t PciLegacyBackend::IsrStatus() {