Lines Matching refs:ctrl2
629 regs->ctrl2 |= SDHCI_HOSTCTRL2_1P8V_SIGNALLING_ENA;
633 if (!(regs->ctrl2 & SDHCI_HOSTCTRL2_1P8V_SIGNALLING_ENA)) {
642 regs->ctrl2 &= ~SDHCI_HOSTCTRL2_1P8V_SIGNALLING_ENA;
646 if (regs->ctrl2 & SDHCI_HOSTCTRL2_1P8V_SIGNALLING_ENA) {
791 uint32_t ctrl2 = dev->regs->ctrl2 & ~SDHCI_HOSTCTRL2_UHS_MODE_SELECT_MASK;
793 ctrl2 |= SDHCI_HOSTCTRL2_UHS_MODE_SELECT_SDR104;
795 ctrl2 |= SDHCI_HOSTCTRL2_UHS_MODE_SELECT_HS400;
797 ctrl2 |= SDHCI_HOSTCTRL2_UHS_MODE_SELECT_DDR50;
799 dev->regs->ctrl2 = ctrl2;
869 dev->regs->ctrl2 |= SDHCI_HOSTCTRL2_EXEC_TUNING;
883 } while ((dev->regs->ctrl2 & SDHCI_HOSTCTRL2_EXEC_TUNING) && count++ < MAX_TUNING_COUNT);
885 bool fail = (dev->regs->ctrl2 & SDHCI_HOSTCTRL2_EXEC_TUNING) ||
886 !(dev->regs->ctrl2 & SDHCI_HOSTCTRL2_CLOCK_SELECT);