Lines Matching defs:pipeline
19 // 2 Pipelines are needed because only one instance of a module can exist in a pipeline.
26 // 2 Pipelines are needed because only one instance of a module can exist in a pipeline.
405 // Create pipeline 0 modules. Host DMA -> mixin
416 // Bind pipeline 0
423 // Create pipeline 1 modules. mixout -> I2S DMA
436 // Bind pipeline 1
443 // Create pipeline 2 modules. I2S DMA -> mixin
455 // Bind pipeline 2
462 // Create pipeline 3 modules. mixout -> Host DMA
472 // Bind pipeline 2
479 // Bind playback pipeline
486 // Bind capture pipeline
496 zx_status_t IntelAudioDsp::StartPipeline(const DspPipeline& pipeline) {
498 zx_status_t st = RunPipeline(pipeline.pl_sink);
502 return RunPipeline(pipeline.pl_source);
506 zx_status_t IntelAudioDsp::PausePipeline(const DspPipeline& pipeline) {
507 zx_status_t st = ipc_.SetPipelineState(pipeline.pl_source, PipelineState::PAUSED, true);
511 st = ipc_.SetPipelineState(pipeline.pl_sink, PipelineState::PAUSED, true);
516 st = ipc_.SetPipelineState(pipeline.pl_source, PipelineState::RESET, true);
520 return ipc_.SetPipelineState(pipeline.pl_sink, PipelineState::RESET, true);
531 struct DspPipeline pipeline;
538 .pipeline = {
549 stream_def.pipeline,