Lines Matching refs:regs
248 u_int regs[4], i;
263 do_cpuid(i, regs);
264 memcpy(brand, regs, sizeof(regs));
265 brand += sizeof(regs);
1047 cpuid_count(0xd, 0x1, regs);
1048 if (regs[0] != 0) {
1050 regs[0],
1379 u_int leaf, regs[4];
1395 do_cpuid(leaf, regs);
1404 if (regs[0] == 0 && regs[1] == 0x4b4d564b &&
1405 regs[2] == 0x564b4d56 && regs[3] == 0x0000004d)
1406 regs[0] = leaf + 1;
1408 if (regs[0] >= leaf) {
1412 if (strncmp((const char *)®s[1],
1426 hv_high = regs[0];
1427 ((u_int *)&hv_vendor)[0] = regs[1];
1428 ((u_int *)&hv_vendor)[1] = regs[2];
1429 ((u_int *)&hv_vendor)[2] = regs[3];
1460 u_int regs[4];
1485 VMW_HVCMD_DEFAULT_PARAM, regs);
1486 if (regs[1] == VMW_HVMAGIC) {
1544 u_int regs[4];
1546 do_cpuid(0, regs);
1547 cpu_high = regs[0];
1548 ((u_int *)&cpu_vendor)[0] = regs[1];
1549 ((u_int *)&cpu_vendor)[1] = regs[3];
1550 ((u_int *)&cpu_vendor)[2] = regs[2];
1553 do_cpuid(1, regs);
1554 cpu_id = regs[0];
1555 cpu_procinfo = regs[1];
1556 cpu_feature = regs[3];
1557 cpu_feature2 = regs[2];
1563 u_int regs[4], cpu_stdext_disable;
1566 cpuid_count(6, 0, regs);
1567 cpu_power_eax = regs[0];
1568 cpu_power_ebx = regs[1];
1569 cpu_power_ecx = regs[2];
1570 cpu_power_edx = regs[3];
1574 cpuid_count(7, 0, regs);
1575 cpu_stdext_feature = regs[1];
1587 cpu_stdext_feature2 = regs[2];
1588 cpu_stdext_feature3 = regs[3];
1598 u_int regs[4];
1601 cpuid_count(7, 0, regs);
1602 cpu_stdext_feature2 = regs[2];
1603 cpu_stdext_feature3 = regs[3];
1610 u_int regs[4];
1615 do_cpuid(0, regs);
1616 cpu_high = regs[0];
1626 u_int regs[4];
1634 do_cpuid(5, regs);
1635 cpu_mon_mwait_flags = regs[2];
1636 cpu_mon_min_size = regs[0] & CPUID5_MON_MIN_SIZE;
1637 cpu_mon_max_size = regs[1] & CPUID5_MON_MAX_SIZE;
1650 do_cpuid(0x80000000, regs);
1651 if (regs[0] >= 0x80000000)
1652 cpu_exthigh = regs[0];
1659 do_cpuid(0x80000000, regs);
1660 cpu_exthigh = regs[0];
1664 do_cpuid(0x80000001, regs);
1665 amd_feature = regs[3] & ~(cpu_feature & 0x0183f3ff);
1666 amd_feature2 = regs[2];
1669 do_cpuid(0x80000007, regs);
1670 amd_rascap = regs[1];
1671 amd_pminfo = regs[3];
1674 do_cpuid(0x80000008, regs);
1675 cpu_maxphyaddr = regs[0] & 0xff;
1676 amd_extended_feature_extensions = regs[1];
1677 cpu_procinfo2 = regs[2];
1678 cpu_procinfo3 = regs[3];
1748 do_cpuid(0, regs);
1749 cpu_high = regs[0]; /* eax */
1750 do_cpuid(1, regs);
1751 cpu_id = regs[0]; /* eax */
1752 cpu_feature = regs[3]; /* edx */
1827 u_int regs[4];
1830 do_cpuid(0x80000005, regs);
1831 printf("L1 2MB data TLB: %d entries", (regs[0] >> 16) & 0xff);
1832 print_AMD_assoc(regs[0] >> 24);
1834 printf("L1 2MB instruction TLB: %d entries", regs[0] & 0xff);
1835 print_AMD_assoc((regs[0] >> 8) & 0xff);
1837 printf("L1 4KB data TLB: %d entries", (regs[1] >> 16) & 0xff);
1838 print_AMD_assoc(regs[1] >> 24);
1840 printf("L1 4KB instruction TLB: %d entries", regs[1] & 0xff);
1841 print_AMD_assoc((regs[1] >> 8) & 0xff);
1843 printf("L1 data cache: %d kbytes", regs[2] >> 24);
1844 printf(", %d bytes/line", regs[2] & 0xff);
1845 printf(", %d lines/tag", (regs[2] >> 8) & 0xff);
1846 print_AMD_assoc((regs[2] >> 16) & 0xff);
1848 printf("L1 instruction cache: %d kbytes", regs[3] >> 24);
1849 printf(", %d bytes/line", regs[3] & 0xff);
1850 printf(", %d lines/tag", (regs[3] >> 8) & 0xff);
1851 print_AMD_assoc((regs[3] >> 16) & 0xff);
1855 do_cpuid(0x80000006, regs);
1856 if ((regs[0] >> 16) != 0) {
1858 (regs[0] >> 16) & 0xfff);
1859 print_AMD_l2_assoc(regs[0] >> 28);
1861 regs[0] & 0xfff);
1862 print_AMD_l2_assoc((regs[0] >> 28) & 0xf);
1865 regs[0] & 0xfff);
1866 print_AMD_l2_assoc((regs[0] >> 28) & 0xf);
1868 if ((regs[1] >> 16) != 0) {
1870 (regs[1] >> 16) & 0xfff);
1871 print_AMD_l2_assoc(regs[1] >> 28);
1874 (regs[1] >> 16) & 0xfff);
1875 print_AMD_l2_assoc((regs[1] >> 28) & 0xf);
1878 (regs[1] >> 16) & 0xfff);
1879 print_AMD_l2_assoc((regs[1] >> 28) & 0xf);
1881 printf("L2 unified cache: %d kbytes", regs[2] >> 16);
1882 printf(", %d bytes/line", regs[2] & 0xff);
1883 printf(", %d lines/tag", (regs[2] >> 8) & 0x0f);
1884 print_AMD_l2_assoc((regs[2] >> 12) & 0x0f);
1937 u_int regs[4];
1944 do_cpuid(0x2, regs);
1945 if (rounds == 0 && (rounds = (regs[0] & 0xff)) == 0)
1949 if (regs[regnum] & (1<<31))
1952 print_INTEL_TLB(regs[regnum] & 0xff);
1953 print_INTEL_TLB((regs[regnum] >> 8) & 0xff);
1954 print_INTEL_TLB((regs[regnum] >> 16) & 0xff);
1955 print_INTEL_TLB((regs[regnum] >> 24) & 0xff);
1961 do_cpuid(0x80000006, regs);
1962 nwaycode = (regs[2] >> 12) & 0x0f;
1968 (regs[2] >> 16) & 0xffff, nway, regs[2] & 0xff);
2323 u_int features, regs[4];
2328 do_cpuid(0x8000000A, regs);
2329 features = regs[3];
2357 printf("%sNAsids=%d", comma ? "," : "", regs[1]);
2396 printf("\nRevision=%d, ASIDs=%d", regs[0] & 0xff, regs[1]);
2403 u_int regs[4], nreg = 0;
2405 do_cpuid(0x80860000, regs);
2406 nreg = regs[0];
2408 do_cpuid(0x80860001, regs);
2410 (regs[1] >> 24) & 0xff,
2411 (regs[1] >> 16) & 0xff,
2412 (regs[1] >> 8) & 0xff,
2413 regs[1] & 0xff);
2416 do_cpuid(0x80860002, regs);
2418 (regs[1] >> 24) & 0xff,
2419 (regs[1] >> 16) & 0xff,
2420 (regs[1] >> 8) & 0xff,
2421 regs[1] & 0xff,
2422 regs[2]);
2439 u_int regs[4];
2441 do_cpuid(0xc0000001, regs);
2442 printf("\n VIA Padlock Features=0x%b", regs[3],