Lines Matching refs:sc
404 envy24_rdcs(struct sc_info *sc, int regno, int size)
408 return bus_space_read_1(sc->cst, sc->csh, regno);
410 return bus_space_read_2(sc->cst, sc->csh, regno);
412 return bus_space_read_4(sc->cst, sc->csh, regno);
419 envy24_wrcs(struct sc_info *sc, int regno, u_int32_t data, int size)
423 bus_space_write_1(sc->cst, sc->csh, regno, data);
426 bus_space_write_2(sc->cst, sc->csh, regno, data);
429 bus_space_write_4(sc->cst, sc->csh, regno, data);
435 envy24_rdmt(struct sc_info *sc, int regno, int size)
439 return bus_space_read_1(sc->mtt, sc->mth, regno);
441 return bus_space_read_2(sc->mtt, sc->mth, regno);
443 return bus_space_read_4(sc->mtt, sc->mth, regno);
450 envy24_wrmt(struct sc_info *sc, int regno, u_int32_t data, int size)
454 bus_space_write_1(sc->mtt, sc->mth, regno, data);
457 bus_space_write_2(sc->mtt, sc->mth, regno, data);
460 bus_space_write_4(sc->mtt, sc->mth, regno, data);
466 envy24_rdci(struct sc_info *sc, int regno)
468 envy24_wrcs(sc, ENVY24_CCS_INDEX, regno, 1);
469 return envy24_rdcs(sc, ENVY24_CCS_DATA, 1);
473 envy24_wrci(struct sc_info *sc, int regno, u_int32_t data)
475 envy24_wrcs(sc, ENVY24_CCS_INDEX, regno, 1);
476 envy24_wrcs(sc, ENVY24_CCS_DATA, data, 1);
484 envy24_rdi2c(struct sc_info *sc, u_int32_t dev, u_int32_t addr)
490 device_printf(sc->dev, "envy24_rdi2c(sc, 0x%02x, 0x%02x)\n", dev, addr);
493 data = envy24_rdcs(sc, ENVY24_CCS_I2CSTAT, 1);
501 envy24_wrcs(sc, ENVY24_CCS_I2CADDR, addr, 1);
502 envy24_wrcs(sc, ENVY24_CCS_I2CDEV,
505 data = envy24_rdcs(sc, ENVY24_CCS_I2CSTAT, 1);
513 data = envy24_rdcs(sc, ENVY24_CCS_I2CDATA, 1);
516 device_printf(sc->dev, "envy24_rdi2c(): return 0x%x\n", data);
523 envy24_wri2c(struct sc_info *sc, u_int32_t dev, u_int32_t addr, u_int32_t data)
529 device_printf(sc->dev, "envy24_rdi2c(sc, 0x%02x, 0x%02x)\n", dev, addr);
532 tmp = envy24_rdcs(sc, ENVY24_CCS_I2CSTAT, 1);
540 envy24_wrcs(sc, ENVY24_CCS_I2CADDR, addr, 1);
541 envy24_wrcs(sc, ENVY24_CCS_I2CDATA, data, 1);
542 envy24_wrcs(sc, ENVY24_CCS_I2CDEV,
545 data = envy24_rdcs(sc, ENVY24_CCS_I2CSTAT, 1);
559 envy24_rdrom(struct sc_info *sc, u_int32_t addr)
564 device_printf(sc->dev, "envy24_rdrom(sc, 0x%02x)\n", addr);
566 data = envy24_rdcs(sc, ENVY24_CCS_I2CSTAT, 1);
569 device_printf(sc->dev, "envy24_rdrom(): E2PROM not presented\n");
574 return envy24_rdi2c(sc, ENVY24_CCS_I2CDEV_ROM, addr);
578 envy24_rom2cfg(struct sc_info *sc)
585 device_printf(sc->dev, "envy24_rom2cfg(sc)\n");
587 size = envy24_rdrom(sc, ENVY24_E2PROM_SIZE);
590 device_printf(sc->dev, "envy24_rom2cfg(): ENVY24_E2PROM_SIZE-->%d\n", size);
597 device_printf(sc->dev, "envy24_rom2cfg(): malloc()\n");
603 buff->subvendor = envy24_rdrom(sc, ENVY24_E2PROM_SUBVENDOR) << 8;
604 buff->subvendor += envy24_rdrom(sc, ENVY24_E2PROM_SUBVENDOR + 1);
605 buff->subdevice = envy24_rdrom(sc, ENVY24_E2PROM_SUBDEVICE) << 8;
606 buff->subdevice += envy24_rdrom(sc, ENVY24_E2PROM_SUBDEVICE + 1);
607 buff->scfg = envy24_rdrom(sc, ENVY24_E2PROM_SCFG);
608 buff->acl = envy24_rdrom(sc, ENVY24_E2PROM_ACL);
609 buff->i2s = envy24_rdrom(sc, ENVY24_E2PROM_I2S);
610 buff->spdif = envy24_rdrom(sc, ENVY24_E2PROM_SPDIF);
611 buff->gpiomask = envy24_rdrom(sc, ENVY24_E2PROM_GPIOMASK);
612 buff->gpiostate = envy24_rdrom(sc, ENVY24_E2PROM_GPIOSTATE);
613 buff->gpiodir = envy24_rdrom(sc, ENVY24_E2PROM_GPIODIR);
640 envy24_coldcd(struct sc_info *sc)
646 device_printf(sc->dev, "envy24_coldcd()\n");
648 envy24_wrmt(sc, ENVY24_MT_AC97CMD, ENVY24_MT_AC97CMD_CLD, 1);
650 envy24_wrmt(sc, ENVY24_MT_AC97CMD, 0, 1);
653 data = envy24_rdmt(sc, ENVY24_MT_AC97CMD, 1);
664 envy24_slavecd(struct sc_info *sc)
670 device_printf(sc->dev, "envy24_slavecd()\n");
672 envy24_wrmt(sc, ENVY24_MT_AC97CMD,
675 envy24_wrmt(sc, ENVY24_MT_AC97CMD, 0, 1);
678 data = envy24_rdmt(sc, ENVY24_MT_AC97CMD, 1);
691 struct sc_info *sc = (struct sc_info *)devinfo;
696 device_printf(sc->dev, "envy24_rdcd(obj, sc, 0x%02x)\n", regno);
698 envy24_wrmt(sc, ENVY24_MT_AC97IDX, (u_int32_t)regno, 1);
699 envy24_wrmt(sc, ENVY24_MT_AC97CMD, ENVY24_MT_AC97CMD_RD, 1);
701 data = envy24_rdmt(sc, ENVY24_MT_AC97CMD, 1);
705 data = envy24_rdmt(sc, ENVY24_MT_AC97DLO, 2);
708 device_printf(sc->dev, "envy24_rdcd(): return 0x%x\n", data);
716 struct sc_info *sc = (struct sc_info *)devinfo;
721 device_printf(sc->dev, "envy24_wrcd(obj, sc, 0x%02x, 0x%04x)\n", regno, data);
723 envy24_wrmt(sc, ENVY24_MT_AC97IDX, (u_int32_t)regno, 1);
724 envy24_wrmt(sc, ENVY24_MT_AC97DLO, (u_int32_t)data, 2);
725 envy24_wrmt(sc, ENVY24_MT_AC97CMD, ENVY24_MT_AC97CMD_WR, 1);
727 cmd = envy24_rdmt(sc, ENVY24_MT_AC97CMD, 1);
748 envy24_gpiord(struct sc_info *sc)
750 return envy24_rdci(sc, ENVY24_CCI_GPIODAT);
754 envy24_gpiowr(struct sc_info *sc, u_int32_t data)
757 device_printf(sc->dev, "envy24_gpiowr(sc, 0x%02x)\n", data & 0xff);
760 envy24_wrci(sc, ENVY24_CCI_GPIODAT, data);
766 envy24_gpiogetmask(struct sc_info *sc)
768 return envy24_rdci(sc, ENVY24_CCI_GPIOMASK);
773 envy24_gpiosetmask(struct sc_info *sc, u_int32_t mask)
775 envy24_wrci(sc, ENVY24_CCI_GPIOMASK, mask);
781 envy24_gpiogetdir(struct sc_info *sc)
783 return envy24_rdci(sc, ENVY24_CCI_GPIOCTL);
788 envy24_gpiosetdir(struct sc_info *sc, u_int32_t dir)
790 envy24_wrci(sc, ENVY24_CCI_GPIOCTL, dir);
931 struct sc_info *sc = info;
935 device_printf(sc->dev, "envy24_delta_ak4524_create(dev, sc, %d, %d)\n", dir, num);
942 if (dir == PCMDIR_REC && sc->adc[num] != NULL)
943 buff->info = ((struct envy24_delta_ak4524_codec *)sc->adc[num])->info;
944 else if (dir == PCMDIR_PLAY && sc->dac[num] != NULL)
945 buff->info = ((struct envy24_delta_ak4524_codec *)sc->dac[num])->info;
953 buff->parent = sc;
1096 envy24_setspeed(struct sc_info *sc, u_int32_t speed) {
1101 device_printf(sc->dev, "envy24_setspeed(sc, %d)\n", speed);
1105 envy24_slavecd(sc);
1115 device_printf(sc->dev, "envy24_setspeed(): speed %d/code 0x%04x\n", envy24_speedtab[i].speed, code);
1118 envy24_wrmt(sc, ENVY24_MT_RATE, code, 1);
1119 code = envy24_rdmt(sc, ENVY24_MT_RATE, 1);
1131 device_printf(sc->dev, "envy24_setspeed(): return %d\n", speed);
1137 envy24_setvolume(struct sc_info *sc, unsigned ch)
1140 device_printf(sc->dev, "envy24_setvolume(sc, %d)\n", ch);
1142 if (sc->cfg->subvendor==0x153b && sc->cfg->subdevice==0x1138 ) {
1143 envy24_wrmt(sc, ENVY24_MT_VOLIDX, 16, 1);
1144 envy24_wrmt(sc, ENVY24_MT_VOLUME, 0x7f7f, 2);
1145 envy24_wrmt(sc, ENVY24_MT_VOLIDX, 17, 1);
1146 envy24_wrmt(sc, ENVY24_MT_VOLUME, 0x7f7f, 2);
1149 envy24_wrmt(sc, ENVY24_MT_VOLIDX, ch * 2, 1);
1150 envy24_wrmt(sc, ENVY24_MT_VOLUME, 0x7f00 | sc->left[ch], 2);
1151 envy24_wrmt(sc, ENVY24_MT_VOLIDX, ch * 2 + 1, 1);
1152 envy24_wrmt(sc, ENVY24_MT_VOLUME, (sc->right[ch] << 8) | 0x7f, 2);
1156 envy24_mutevolume(struct sc_info *sc, unsigned ch)
1161 device_printf(sc->dev, "envy24_mutevolume(sc, %d)\n", ch);
1164 envy24_wrmt(sc, ENVY24_MT_VOLIDX, ch * 2, 1);
1165 envy24_wrmt(sc, ENVY24_MT_VOLUME, vol, 2);
1166 envy24_wrmt(sc, ENVY24_MT_VOLIDX, ch * 2 + 1, 1);
1167 envy24_wrmt(sc, ENVY24_MT_VOLUME, vol, 2);
1171 envy24_gethwptr(struct sc_info *sc, int dir)
1177 device_printf(sc->dev, "envy24_gethwptr(sc, %d)\n", dir);
1180 rtn = sc->psize / 4;
1185 rtn = sc->rsize / 4;
1190 ptr = envy24_rdmt(sc, regno, 2);
1195 device_printf(sc->dev, "envy24_gethwptr(): return %d\n", rtn);
1201 envy24_updintr(struct sc_info *sc, int dir)
1209 device_printf(sc->dev, "envy24_updintr(sc, %d)\n", dir);
1212 blk = sc->blk[0];
1217 blk = sc->blk[1];
1224 device_printf(sc->dev, "envy24_updintr():blk = %d, cnt = %d\n", blk, cnt);
1226 envy24_wrmt(sc, regintr, cnt, 2);
1227 intr = envy24_rdmt(sc, ENVY24_MT_INT, 1);
1229 device_printf(sc->dev, "envy24_updintr():intr = 0x%02x, mask = 0x%02x\n", intr, mask);
1231 envy24_wrmt(sc, ENVY24_MT_INT, intr & mask, 1);
1233 device_printf(sc->dev, "envy24_updintr():INT-->0x%02x\n",
1234 envy24_rdmt(sc, ENVY24_MT_INT, 1));
1242 envy24_maskintr(struct sc_info *sc, int dir)
1247 device_printf(sc->dev, "envy24_maskintr(sc, %d)\n", dir);
1253 intr = envy24_rdmt(sc, ENVY24_MT_INT, 1);
1254 envy24_wrmt(sc, ENVY24_MT_INT, intr | mask, 1);
1261 envy24_checkintr(struct sc_info *sc, int dir)
1266 device_printf(sc->dev, "envy24_checkintr(sc, %d)\n", dir);
1268 intr = envy24_rdmt(sc, ENVY24_MT_INT, 1);
1273 envy24_wrmt(sc, ENVY24_MT_INT, (intr & mask) | stat, 1);
1280 envy24_wrmt(sc, ENVY24_MT_INT, (intr & mask) | stat, 1);
1288 envy24_start(struct sc_info *sc, int dir)
1293 device_printf(sc->dev, "envy24_start(sc, %d)\n", dir);
1300 stat = envy24_rdmt(sc, ENVY24_MT_PCTL, 1);
1301 envy24_wrmt(sc, ENVY24_MT_PCTL, stat | sw, 1);
1304 device_printf(sc->dev, "PADDR:0x%08x\n", envy24_rdmt(sc, ENVY24_MT_PADDR, 4));
1305 device_printf(sc->dev, "PCNT:%ld\n", envy24_rdmt(sc, ENVY24_MT_PCNT, 2));
1312 envy24_stop(struct sc_info *sc, int dir)
1317 device_printf(sc->dev, "envy24_stop(sc, %d)\n", dir);
1324 stat = envy24_rdmt(sc, ENVY24_MT_PCTL, 1);
1325 envy24_wrmt(sc, ENVY24_MT_PCTL, stat & sw, 1);
1331 envy24_route(struct sc_info *sc, int dac, int class, int adc, int rev)
1337 device_printf(sc->dev, "envy24_route(sc, %d, %d, %d, %d)\n",
1360 device_printf(sc->dev, "envy24_route(): MT_SPDOUT-->0x%04x\n", reg);
1362 envy24_wrmt(sc, ENVY24_MT_SPDOUT, reg, 2);
1366 reg = envy24_rdmt(sc, ENVY24_MT_PSDOUT, 2);
1369 device_printf(sc->dev, "envy24_route(): MT_PSDOUT-->0x%04x\n", reg);
1371 envy24_wrmt(sc, ENVY24_MT_PSDOUT, reg, 2);
1373 reg = envy24_rdmt(sc, ENVY24_MT_RECORD, 4);
1378 device_printf(sc->dev, "envy24_route(): MT_RECORD-->0x%08x\n", reg);
1380 envy24_wrmt(sc, ENVY24_MT_RECORD, reg, 4);
1383 envy24_wrmt(sc, ENVY24_MT_RECORD, 0x00, 4);
1563 struct sc_info *sc = (struct sc_info *)devinfo;
1568 device_printf(sc->dev, "envy24chan_init(obj, devinfo, b, c, %d)\n", dir);
1570 snd_mtxlock(sc->lock);
1571 if ((sc->chnum > ENVY24_CHAN_PLAY_SPDIF && dir != PCMDIR_REC) ||
1572 (sc->chnum < ENVY24_CHAN_REC_ADC1 && dir != PCMDIR_PLAY)) {
1573 snd_mtxunlock(sc->lock);
1576 num = sc->chnum;
1578 ch = &sc->chan[num];
1588 ch->parent = sc;
1592 snd_mtxunlock(sc->lock);
1594 snd_mtxlock(sc->lock);
1599 snd_mtxunlock(sc->lock);
1608 struct sc_info *sc = ch->parent;
1611 device_printf(sc->dev, "envy24chan_free()\n");
1613 snd_mtxlock(sc->lock);
1618 snd_mtxunlock(sc->lock);
1627 struct sc_info *sc = ch->parent;
1633 device_printf(sc->dev, "envy24chan_setformat(obj, data, 0x%08x)\n", format);
1635 snd_mtxlock(sc->lock);
1642 snd_mtxunlock(sc->lock);
1649 snd_mtxunlock(sc->lock);
1673 snd_mtxunlock(sc->lock);
1676 device_printf(sc->dev, "envy24chan_setformat(): return 0x%08x\n", 0);
1718 /* struct sc_info *sc = ch->parent; */
1723 device_printf(sc->dev, "envy24chan_setblocksize(obj, data, %d)\n", blocksize);
1726 /* snd_mtxlock(sc->lock); */
1748 /* snd_mtxunlock(sc->lock); */
1751 device_printf(sc->dev, "envy24chan_setblocksize(): return %d\n", prev);
1761 struct sc_info *sc = ch->parent;
1768 device_printf(sc->dev, "envy24chan_trigger(obj, data, %d)\n", go);
1770 snd_mtxlock(sc->lock);
1778 device_printf(sc->dev, "envy24chan_trigger(): start\n");
1781 if (sc->run[0] == 0 && sc->run[1] == 0) {
1782 sc->speed = envy24_setspeed(sc, ch->speed);
1783 sc->caps[0].minspeed = sc->caps[0].maxspeed = sc->speed;
1784 sc->caps[1].minspeed = sc->caps[1].maxspeed = sc->speed;
1786 else if (ch->speed != 0 && ch->speed != sc->speed) {
1791 ch->channel->speed = sc->speed;
1793 sc->run[slot]++;
1794 if (sc->run[slot] == 1) {
1797 sc->blk[slot] = ch->blk;
1800 ptr = envy24_gethwptr(sc, ch->dir);
1803 if (ch->blk < sc->blk[slot])
1804 sc->blk[slot] = ch->blk;
1808 envy24_setvolume(sc, ch->num);
1810 envy24_updintr(sc, ch->dir);
1811 if (sc->run[slot] == 1)
1812 envy24_start(sc, ch->dir);
1817 device_printf(sc->dev, "envy24chan_trigger(): emldmawr\n");
1827 device_printf(sc->dev, "envy24chan_trigger(): emldmard\n");
1838 device_printf(sc->dev, "envy24chan_trigger(): abort\n");
1841 sc->run[slot]--;
1843 envy24_mutevolume(sc, ch->num);
1844 if (sc->run[slot] == 0) {
1845 envy24_stop(sc, ch->dir);
1846 sc->intr[slot] = 0;
1849 else if (ch->blk == sc->blk[slot]) {
1850 sc->blk[slot] = ENVY24_SAMPLE_NUM / 2;
1852 if (sc->chan[i].dir == ch->dir &&
1853 sc->chan[i].run == 1 &&
1854 sc->chan[i].blk < sc->blk[slot])
1855 sc->blk[slot] = sc->chan[i].blk;
1857 if (ch->blk != sc->blk[slot])
1858 envy24_updintr(sc, ch->dir);
1865 snd_mtxunlock(sc->lock);
1873 struct sc_info *sc = ch->parent;
1877 device_printf(sc->dev, "envy24chan_getptr()\n");
1879 snd_mtxlock(sc->lock);
1880 ptr = envy24_gethwptr(sc, ch->dir);
1882 snd_mtxunlock(sc->lock);
1885 device_printf(sc->dev, "envy24chan_getptr(): return %d\n",
1895 struct sc_info *sc = ch->parent;
1899 device_printf(sc->dev, "envy24chan_getcaps()\n");
1901 snd_mtxlock(sc->lock);
1903 if (sc->run[0] == 0)
1906 rtn = &sc->caps[0];
1909 if (sc->run[1] == 0)
1912 rtn = &sc->caps[1];
1914 snd_mtxunlock(sc->lock);
1939 struct sc_info *sc = mix_getdevinfo(m);
1942 device_printf(sc->dev, "envy24mixer_init()\n");
1944 if (sc == NULL)
1948 snd_mtxlock(sc->lock);
1949 envy24_wrmt(sc, ENVY24_MT_VOLRATE, 0x30, 1); /* 0x30 is default value */
1953 snd_mtxunlock(sc->lock);
1961 struct sc_info *sc = mix_getdevinfo(m);
1963 if (sc == NULL)
1966 device_printf(sc->dev, "envy24mixer_reinit()\n");
1975 struct sc_info *sc = mix_getdevinfo(m);
1977 if (sc == NULL)
1980 device_printf(sc->dev, "envy24mixer_uninit()\n");
1989 struct sc_info *sc = mix_getdevinfo(m);
1994 if (sc == NULL)
1996 if (dev == 0 && sc->cfg->codec->setvolume == NULL)
2002 device_printf(sc->dev, "envy24mixer_set(m, %d, %d, %d)\n",
2006 snd_mtxlock(sc->lock);
2008 for (i = 0; i < sc->dacn; i++) {
2009 sc->cfg->codec->setvolume(sc->dac[i], PCMDIR_PLAY, left, right);
2014 if ((sc->left[hwch] = 100 - left) > ENVY24_VOL_MIN)
2015 sc->left[hwch] = ENVY24_VOL_MUTE;
2016 if ((sc->right[hwch] = 100 - right) > ENVY24_VOL_MIN)
2017 sc->right[hwch] = ENVY24_VOL_MUTE;
2020 if (hwch > ENVY24_CHAN_PLAY_SPDIF || sc->chan[ch].run)
2021 envy24_setvolume(sc, hwch);
2023 snd_mtxunlock(sc->lock);
2031 struct sc_info *sc = mix_getdevinfo(m);
2034 device_printf(sc->dev, "envy24mixer_setrecsrc(m, %d)\n", src);
2038 sc->src = ch;
2058 struct sc_info *sc = (struct sc_info *)p;
2064 device_printf(sc->dev, "envy24_intr()\n");
2066 snd_mtxlock(sc->lock);
2067 if (envy24_checkintr(sc, PCMDIR_PLAY)) {
2069 device_printf(sc->dev, "envy24_intr(): play\n");
2071 dsize = sc->psize / 4;
2072 ptr = dsize - envy24_rdmt(sc, ENVY24_MT_PCNT, 2) - 1;
2074 device_printf(sc->dev, "envy24_intr(): ptr = %d-->", ptr);
2076 ptr -= ptr % sc->blk[0];
2077 feed = (ptr + dsize - sc->intr[0]) % dsize;
2079 printf("%d intr = %d feed = %d\n", ptr, sc->intr[0], feed);
2082 ch = &sc->chan[i];
2085 device_printf(sc->dev, "envy24_intr(): chan[%d].blk = %d\n", i, ch->blk);
2088 snd_mtxunlock(sc->lock);
2090 snd_mtxlock(sc->lock);
2093 sc->intr[0] = ptr;
2094 envy24_updintr(sc, PCMDIR_PLAY);
2096 if (envy24_checkintr(sc, PCMDIR_REC)) {
2098 device_printf(sc->dev, "envy24_intr(): rec\n");
2100 dsize = sc->rsize / 4;
2101 ptr = dsize - envy24_rdmt(sc, ENVY24_MT_RCNT, 2) - 1;
2102 ptr -= ptr % sc->blk[1];
2103 feed = (ptr + dsize - sc->intr[1]) % dsize;
2105 ch = &sc->chan[i];
2107 snd_mtxunlock(sc->lock);
2109 snd_mtxlock(sc->lock);
2112 sc->intr[1] = ptr;
2113 envy24_updintr(sc, PCMDIR_REC);
2115 snd_mtxunlock(sc->lock);
2160 struct sc_info *sc = (struct sc_info *)arg;
2162 sc->paddr = segs->ds_addr;
2164 device_printf(sc->dev, "envy24_dmapsetmap()\n");
2169 printf("%p -> %lx\n", sc->pmap, sc->paddr);
2177 struct sc_info *sc = (struct sc_info *)arg;
2179 sc->raddr = segs->ds_addr;
2181 device_printf(sc->dev, "envy24_dmarsetmap()\n");
2186 printf("%p -> %lx\n", sc->rmap, sc->raddr);
2192 envy24_dmafree(struct sc_info *sc)
2195 device_printf(sc->dev, "envy24_dmafree():");
2196 printf(" sc->raddr(0x%08x)", (u_int32_t)sc->raddr);
2197 printf(" sc->paddr(0x%08x)", (u_int32_t)sc->paddr);
2198 if (sc->rbuf) printf(" sc->rbuf(0x%08x)", (u_int32_t)sc->rbuf);
2199 else printf(" sc->rbuf(null)");
2200 if (sc->pbuf) printf(" sc->pbuf(0x%08x)\n", (u_int32_t)sc->pbuf);
2201 else printf(" sc->pbuf(null)\n");
2204 if (sc->raddr)
2205 bus_dmamap_unload(sc->dmat, sc->rmap);
2206 if (sc->paddr)
2207 bus_dmamap_unload(sc->dmat, sc->pmap);
2208 if (sc->rbuf)
2209 bus_dmamem_free(sc->dmat, sc->rbuf, sc->rmap);
2210 if (sc->pbuf)
2211 bus_dmamem_free(sc->dmat, sc->pbuf, sc->pmap);
2213 bus_dmamap_unload(sc->dmat, sc->rmap);
2214 bus_dmamap_unload(sc->dmat, sc->pmap);
2215 bus_dmamem_free(sc->dmat, sc->rbuf, sc->rmap);
2216 bus_dmamem_free(sc->dmat, sc->pbuf, sc->pmap);
2219 sc->raddr = sc->paddr = 0;
2220 sc->pbuf = NULL;
2221 sc->rbuf = NULL;
2227 envy24_dmainit(struct sc_info *sc)
2231 device_printf(sc->dev, "envy24_dmainit()\n");
2234 sc->psize = ENVY24_PLAY_BUFUNIT * ENVY24_SAMPLE_NUM;
2235 sc->rsize = ENVY24_REC_BUFUNIT * ENVY24_SAMPLE_NUM;
2236 sc->pbuf = NULL;
2237 sc->rbuf = NULL;
2238 sc->paddr = sc->raddr = 0;
2239 sc->blk[0] = sc->blk[1] = 0;
2243 device_printf(sc->dev, "envy24_dmainit(): bus_dmamem_alloc(): sc->pbuf\n");
2245 if (bus_dmamem_alloc(sc->dmat, (void **)&sc->pbuf, BUS_DMA_NOWAIT, &sc->pmap))
2248 device_printf(sc->dev, "envy24_dmainit(): bus_dmamem_alloc(): sc->rbuf\n");
2250 if (bus_dmamem_alloc(sc->dmat, (void **)&sc->rbuf, BUS_DMA_NOWAIT, &sc->rmap))
2253 device_printf(sc->dev, "envy24_dmainit(): bus_dmamem_load(): sc->pmap\n");
2255 if (bus_dmamap_load(sc->dmat, sc->pmap, sc->pbuf, sc->psize,
2256 envy24_dmapsetmap, sc, BUS_DMA_NOWAIT))
2259 device_printf(sc->dev, "envy24_dmainit(): bus_dmamem_load(): sc->rmap\n");
2261 if (bus_dmamap_load(sc->dmat, sc->rmap, sc->rbuf, sc->rsize,
2262 envy24_dmarsetmap, sc, BUS_DMA_NOWAIT))
2264 bzero(sc->pbuf, sc->psize);
2265 bzero(sc->rbuf, sc->rsize);
2269 device_printf(sc->dev, "paddr(0x%08x)\n", sc->paddr);
2271 envy24_wrmt(sc, ENVY24_MT_PADDR, sc->paddr, 4);
2273 device_printf(sc->dev, "PADDR-->(0x%08x)\n", envy24_rdmt(sc, ENVY24_MT_PADDR, 4));
2274 device_printf(sc->dev, "psize(%ld)\n", sc->psize / 4 - 1);
2276 envy24_wrmt(sc, ENVY24_MT_PCNT, sc->psize / 4 - 1, 2);
2278 device_printf(sc->dev, "PCNT-->(%ld)\n", envy24_rdmt(sc, ENVY24_MT_PCNT, 2));
2280 envy24_wrmt(sc, ENVY24_MT_RADDR, sc->raddr, 4);
2281 envy24_wrmt(sc, ENVY24_MT_RCNT, sc->rsize / 4 - 1, 2);
2285 envy24_dmafree(sc);
2290 envy24_putcfg(struct sc_info *sc)
2292 device_printf(sc->dev, "system configuration\n");
2294 sc->cfg->subvendor, sc->cfg->subdevice);
2296 switch (sc->cfg->scfg & PCIM_SCFG_XIN2) {
2310 if (sc->cfg->scfg & PCIM_SCFG_MPU)
2315 if (sc->cfg->scfg & PCIM_SCFG_AC97)
2320 printf("%d\n", sc->adcn);
2322 printf("%d\n", sc->dacn);
2324 if ((sc->cfg->acl & PCIM_ACL_MTC) == 0) {
2326 if (sc->cfg->acl & PCIM_ACL_OMODE)
2331 if (sc->cfg->acl & PCIM_ACL_IMODE)
2339 if (sc->cfg->i2s & PCIM_I2S_VOL)
2341 if (sc->cfg->i2s & PCIM_I2S_96KHZ)
2343 switch (sc->cfg->i2s & PCIM_I2S_RES) {
2357 printf("ID#0x%x)\n", sc->cfg->i2s & PCIM_I2S_ID);
2360 if (sc->cfg->spdif & PCIM_SPDIF_IN)
2364 if (sc->cfg->spdif & PCIM_SPDIF_OUT)
2368 if (sc->cfg->spdif & (PCIM_SPDIF_IN | PCIM_SPDIF_OUT))
2369 printf("ID# 0x%02x\n", (sc->cfg->spdif & PCIM_SPDIF_ID) >> 2);
2371 sc->cfg->gpiomask, sc->cfg->gpiodir, sc->cfg->gpiostate);
2375 envy24_init(struct sc_info *sc)
2385 device_printf(sc->dev, "envy24_init()\n");
2389 envy24_wrcs(sc, ENVY24_CCS_CTL, ENVY24_CCS_CTL_RESET | ENVY24_CCS_CTL_NATIVE, 1);
2391 envy24_wrcs(sc, ENVY24_CCS_CTL, ENVY24_CCS_CTL_NATIVE, 1);
2395 data = pci_read_config(sc->dev, PCIR_LAC, 2);
2397 pci_write_config(sc->dev, PCIR_LAC, data, 2);
2400 sc->cfg = NULL;
2403 sv = pci_get_subvendor(sc->dev);
2404 sd = pci_get_subdevice(sc->dev);
2407 device_printf(sc->dev, "Set configuration from table\n");
2409 sc->cfg = &cfg_table[i];
2413 if (sc->cfg == NULL) {
2415 sc->cfg = envy24_rom2cfg(sc);
2417 sc->adcn = ((sc->cfg->scfg & PCIM_SCFG_ADC) >> 2) + 1;
2418 sc->dacn = (sc->cfg->scfg & PCIM_SCFG_DAC) + 1;
2421 envy24_putcfg(sc);
2425 pci_write_config(sc->dev, PCIR_SCFG, sc->cfg->scfg, 1);
2426 pci_write_config(sc->dev, PCIR_ACL, sc->cfg->acl, 1);
2427 pci_write_config(sc->dev, PCIR_I2S, sc->cfg->i2s, 1);
2428 pci_write_config(sc->dev, PCIR_SPDIF, sc->cfg->spdif, 1);
2429 envy24_gpiosetmask(sc, sc->cfg->gpiomask);
2430 envy24_gpiosetdir(sc, sc->cfg->gpiodir);
2431 envy24_gpiowr(sc, sc->cfg->gpiostate);
2432 for (i = 0; i < sc->adcn; i++) {
2433 sc->adc[i] = sc->cfg->codec->create(sc->dev, sc, PCMDIR_REC, i);
2434 sc->cfg->codec->init(sc->adc[i]);
2436 for (i = 0; i < sc->dacn; i++) {
2437 sc->dac[i] = sc->cfg->codec->create(sc->dev, sc, PCMDIR_PLAY, i);
2438 sc->cfg->codec->init(sc->dac[i]);
2443 device_printf(sc->dev, "envy24_init(): initialize DMA buffer\n");
2445 if (envy24_dmainit(sc))
2449 sc->run[0] = sc->run[1] = 0;
2450 sc->intr[0] = sc->intr[1] = 0;
2451 sc->speed = 0;
2452 sc->caps[0].fmtlist = envy24_playfmt;
2453 sc->caps[1].fmtlist = envy24_recfmt;
2456 envy24_route(sc, ENVY24_ROUTE_DAC_1, ENVY24_ROUTE_CLASS_MIX, 0, 0);
2457 envy24_route(sc, ENVY24_ROUTE_DAC_SPDIF, ENVY24_ROUTE_CLASS_DMA, 0, 0);
2458 /* envy24_route(sc, ENVY24_ROUTE_DAC_SPDIF, ENVY24_ROUTE_CLASS_MIX, 0, 0); */
2461 data = envy24_rdcs(sc, ENVY24_CCS_IMASK, 1);
2462 envy24_wrcs(sc, ENVY24_CCS_IMASK, data & ~ENVY24_CCS_IMASK_PMT, 1);
2463 data = envy24_rdcs(sc, ENVY24_CCS_IMASK, 1);
2465 device_printf(sc->dev, "envy24_init(): CCS_IMASK-->0x%02x\n", data);
2472 envy24_alloc_resource(struct sc_info *sc)
2475 sc->csid = PCIR_CCS;
2476 sc->cs = bus_alloc_resource_any(sc->dev, SYS_RES_IOPORT,
2477 &sc->csid, RF_ACTIVE);
2478 sc->ddmaid = PCIR_DDMA;
2479 sc->ddma = bus_alloc_resource_any(sc->dev, SYS_RES_IOPORT,
2480 &sc->ddmaid, RF_ACTIVE);
2481 sc->dsid = PCIR_DS;
2482 sc->ds = bus_alloc_resource_any(sc->dev, SYS_RES_IOPORT,
2483 &sc->dsid, RF_ACTIVE);
2484 sc->mtid = PCIR_MT;
2485 sc->mt = bus_alloc_resource_any(sc->dev, SYS_RES_IOPORT,
2486 &sc->mtid, RF_ACTIVE);
2487 if (!sc->cs || !sc->ddma || !sc->ds || !sc->mt) {
2488 device_printf(sc->dev, "unable to map IO port space\n");
2491 sc->cst = rman_get_bustag(sc->cs);
2492 sc->csh = rman_get_bushandle(sc->cs);
2493 sc->ddmat = rman_get_bustag(sc->ddma);
2494 sc->ddmah = rman_get_bushandle(sc->ddma);
2495 sc->dst = rman_get_bustag(sc->ds);
2496 sc->dsh = rman_get_bushandle(sc->ds);
2497 sc->mtt = rman_get_bustag(sc->mt);
2498 sc->mth = rman_get_bushandle(sc->mt);
2500 device_printf(sc->dev,
2502 pci_read_config(sc->dev, PCIR_CCS, 4),
2503 pci_read_config(sc->dev, PCIR_DDMA, 4),
2504 pci_read_config(sc->dev, PCIR_DS, 4),
2505 pci_read_config(sc->dev, PCIR_MT, 4));
2509 sc->irqid = 0;
2510 sc->irq = bus_alloc_resource_any(sc->dev, SYS_RES_IRQ, &sc->irqid,
2512 if (!sc->irq ||
2513 snd_setup_intr(sc->dev, sc->irq, INTR_MPSAFE, envy24_intr, sc, &sc->ih)) {
2514 device_printf(sc->dev, "unable to map interrupt\n");
2519 if (bus_dma_tag_create(/*parent*/bus_get_dma_tag(sc->dev),
2528 &sc->dmat) != 0) {
2529 device_printf(sc->dev, "unable to create dma tag\n");
2539 struct sc_info *sc;
2548 if ((sc = malloc(sizeof(*sc), M_ENVY24, M_NOWAIT)) == NULL) {
2553 bzero(sc, sizeof(*sc));
2554 sc->lock = snd_mtxcreate(device_get_nameunit(dev), "snd_envy24 softc");
2555 sc->dev = dev;
2561 err = envy24_alloc_resource(sc);
2568 err = envy24_init(sc);
2575 mixer_init(dev, &envy24mixer_class, sc);
2578 err = pcm_register(dev, sc, 5, 2 + sc->adcn);
2581 sc->chnum = 0;
2583 pcm_addchan(dev, PCMDIR_PLAY, &envy24chan_class, sc);
2584 sc->chnum++;
2586 for (i = 0; i < 2 + sc->adcn; i++) {
2587 pcm_addchan(dev, PCMDIR_REC, &envy24chan_class, sc);
2588 sc->chnum++;
2594 rman_get_start(sc->cs),
2595 rman_get_end(sc->cs) - rman_get_start(sc->cs) + 1,
2596 rman_get_start(sc->ddma),
2597 rman_get_end(sc->ddma) - rman_get_start(sc->ddma) + 1,
2598 rman_get_start(sc->ds),
2599 rman_get_end(sc->ds) - rman_get_start(sc->ds) + 1,
2600 rman_get_start(sc->mt),
2601 rman_get_end(sc->mt) - rman_get_start(sc->mt) + 1,
2602 rman_get_start(sc->irq),
2609 if (sc->ih)
2610 bus_teardown_intr(dev, sc->irq, sc->ih);
2611 if (sc->irq)
2612 bus_release_resource(dev, SYS_RES_IRQ, sc->irqid, sc->irq);
2613 envy24_dmafree(sc);
2614 if (sc->dmat)
2615 bus_dma_tag_destroy(sc->dmat);
2616 if (sc->cfg->codec->destroy != NULL) {
2617 for (i = 0; i < sc->adcn; i++)
2618 sc->cfg->codec->destroy(sc->adc[i]);
2619 for (i = 0; i < sc->dacn; i++)
2620 sc->cfg->codec->destroy(sc->dac[i]);
2622 envy24_cfgfree(sc->cfg);
2623 if (sc->cs)
2624 bus_release_resource(dev, SYS_RES_IOPORT, sc->csid, sc->cs);
2625 if (sc->ddma)
2626 bus_release_resource(dev, SYS_RES_IOPORT, sc->ddmaid, sc->ddma);
2627 if (sc->ds)
2628 bus_release_resource(dev, SYS_RES_IOPORT, sc->dsid, sc->ds);
2629 if (sc->mt)
2630 bus_release_resource(dev, SYS_RES_IOPORT, sc->mtid, sc->mt);
2631 if (sc->lock)
2632 snd_mtxfree(sc->lock);
2633 free(sc, M_ENVY24);
2640 struct sc_info *sc;
2647 sc = pcm_getdevinfo(dev);
2648 if (sc == NULL)
2654 envy24_dmafree(sc);
2655 if (sc->cfg->codec->destroy != NULL) {
2656 for (i = 0; i < sc->adcn; i++)
2657 sc->cfg->codec->destroy(sc->adc[i]);
2658 for (i = 0; i < sc->dacn; i++)
2659 sc->cfg->codec->destroy(sc->dac[i]);
2661 envy24_cfgfree(sc->cfg);
2662 bus_dma_tag_destroy(sc->dmat);
2663 bus_teardown_intr(dev, sc->irq, sc->ih);
2664 bus_release_resource(dev, SYS_RES_IRQ, sc->irqid, sc->irq);
2665 bus_release_resource(dev, SYS_RES_IOPORT, sc->csid, sc->cs);
2666 bus_release_resource(dev, SYS_RES_IOPORT, sc->ddmaid, sc->ddma);
2667 bus_release_resource(dev, SYS_RES_IOPORT, sc->dsid, sc->ds);
2668 bus_release_resource(dev, SYS_RES_IOPORT, sc->mtid, sc->mt);
2669 snd_mtxfree(sc->lock);
2670 free(sc, M_ENVY24);