Lines Matching refs:sc
70 #define DPRINTF(x) do { if (sc->sc_debug > 0) printf x; } while (0)
71 #define DPRINTFN(n, x) do { if (sc->sc_debug >= (n)) printf x; } while (0)
237 struct rt2860_softc *sc = device_get_softc(dev);
238 struct ieee80211com *ic = &sc->sc_ic;
242 sc->sc_dev = dev;
243 sc->sc_debug = 0;
245 mtx_init(&sc->sc_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK,
248 callout_init_mtx(&sc->watchdog_ch, &sc->sc_mtx, 0);
249 mbufq_init(&sc->sc_snd, ifqmaxlen);
253 tmp = RAL_READ(sc, RT2860_ASIC_VER_ID);
259 device_printf(sc->sc_dev,
264 sc->mac_ver = tmp >> 16;
265 sc->mac_rev = tmp & 0xffff;
267 if (sc->mac_ver != 0x2860 &&
269 sc->sc_flags |= RT2860_ADVANCED_PS;
272 rt2860_read_eeprom(sc, ic->ic_macaddr);
273 device_printf(sc->sc_dev, "MAC/BBP RT%X (rev 0x%04X), "
275 sc->mac_ver, sc->mac_rev, rt2860_get_rf(sc->rf_rev),
276 sc->ntxchains, sc->nrxchains, ic->ic_macaddr, ":");
282 if ((error = rt2860_alloc_tx_ring(sc, &sc->txq[qid])) != 0) {
283 device_printf(sc->sc_dev,
289 if ((error = rt2860_alloc_rx_ring(sc, &sc->rxq)) != 0) {
290 device_printf(sc->sc_dev, "could not allocate Rx ring\n");
294 if ((error = rt2860_alloc_tx_pool(sc)) != 0) {
295 device_printf(sc->sc_dev, "could not allocate Tx pool\n");
300 sc->mgtqid = (sc->mac_ver == 0x2860 && sc->mac_rev == 0x0100) ?
303 ic->ic_softc = sc;
339 sc->sc_node_free = ic->ic_node_free;
348 &sc->sc_txtap.wt_ihdr, sizeof(sc->sc_txtap),
350 &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap),
356 "debug", CTLFLAG_RW, &sc->sc_debug, 0, "debug msgs");
363 fail3: rt2860_free_rx_ring(sc, &sc->rxq);
365 rt2860_free_tx_ring(sc, &sc->txq[qid]);
366 fail1: mtx_destroy(&sc->sc_mtx);
373 struct rt2860_softc *sc = xsc;
374 struct ieee80211com *ic = &sc->sc_ic;
377 RAL_LOCK(sc);
378 rt2860_stop_locked(sc);
379 RAL_UNLOCK(sc);
382 mbufq_drain(&sc->sc_snd);
384 rt2860_free_tx_ring(sc, &sc->txq[qid]);
385 rt2860_free_rx_ring(sc, &sc->rxq);
386 rt2860_free_tx_pool(sc);
388 mtx_destroy(&sc->sc_mtx);
396 struct rt2860_softc *sc = xsc;
398 rt2860_stop(sc);
404 struct rt2860_softc *sc = xsc;
406 rt2860_stop(sc);
412 struct rt2860_softc *sc = xsc;
414 if (sc->sc_ic.ic_nrunning > 0)
415 rt2860_init(sc);
424 struct rt2860_softc *sc = ic->ic_softc;
437 device_printf(sc->sc_dev, "only 1 vap supported\n");
446 device_printf(sc->sc_dev,
458 device_printf(sc->sc_dev, "unknown opmode %d\n", opmode);
506 rt2860_alloc_tx_ring(struct rt2860_softc *sc, struct rt2860_tx_ring *ring)
512 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 16, 0,
516 device_printf(sc->sc_dev, "could not create desc DMA tag\n");
523 device_printf(sc->sc_dev, "could not allocate DMA memory\n");
530 device_printf(sc->sc_dev, "could not load desc DMA map\n");
538 fail: rt2860_free_tx_ring(sc, ring);
543 rt2860_reset_tx_ring(struct rt2860_softc *sc, struct rt2860_tx_ring *ring)
553 bus_dmamap_sync(sc->txwi_dmat, data->map,
555 bus_dmamap_unload(sc->txwi_dmat, data->map);
564 SLIST_INSERT_HEAD(&sc->data_pool, data, next);
573 rt2860_free_tx_ring(struct rt2860_softc *sc, struct rt2860_tx_ring *ring)
592 bus_dmamap_sync(sc->txwi_dmat, data->map,
594 bus_dmamap_unload(sc->txwi_dmat, data->map);
600 SLIST_INSERT_HEAD(&sc->data_pool, data, next);
608 rt2860_alloc_tx_pool(struct rt2860_softc *sc)
617 SLIST_INIT(&sc->data_pool);
619 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 1, 0,
621 size, 1, size, 0, NULL, NULL, &sc->txwi_dmat);
623 device_printf(sc->sc_dev, "could not create txwi DMA tag\n");
627 error = bus_dmamem_alloc(sc->txwi_dmat, (void **)&sc->txwi_vaddr,
628 BUS_DMA_NOWAIT | BUS_DMA_ZERO, &sc->txwi_map);
630 device_printf(sc->sc_dev, "could not allocate DMA memory\n");
634 error = bus_dmamap_load(sc->txwi_dmat, sc->txwi_map,
635 sc->txwi_vaddr, size, rt2860_dma_map_addr, &paddr, 0);
637 device_printf(sc->sc_dev, "could not load txwi DMA map\n");
641 bus_dmamap_sync(sc->txwi_dmat, sc->txwi_map, BUS_DMASYNC_PREWRITE);
643 vaddr = sc->txwi_vaddr;
645 struct rt2860_tx_data *data = &sc->data[i];
647 error = bus_dmamap_create(sc->txwi_dmat, 0, &data->map);
649 device_printf(sc->sc_dev, "could not create DMA map\n");
657 SLIST_INSERT_HEAD(&sc->data_pool, data, next);
662 fail: rt2860_free_tx_pool(sc);
667 rt2860_free_tx_pool(struct rt2860_softc *sc)
669 if (sc->txwi_vaddr != NULL) {
670 bus_dmamap_sync(sc->txwi_dmat, sc->txwi_map,
672 bus_dmamap_unload(sc->txwi_dmat, sc->txwi_map);
673 bus_dmamem_free(sc->txwi_dmat, sc->txwi_vaddr, sc->txwi_map);
675 if (sc->txwi_dmat != NULL)
676 bus_dma_tag_destroy(sc->txwi_dmat);
678 while (!SLIST_EMPTY(&sc->data_pool)) {
680 data = SLIST_FIRST(&sc->data_pool);
681 bus_dmamap_destroy(sc->txwi_dmat, data->map);
682 SLIST_REMOVE_HEAD(&sc->data_pool, next);
687 rt2860_alloc_rx_ring(struct rt2860_softc *sc, struct rt2860_rx_ring *ring)
694 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 16, 0,
698 device_printf(sc->sc_dev, "could not create desc DMA tag\n");
705 device_printf(sc->sc_dev, "could not allocate DMA memory\n");
712 device_printf(sc->sc_dev, "could not load desc DMA map\n");
716 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 1, 0,
720 device_printf(sc->sc_dev, "could not create data DMA tag\n");
730 device_printf(sc->sc_dev, "could not create DMA map\n");
736 device_printf(sc->sc_dev,
746 device_printf(sc->sc_dev,
759 fail: rt2860_free_rx_ring(sc, ring);
764 rt2860_reset_rx_ring(struct rt2860_softc *sc, struct rt2860_rx_ring *ring)
777 rt2860_free_rx_ring(struct rt2860_softc *sc, struct rt2860_rx_ring *ring)
807 rt2860_updatestats(struct rt2860_softc *sc)
809 struct ieee80211com *ic = &sc->sc_ic;
819 uint32_t tmp = RAL_READ(sc, RT2860_DEBUG);
823 RAL_WRITE(sc, RT2860_MAC_SYS_CTRL, RT2860_MAC_SRST);
824 RAL_BARRIER_WRITE(sc);
826 RAL_WRITE(sc, RT2860_MAC_SYS_CTRL,
836 struct rt2860_softc *sc = ic->ic_softc;
841 sc->wcid2ni[wcid] = ni;
844 RAL_WRITE_REGION_1(sc, RT2860_WCID_ENTRY(wcid),
855 struct rt2860_softc *sc = ic->ic_softc;
862 RAL_SET_REGION_4(sc, RT2860_WCID_ENTRY(wcid), 0, 2);
864 sc->sc_node_free(ni);
872 struct rt2860_softc *sc = ic->ic_softc;
877 tmp = RAL_READ(sc, RT2860_WCID_ENTRY(wcid) + 4);
879 RAL_WRITE(sc, RT2860_WCID_ENTRY(wcid) + 4, tmp);
887 struct rt2860_softc *sc = ic->ic_softc;
892 tmp = RAL_READ(sc, RT2860_WCID_ENTRY(wcid) + 4);
894 RAL_WRITE(sc, RT2860_WCID_ENTRY(wcid) + 4, tmp);
903 struct rt2860_softc *sc = ic->ic_softc;
909 rt2860_set_leds(sc, RT2860_LED_RADIO);
914 tmp = RAL_READ(sc, RT2860_BCN_TIME_CFG);
915 RAL_WRITE(sc, RT2860_BCN_TIME_CFG,
920 rt2860_set_gp_timer(sc, 0);
930 rt2860_enable_mrr(sc);
931 rt2860_set_txpreamble(sc);
932 rt2860_set_basicrates(sc, &ni->ni_rates);
933 rt2860_set_bssid(sc, ni->ni_bssid);
939 error = rt2860_setup_beacon(sc, vap);
945 rt2860_enable_tsf_sync(sc);
946 rt2860_set_gp_timer(sc, 500);
950 rt2860_set_leds(sc, RT2860_LED_RADIO |
959 rt3090_efuse_read_2(struct rt2860_softc *sc, uint16_t addr)
973 tmp = RAL_READ(sc, RT3070_EFUSE_CTRL);
976 RAL_WRITE(sc, RT3070_EFUSE_CTRL, tmp);
978 tmp = RAL_READ(sc, RT3070_EFUSE_CTRL);
991 tmp = RAL_READ(sc, reg);
1001 rt2860_eeprom_read_2(struct rt2860_softc *sc, uint16_t addr)
1008 RT2860_EEPROM_CTL(sc, 0);
1010 RT2860_EEPROM_CTL(sc, RT2860_S);
1011 RT2860_EEPROM_CTL(sc, RT2860_S | RT2860_C);
1012 RT2860_EEPROM_CTL(sc, RT2860_S);
1015 RT2860_EEPROM_CTL(sc, RT2860_S | RT2860_D);
1016 RT2860_EEPROM_CTL(sc, RT2860_S | RT2860_D | RT2860_C);
1019 RT2860_EEPROM_CTL(sc, RT2860_S | RT2860_D);
1020 RT2860_EEPROM_CTL(sc, RT2860_S | RT2860_D | RT2860_C);
1021 RT2860_EEPROM_CTL(sc, RT2860_S);
1022 RT2860_EEPROM_CTL(sc, RT2860_S | RT2860_C);
1025 n = ((RAL_READ(sc, RT2860_PCI_EECTRL) & 0x30) == 0) ? 5 : 7;
1027 RT2860_EEPROM_CTL(sc, RT2860_S |
1029 RT2860_EEPROM_CTL(sc, RT2860_S |
1033 RT2860_EEPROM_CTL(sc, RT2860_S);
1038 RT2860_EEPROM_CTL(sc, RT2860_S | RT2860_C);
1039 tmp = RAL_READ(sc, RT2860_PCI_EECTRL);
1041 RT2860_EEPROM_CTL(sc, RT2860_S);
1044 RT2860_EEPROM_CTL(sc, 0);
1047 RT2860_EEPROM_CTL(sc, RT2860_S);
1048 RT2860_EEPROM_CTL(sc, 0);
1049 RT2860_EEPROM_CTL(sc, RT2860_C);
1055 rt2860_srom_read(struct rt2860_softc *sc, uint8_t addr)
1058 return sc->sc_srom_read(sc, addr);
1062 rt2860_intr_coherent(struct rt2860_softc *sc)
1071 tmp = RAL_READ(sc, RT2860_WPDMA_GLO_CFG);
1073 RAL_WRITE(sc, RT2860_WPDMA_GLO_CFG, tmp);
1075 (void)rt2860_txrx_enable(sc);
1079 rt2860_drain_stats_fifo(struct rt2860_softc *sc)
1081 struct ieee80211_ratectl_tx_status *txs = &sc->sc_txs;
1088 while ((stat = RAL_READ(sc, RT2860_TX_STAT_FIFO)) & RT2860_TXQ_VLD) {
1094 ni = sc->wcid2ni[wcid];
1127 rt2860_tx_intr(struct rt2860_softc *sc, int qid)
1129 struct rt2860_tx_ring *ring = &sc->txq[qid];
1132 rt2860_drain_stats_fifo(sc);
1134 hw = RAL_READ(sc, RT2860_TX_DTX_IDX(qid));
1139 bus_dmamap_sync(sc->txwi_dmat, data->map,
1141 bus_dmamap_unload(sc->txwi_dmat, data->map);
1145 SLIST_INSERT_HEAD(&sc->data_pool, data, next);
1152 sc->sc_tx_timer = 0;
1154 sc->qfullmsk &= ~(1 << qid);
1155 rt2860_start(sc);
1162 rt2860_maxrssi_chain(struct rt2860_softc *sc, const struct rt2860_rxwi *rxwi)
1166 if (sc->nrxchains > 1) {
1169 if (sc->nrxchains > 2)
1177 rt2860_rx_intr(struct rt2860_softc *sc)
1180 struct ieee80211com *ic = &sc->sc_ic;
1191 hw = RAL_READ(sc, RT2860_FS_DRX_IDX) & 0xfff;
1192 while (sc->rxq.cur != hw) {
1193 struct rt2860_rx_data *data = &sc->rxq.data[sc->rxq.cur];
1194 struct rt2860_rxd *rxd = &sc->rxq.rxd[sc->rxq.cur];
1197 bus_dmamap_sync(sc->rxq.desc_dmat, sc->rxq.desc_map,
1227 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
1229 bus_dmamap_unload(sc->rxq.data_dmat, data->map);
1231 error = bus_dmamap_load(sc->rxq.data_dmat, data->map,
1238 error = bus_dmamap_load(sc->rxq.data_dmat, data->map,
1243 device_get_name(sc->sc_dev));
1281 ant = rt2860_maxrssi_chain(sc, rxwi);
1282 rssi = rt2860_rssi2dbm(sc, rxwi->rssi[ant], ant);
1286 tap = &sc->sc_rxtap;
1320 RAL_UNLOCK(sc);
1332 RAL_LOCK(sc);
1336 bus_dmamap_sync(sc->rxq.desc_dmat, sc->rxq.desc_map,
1339 sc->rxq.cur = (sc->rxq.cur + 1) % RT2860_RX_RING_COUNT;
1343 RAL_WRITE(sc, RT2860_RX_CALC_IDX,
1344 (sc->rxq.cur - 1) % RT2860_RX_RING_COUNT);
1348 rt2860_tbtt_intr(struct rt2860_softc *sc)
1351 struct ieee80211com *ic = &sc->sc_ic;
1362 rt2860_setup_beacon(sc);
1370 if ((sc->sc_ic_flags ^ ic->ic_flags) & IEEE80211_F_USEPROT) {
1371 rt2860_updateprot(sc);
1372 sc->sc_ic_flags = ic->ic_flags;
1378 rt2860_gp_intr(struct rt2860_softc *sc)
1380 struct ieee80211com *ic = &sc->sc_ic;
1386 rt2860_updatestats(sc);
1392 struct rt2860_softc *sc = arg;
1395 RAL_LOCK(sc);
1397 r = RAL_READ(sc, RT2860_INT_STATUS);
1399 RAL_UNLOCK(sc);
1403 RAL_UNLOCK(sc);
1408 RAL_WRITE(sc, RT2860_INT_STATUS, r);
1411 rt2860_intr_coherent(sc);
1414 rt2860_drain_stats_fifo(sc);
1417 rt2860_tx_intr(sc, 5);
1420 rt2860_rx_intr(sc);
1423 rt2860_tx_intr(sc, 4);
1426 rt2860_tx_intr(sc, 3);
1429 rt2860_tx_intr(sc, 2);
1432 rt2860_tx_intr(sc, 1);
1435 rt2860_tx_intr(sc, 0);
1438 rt2860_tbtt_intr(sc);
1444 rt2860_gp_intr(sc);
1446 RAL_UNLOCK(sc);
1450 rt2860_tx(struct rt2860_softc *sc, struct mbuf *m, struct ieee80211_node *ni)
1452 struct ieee80211com *ic = &sc->sc_ic;
1470 data = SLIST_FIRST(&sc->data_pool);
1506 ring = &sc->txq[qid];
1569 struct rt2860_tx_radiotap_header *tap = &sc->sc_txtap;
1585 error = bus_dmamap_load_mbuf_sg(sc->txwi_dmat, data->map, m, segs,
1588 device_printf(sc->sc_dev, "can't map mbuf (error %d)\n",
1599 bus_dmamap_unload(sc->txwi_dmat, data->map);
1606 device_printf(sc->sc_dev,
1613 error = bus_dmamap_load_mbuf_sg(sc->txwi_dmat, data->map, m,
1616 device_printf(sc->sc_dev, "can't map mbuf (error %d)\n",
1627 bus_dmamap_unload(sc->txwi_dmat, data->map);
1665 SLIST_REMOVE_HEAD(&sc->data_pool, next);
1670 bus_dmamap_sync(sc->txwi_dmat, sc->txwi_map, BUS_DMASYNC_PREWRITE);
1671 bus_dmamap_sync(sc->txwi_dmat, data->map, BUS_DMASYNC_PREWRITE);
1680 sc->qfullmsk |= 1 << qid;
1683 RAL_WRITE(sc, RT2860_TX_CTX_IDX(qid), ring->cur);
1693 struct rt2860_softc *sc = ic->ic_softc;
1696 RAL_LOCK(sc);
1699 if (!(sc->sc_flags & RT2860_RUNNING)) {
1700 RAL_UNLOCK(sc);
1709 error = rt2860_tx(sc, m, ni);
1715 error = rt2860_tx_raw(sc, m, ni, params);
1717 sc->sc_tx_timer = 5;
1718 RAL_UNLOCK(sc);
1723 rt2860_tx_raw(struct rt2860_softc *sc, struct mbuf *m,
1726 struct ieee80211com *ic = &sc->sc_ic;
1742 data = SLIST_FIRST(&sc->data_pool);
1758 ring = &sc->txq[qid];
1812 struct rt2860_tx_radiotap_header *tap = &sc->sc_txtap;
1828 error = bus_dmamap_load_mbuf_sg(sc->txwi_dmat, data->map, m, segs,
1831 device_printf(sc->sc_dev, "can't map mbuf (error %d)\n",
1842 bus_dmamap_unload(sc->txwi_dmat, data->map);
1849 device_printf(sc->sc_dev,
1856 error = bus_dmamap_load_mbuf_sg(sc->txwi_dmat, data->map, m,
1859 device_printf(sc->sc_dev, "can't map mbuf (error %d)\n",
1870 bus_dmamap_unload(sc->txwi_dmat, data->map);
1908 SLIST_REMOVE_HEAD(&sc->data_pool, next);
1913 bus_dmamap_sync(sc->txwi_dmat, sc->txwi_map, BUS_DMASYNC_PREWRITE);
1914 bus_dmamap_sync(sc->txwi_dmat, data->map, BUS_DMASYNC_PREWRITE);
1923 sc->qfullmsk |= 1 << qid;
1926 RAL_WRITE(sc, RT2860_TX_CTX_IDX(qid), ring->cur);
1934 struct rt2860_softc *sc = ic->ic_softc;
1937 RAL_LOCK(sc);
1938 if ((sc->sc_flags & RT2860_RUNNING) == 0) {
1939 RAL_UNLOCK(sc);
1942 error = mbufq_enqueue(&sc->sc_snd, m);
1944 RAL_UNLOCK(sc);
1947 rt2860_start(sc);
1948 RAL_UNLOCK(sc);
1954 rt2860_start(struct rt2860_softc *sc)
1959 RAL_LOCK_ASSERT(sc);
1961 if ((sc->sc_flags & RT2860_RUNNING) == 0)
1964 while (!SLIST_EMPTY(&sc->data_pool) && sc->qfullmsk == 0 &&
1965 (m = mbufq_dequeue(&sc->sc_snd)) != NULL) {
1967 if (rt2860_tx(sc, m, ni) != 0) {
1973 sc->sc_tx_timer = 5;
1980 struct rt2860_softc *sc = arg;
1982 RAL_LOCK_ASSERT(sc);
1984 KASSERT(sc->sc_flags & RT2860_RUNNING, ("not running"));
1986 if (sc->sc_invalid) /* card ejected */
1989 if (sc->sc_tx_timer > 0 && --sc->sc_tx_timer == 0) {
1990 device_printf(sc->sc_dev, "device timeout\n");
1991 rt2860_stop_locked(sc);
1992 rt2860_init_locked(sc);
1993 counter_u64_add(sc->sc_ic.ic_oerrors, 1);
1996 callout_reset(&sc->watchdog_ch, hz, rt2860_watchdog, sc);
2002 struct rt2860_softc *sc = ic->ic_softc;
2005 RAL_LOCK(sc);
2007 if (!(sc->sc_flags & RT2860_RUNNING)) {
2008 rt2860_init_locked(sc);
2012 } else if (sc->sc_flags & RT2860_RUNNING)
2013 rt2860_stop_locked(sc);
2014 RAL_UNLOCK(sc);
2025 rt2860_mcu_bbp_write(struct rt2860_softc *sc, uint8_t reg, uint8_t val)
2030 if (!(RAL_READ(sc, RT2860_H2M_BBPAGENT) & RT2860_BBP_CSR_KICK))
2035 device_printf(sc->sc_dev,
2040 RAL_WRITE(sc, RT2860_H2M_BBPAGENT, RT2860_BBP_RW_PARALLEL |
2042 RAL_BARRIER_WRITE(sc);
2044 rt2860_mcu_cmd(sc, RT2860_MCU_CMD_BBP, 0, 0);
2049 rt2860_mcu_bbp_read(struct rt2860_softc *sc, uint8_t reg)
2055 if (!(RAL_READ(sc, RT2860_H2M_BBPAGENT) & RT2860_BBP_CSR_KICK))
2060 device_printf(sc->sc_dev,
2065 RAL_WRITE(sc, RT2860_H2M_BBPAGENT, RT2860_BBP_RW_PARALLEL |
2067 RAL_BARRIER_WRITE(sc);
2069 rt2860_mcu_cmd(sc, RT2860_MCU_CMD_BBP, 0, 0);
2073 val = RAL_READ(sc, RT2860_H2M_BBPAGENT);
2078 device_printf(sc->sc_dev, "could not read from BBP through MCU\n");
2087 rt2860_rf_write(struct rt2860_softc *sc, uint8_t reg, uint32_t val)
2093 if (!(RAL_READ(sc, RT2860_RF_CSR_CFG0) & RT2860_RF_REG_CTRL))
2098 device_printf(sc->sc_dev, "could not write to RF\n");
2105 RAL_WRITE(sc, RT2860_RF_CSR_CFG0, tmp);
2109 rt3090_rf_read(struct rt2860_softc *sc, uint8_t reg)
2115 if (!(RAL_READ(sc, RT3070_RF_CSR_CFG) & RT3070_RF_KICK))
2120 device_printf(sc->sc_dev, "could not read RF register\n");
2124 RAL_WRITE(sc, RT3070_RF_CSR_CFG, tmp);
2127 tmp = RAL_READ(sc, RT3070_RF_CSR_CFG);
2133 device_printf(sc->sc_dev, "could not read RF register\n");
2140 rt3090_rf_write(struct rt2860_softc *sc, uint8_t reg, uint8_t val)
2146 if (!(RAL_READ(sc, RT3070_RF_CSR_CFG) & RT3070_RF_KICK))
2151 device_printf(sc->sc_dev, "could not write to RF\n");
2156 RAL_WRITE(sc, RT3070_RF_CSR_CFG, tmp);
2163 rt2860_mcu_cmd(struct rt2860_softc *sc, uint8_t cmd, uint16_t arg, int wait)
2170 if (!(RAL_READ(sc, RT2860_H2M_MAILBOX) & RT2860_H2M_BUSY))
2178 RAL_WRITE(sc, RT2860_H2M_MAILBOX, RT2860_H2M_BUSY | cid << 16 | arg);
2179 RAL_BARRIER_WRITE(sc);
2180 RAL_WRITE(sc, RT2860_HOST_CMD, cmd);
2186 tmp = RAL_READ(sc, RT2860_H2M_MAILBOX_CID);
2197 RAL_WRITE(sc, RT2860_H2M_MAILBOX_STATUS, 0xffffffff);
2198 RAL_WRITE(sc, RT2860_H2M_MAILBOX_CID, 0xffffffff);
2202 tmp = RAL_READ(sc, RT2860_H2M_MAILBOX_STATUS);
2207 RAL_WRITE(sc, RT2860_H2M_MAILBOX_STATUS, 0xffffffff);
2208 RAL_WRITE(sc, RT2860_H2M_MAILBOX_CID, 0xffffffff);
2213 rt2860_enable_mrr(struct rt2860_softc *sc)
2217 RAL_WRITE(sc, RT2860_LG_FBK_CFG0,
2227 RAL_WRITE(sc, RT2860_LG_FBK_CFG1,
2237 rt2860_set_txpreamble(struct rt2860_softc *sc)
2239 struct ieee80211com *ic = &sc->sc_ic;
2242 tmp = RAL_READ(sc, RT2860_AUTO_RSP_CFG);
2246 RAL_WRITE(sc, RT2860_AUTO_RSP_CFG, tmp);
2250 rt2860_set_basicrates(struct rt2860_softc *sc,
2253 struct ieee80211com *ic = &sc->sc_ic;
2268 RAL_WRITE(sc, RT2860_LEGACY_BASIC_RATE, mask);
2274 struct rt2860_softc *sc = ic->ic_softc;
2277 tmp = RAL_READ(sc, RT2860_BCN_TIME_CFG);
2278 RAL_WRITE(sc, RT2860_BCN_TIME_CFG,
2281 rt2860_set_gp_timer(sc, 0);
2287 struct rt2860_softc *sc = ic->ic_softc;
2291 rt2860_enable_tsf_sync(sc);
2292 rt2860_set_gp_timer(sc, 500);
2300 struct rt2860_softc *sc = ic->ic_softc;
2308 if (sc->rf_rev == RT2860_RF_2750 || sc->rf_rev == RT2860_RF_2850) {
2318 struct rt2860_softc *sc = ic->ic_softc;
2320 RAL_LOCK(sc);
2321 rt2860_switch_chan(sc, ic->ic_curchan);
2322 RAL_UNLOCK(sc);
2326 rt2860_select_chan_group(struct rt2860_softc *sc, int group)
2331 rt2860_mcu_bbp_write(sc, 62, 0x37 - sc->lna[group]);
2332 rt2860_mcu_bbp_write(sc, 63, 0x37 - sc->lna[group]);
2333 rt2860_mcu_bbp_write(sc, 64, 0x37 - sc->lna[group]);
2334 rt2860_mcu_bbp_write(sc, 86, 0x00);
2337 if (sc->ext_2ghz_lna) {
2338 rt2860_mcu_bbp_write(sc, 82, 0x62);
2339 rt2860_mcu_bbp_write(sc, 75, 0x46);
2341 rt2860_mcu_bbp_write(sc, 82, 0x84);
2342 rt2860_mcu_bbp_write(sc, 75, 0x50);
2345 if (sc->ext_5ghz_lna) {
2346 rt2860_mcu_bbp_write(sc, 82, 0xf2);
2347 rt2860_mcu_bbp_write(sc, 75, 0x46);
2349 rt2860_mcu_bbp_write(sc, 82, 0xf2);
2350 rt2860_mcu_bbp_write(sc, 75, 0x50);
2354 tmp = RAL_READ(sc, RT2860_TX_BAND_CFG);
2357 RAL_WRITE(sc, RT2860_TX_BAND_CFG, tmp);
2361 if (sc->nrxchains > 1)
2363 if (sc->mac_ver == 0x3593 && sc->nrxchains > 2)
2367 if (sc->ntxchains > 1)
2369 if (sc->mac_ver == 0x3593 && sc->ntxchains > 2)
2373 if (sc->ntxchains > 1)
2375 if (sc->mac_ver == 0x3593 && sc->ntxchains > 2)
2378 RAL_WRITE(sc, RT2860_TX_PIN_CFG, tmp);
2380 if (sc->mac_ver == 0x3593) {
2381 tmp = RAL_READ(sc, RT2860_GPIO_CTRL);
2382 if (sc->sc_flags & RT2860_PCIE) {
2392 RAL_WRITE(sc, RT2860_GPIO_CTRL, tmp);
2397 if (sc->mac_ver >= 0x3071)
2398 agc = 0x1c + sc->lna[0] * 2;
2400 agc = 0x2e + sc->lna[0];
2402 agc = 0x32 + (sc->lna[group] * 5) / 3;
2404 rt2860_mcu_bbp_write(sc, 66, agc);
2410 rt2860_set_chan(struct rt2860_softc *sc, u_int chan)
2421 if (sc->ntxchains == 1)
2423 if (sc->nrxchains == 1)
2425 else if (sc->nrxchains == 2)
2429 txpow1 = sc->txpow1[i];
2430 txpow2 = sc->txpow2[i];
2442 r4 = rfprog[i].r4 | sc->freq << 13 | txpow2 << 4;
2444 rt2860_rf_write(sc, RT2860_RF1, rfprog[i].r1);
2445 rt2860_rf_write(sc, RT2860_RF2, r2);
2446 rt2860_rf_write(sc, RT2860_RF3, r3);
2447 rt2860_rf_write(sc, RT2860_RF4, r4);
2451 rt2860_rf_write(sc, RT2860_RF1, rfprog[i].r1);
2452 rt2860_rf_write(sc, RT2860_RF2, r2);
2453 rt2860_rf_write(sc, RT2860_RF3, r3 | 1);
2454 rt2860_rf_write(sc, RT2860_RF4, r4);
2458 rt2860_rf_write(sc, RT2860_RF1, rfprog[i].r1);
2459 rt2860_rf_write(sc, RT2860_RF2, r2);
2460 rt2860_rf_write(sc, RT2860_RF3, r3);
2461 rt2860_rf_write(sc, RT2860_RF4, r4);
2465 rt3090_set_chan(struct rt2860_softc *sc, u_int chan)
2478 txpow1 = sc->txpow1[i];
2479 txpow2 = sc->txpow2[i];
2481 rt3090_rf_write(sc, 2, rt3090_freqs[i].n);
2482 rf = rt3090_rf_read(sc, 3);
2484 rt3090_rf_write(sc, 3, rf);
2485 rf = rt3090_rf_read(sc, 6);
2487 rt3090_rf_write(sc, 6, rf);
2490 rf = rt3090_rf_read(sc, 12);
2492 rt3090_rf_write(sc, 12, rf);
2495 rf = rt3090_rf_read(sc, 13);
2497 rt3090_rf_write(sc, 13, rf);
2499 rf = rt3090_rf_read(sc, 1);
2501 if (sc->ntxchains == 1)
2503 else if (sc->ntxchains == 2)
2505 if (sc->nrxchains == 1)
2507 else if (sc->nrxchains == 2)
2509 rt3090_rf_write(sc, 1, rf);
2512 rf = rt3090_rf_read(sc, 23);
2513 rf = (rf & ~0x7f) | sc->freq;
2514 rt3090_rf_write(sc, 23, rf);
2517 rf = rt3090_rf_read(sc, 24); /* Tx */
2518 rf = (rf & ~0x3f) | sc->rf24_20mhz;
2519 rt3090_rf_write(sc, 24, rf);
2520 rf = rt3090_rf_read(sc, 31); /* Rx */
2521 rf = (rf & ~0x3f) | sc->rf24_20mhz;
2522 rt3090_rf_write(sc, 31, rf);
2525 rf = rt3090_rf_read(sc, 7);
2526 rt3090_rf_write(sc, 7, rf | RT3070_TUNE);
2530 rt5390_set_chan(struct rt2860_softc *sc, u_int chan)
2543 txpow1 = sc->txpow1[i];
2544 txpow2 = sc->txpow2[i];
2546 rt3090_rf_write(sc, 8, rt3090_freqs[i].n);
2547 rt3090_rf_write(sc, 9, rt3090_freqs[i].k & 0x0f);
2548 rf = rt3090_rf_read(sc, 11);
2550 rt3090_rf_write(sc, 11, rf);
2552 rf = rt3090_rf_read(sc, 49);
2557 rt3090_rf_write(sc, 49, rf);
2558 if (sc->mac_ver == 0x5392) {
2559 rf = rt3090_rf_read(sc, 50);
2564 rt3090_rf_write(sc, 50, rf);
2567 rf = rt3090_rf_read(sc, 1);
2569 if (sc->mac_ver == 0x5392)
2571 rt3090_rf_write(sc, 1, rf);
2573 rf = rt3090_rf_read(sc, 2);
2574 rt3090_rf_write(sc, 2, rf | RT3593_RESCAL);
2576 rt3090_rf_write(sc, 2, rf & ~RT3593_RESCAL);
2578 rf = rt3090_rf_read(sc, 17);
2580 rf = (rf & ~0x7f) | (sc->freq & 0x7f);
2583 rt2860_mcu_cmd(sc, 0x74, (tmp << 8 ) | rf, 0);
2585 if (sc->mac_ver == 0x5390) {
2594 rt3090_rf_write(sc, 55, rf);
2610 rt3090_rf_write(sc, 59, rf);
2614 h20mhz = (sc->rf24_20mhz & 0x20) >> 5;
2615 rf = rt3090_rf_read(sc, 30);
2617 rt3090_rf_write(sc, 30, rf);
2620 rf = rt3090_rf_read(sc, 30);
2622 rt3090_rf_write(sc, 30, rf);
2625 rf = rt3090_rf_read(sc, 3);
2627 rt3090_rf_write(sc, 3, rf);
2631 rt3090_rf_init(struct rt2860_softc *sc)
2637 rf = rt3090_rf_read(sc, 30);
2639 rt3090_rf_write(sc, 30, rf | 0x80);
2641 rt3090_rf_write(sc, 30, rf & ~0x80);
2643 tmp = RAL_READ(sc, RT3070_LDO_CFG0);
2645 if (sc->patch_dac && sc->mac_rev < 0x0211)
2649 RAL_WRITE(sc, RT3070_LDO_CFG0, tmp);
2652 tmp = RAL_READ(sc, RT3070_GPIO_SWITCH);
2653 RAL_WRITE(sc, RT3070_GPIO_SWITCH, tmp & ~0x20);
2657 rt3090_rf_write(sc, rt3090_def_rf[i].reg,
2662 rt3090_rf_write(sc, 31, 0x14);
2664 rf = rt3090_rf_read(sc, 6);
2665 rt3090_rf_write(sc, 6, rf | 0x40);
2667 if (sc->mac_ver != 0x3593) {
2669 sc->rf24_20mhz = 0x1f; /* default value */
2670 rt3090_filter_calib(sc, 0x07, 0x16, &sc->rf24_20mhz);
2673 bbp = rt2860_mcu_bbp_read(sc, 4);
2674 rt2860_mcu_bbp_write(sc, 4, (bbp & ~0x08) | 0x10);
2675 rf = rt3090_rf_read(sc, 31);
2676 rt3090_rf_write(sc, 31, rf | 0x20);
2679 sc->rf24_40mhz = 0x2f; /* default value */
2680 rt3090_filter_calib(sc, 0x27, 0x19, &sc->rf24_40mhz);
2683 bbp = rt2860_mcu_bbp_read(sc, 4);
2684 rt2860_mcu_bbp_write(sc, 4, bbp & ~0x18);
2686 if (sc->mac_rev < 0x0211)
2687 rt3090_rf_write(sc, 27, 0x03);
2689 tmp = RAL_READ(sc, RT3070_OPT_14);
2690 RAL_WRITE(sc, RT3070_OPT_14, tmp | 1);
2692 if (sc->rf_rev == RT3070_RF_3020)
2693 rt3090_set_rx_antenna(sc, 0);
2695 bbp = rt2860_mcu_bbp_read(sc, 138);
2696 if (sc->mac_ver == 0x3593) {
2697 if (sc->ntxchains == 1)
2699 else if (sc->ntxchains == 2)
2701 if (sc->nrxchains == 1)
2703 else if (sc->nrxchains == 2)
2706 if (sc->ntxchains == 1)
2708 if (sc->nrxchains == 1)
2711 rt2860_mcu_bbp_write(sc, 138, bbp);
2713 rf = rt3090_rf_read(sc, 1);
2716 rt3090_rf_write(sc, 1, rf);
2718 rf = rt3090_rf_read(sc, 15);
2719 rt3090_rf_write(sc, 15, rf & ~RT3070_TX_LO2);
2721 rf = rt3090_rf_read(sc, 17);
2723 if (sc->mac_rev >= 0x0211 && !sc->ext_2ghz_lna)
2725 if (sc->txmixgain_2ghz >= 2)
2726 rf = (rf & ~0x7) | sc->txmixgain_2ghz;
2727 rt3090_rf_write(sc, 17, rf);
2729 rf = rt3090_rf_read(sc, 20);
2730 rt3090_rf_write(sc, 20, rf & ~RT3070_RX_LO1);
2732 rf = rt3090_rf_read(sc, 21);
2733 rt3090_rf_write(sc, 21, rf & ~RT3070_RX_LO2);
2739 rt5390_rf_init(struct rt2860_softc *sc)
2744 rf = rt3090_rf_read(sc, 2);
2746 rt3090_rf_write(sc, 2, rf | RT3593_RESCAL);
2748 rt3090_rf_write(sc, 2, rf & ~RT3593_RESCAL);
2751 if (sc->mac_ver == 0x5392) {
2753 rt3090_rf_write(sc, rt5392_def_rf[i].reg,
2758 rt3090_rf_write(sc, rt5390_def_rf[i].reg,
2763 sc->rf24_20mhz = 0x1f;
2764 sc->rf24_40mhz = 0x2f;
2766 if (sc->mac_rev < 0x0211)
2767 rt3090_rf_write(sc, 27, 0x03);
2770 RAL_WRITE(sc, RT3070_OPT_14, RAL_READ(sc, RT3070_OPT_14) | 1);
2772 RAL_WRITE(sc, RT2860_TX_SW_CFG1, 0);
2773 RAL_WRITE(sc, RT2860_TX_SW_CFG2, 0);
2775 if (sc->mac_ver == 0x5390)
2776 rt3090_set_rx_antenna(sc, 0);
2779 rt2860_mcu_bbp_write(sc, 79, 0x13);
2780 rt2860_mcu_bbp_write(sc, 80, 0x05);
2781 rt2860_mcu_bbp_write(sc, 81, 0x33);
2784 if (sc->mac_rev >= 0x0211)
2785 rt2860_mcu_bbp_write(sc, 103, 0xc0);
2787 bbp = rt2860_mcu_bbp_read(sc, 138);
2788 if (sc->ntxchains == 1)
2790 if (sc->nrxchains == 1)
2792 rt2860_mcu_bbp_write(sc, 138, bbp);
2795 rt3090_rf_write(sc, 38, rt3090_rf_read(sc, 38) & ~RT5390_RX_LO1);
2796 rt3090_rf_write(sc, 39, rt3090_rf_read(sc, 39) & ~RT5390_RX_LO2);
2799 rt2860_mcu_bbp_write(sc, 4,
2800 rt2860_mcu_bbp_read(sc, 4) | RT5390_MAC_IF_CTRL);
2802 rf = rt3090_rf_read(sc, 30);
2804 rt3090_rf_write(sc, 30, rf);
2808 rt3090_rf_wakeup(struct rt2860_softc *sc)
2813 if (sc->mac_ver == 0x3593) {
2815 rf = rt3090_rf_read(sc, 1);
2816 rt3090_rf_write(sc, 1, rf | RT3593_VCO);
2819 rf = rt3090_rf_read(sc, 3);
2820 rt3090_rf_write(sc, 3, rf | RT3593_VCOCAL);
2823 rf = rt3090_rf_read(sc, 6);
2824 rt3090_rf_write(sc, 6, rf | RT3593_VCO_IC);
2827 rf = rt3090_rf_read(sc, 2);
2828 rt3090_rf_write(sc, 2, rf | RT3593_RESCAL);
2831 rf = rt3090_rf_read(sc, 22);
2834 rt3090_rf_write(sc, 22, rf);
2837 rf = rt3090_rf_read(sc, 46);
2838 rt3090_rf_write(sc, 46, rf | RT3593_RX_CTB);
2840 rf = rt3090_rf_read(sc, 20);
2842 rt3090_rf_write(sc, 20, rf);
2845 rf = rt3090_rf_read(sc, 1);
2846 rt3090_rf_write(sc, 1, rf | RT3070_RF_BLOCK);
2849 rf = rt3090_rf_read(sc, 7);
2850 rt3090_rf_write(sc, 7, rf | 0x30);
2852 rf = rt3090_rf_read(sc, 9);
2853 rt3090_rf_write(sc, 9, rf | 0x0e);
2856 rf = rt3090_rf_read(sc, 21);
2857 rt3090_rf_write(sc, 21, rf | RT3070_RX_CTB);
2860 rf = rt3090_rf_read(sc, 27);
2862 if (sc->mac_rev < 0x0211)
2864 rt3090_rf_write(sc, 27, rf);
2866 if (sc->patch_dac && sc->mac_rev < 0x0211) {
2867 tmp = RAL_READ(sc, RT3070_LDO_CFG0);
2869 RAL_WRITE(sc, RT3070_LDO_CFG0, tmp);
2874 rt5390_rf_wakeup(struct rt2860_softc *sc)
2879 rf = rt3090_rf_read(sc, 1);
2882 if (sc->mac_ver == 0x5392)
2884 rt3090_rf_write(sc, 1, rf);
2886 rf = rt3090_rf_read(sc, 6);
2888 if (sc->mac_ver == 0x5390)
2890 rt3090_rf_write(sc, 6, rf);
2892 rt3090_rf_write(sc, 2, rt3090_rf_read(sc, 2) | RT3593_RESCAL);
2894 rf = rt3090_rf_read(sc, 22);
2896 rt3090_rf_write(sc, 22, rf);
2898 rt3090_rf_write(sc, 42, rt3090_rf_read(sc, 42) | RT5390_RX_CTB);
2899 rt3090_rf_write(sc, 20, rt3090_rf_read(sc, 20) & ~0x77);
2900 rt3090_rf_write(sc, 3, rt3090_rf_read(sc, 3) | RT3593_VCOCAL);
2902 if (sc->patch_dac && sc->mac_rev < 0x0211) {
2903 tmp = RAL_READ(sc, RT3070_LDO_CFG0);
2905 RAL_WRITE(sc, RT3070_LDO_CFG0, tmp);
2910 rt3090_filter_calib(struct rt2860_softc *sc, uint8_t init, uint8_t target,
2918 rf24 = rt3090_rf_read(sc, 24);
2920 rt3090_rf_write(sc, 24, rf24);
2923 rf22 = rt3090_rf_read(sc, 22);
2924 rt3090_rf_write(sc, 22, rf22 | RT3070_BB_LOOPBACK);
2927 rt2860_mcu_bbp_write(sc, 24, 0x00);
2930 rt2860_mcu_bbp_write(sc, 25, 0x90);
2933 bbp55_pb = rt2860_mcu_bbp_read(sc, 55);
2941 rt2860_mcu_bbp_write(sc, 24, 0x06);
2944 rt2860_mcu_bbp_write(sc, 25, 0x90);
2947 bbp55_sb = rt2860_mcu_bbp_read(sc, 55);
2955 rt3090_rf_write(sc, 24, rf24);
2961 rt3090_rf_write(sc, 24, rf24);
2965 rt2860_mcu_bbp_write(sc, 24, 0x00);
2968 rf22 = rt3090_rf_read(sc, 22);
2969 rt3090_rf_write(sc, 22, rf22 & ~RT3070_BB_LOOPBACK);
2975 rt3090_rf_setup(struct rt2860_softc *sc)
2980 if (sc->mac_rev >= 0x0211) {
2982 rt2860_mcu_bbp_write(sc, 103, 0xc0);
2985 bbp = rt2860_mcu_bbp_read(sc, 31);
2986 rt2860_mcu_bbp_write(sc, 31, bbp & ~0x03);
2989 RAL_WRITE(sc, RT2860_TX_SW_CFG1, 0);
2990 if (sc->mac_rev < 0x0211) {
2991 RAL_WRITE(sc, RT2860_TX_SW_CFG2,
2992 sc->patch_dac ? 0x2c : 0x0f);
2994 RAL_WRITE(sc, RT2860_TX_SW_CFG2, 0);
2997 if (sc->mac_ver < 0x5390) {
2999 if (sc->rf[i].reg == 0 || sc->rf[i].reg == 0xff)
3001 rt3090_rf_write(sc, sc->rf[i].reg, sc->rf[i].val);
3007 rt2860_set_leds(struct rt2860_softc *sc, uint16_t which)
3009 rt2860_mcu_cmd(sc, RT2860_MCU_CMD_LEDS,
3010 which | (sc->leds & 0x7f), 0);
3018 rt2860_set_gp_timer(struct rt2860_softc *sc, int ms)
3023 tmp = RAL_READ(sc, RT2860_INT_TIMER_EN);
3024 RAL_WRITE(sc, RT2860_INT_TIMER_EN, tmp & ~RT2860_GP_TIMER_EN);
3029 tmp = RAL_READ(sc, RT2860_INT_TIMER_CFG);
3032 RAL_WRITE(sc, RT2860_INT_TIMER_CFG, tmp);
3035 tmp = RAL_READ(sc, RT2860_INT_TIMER_EN);
3036 RAL_WRITE(sc, RT2860_INT_TIMER_EN, tmp | RT2860_GP_TIMER_EN);
3040 rt2860_set_bssid(struct rt2860_softc *sc, const uint8_t *bssid)
3042 RAL_WRITE(sc, RT2860_MAC_BSSID_DW0,
3044 RAL_WRITE(sc, RT2860_MAC_BSSID_DW1,
3049 rt2860_set_macaddr(struct rt2860_softc *sc, const uint8_t *addr)
3051 RAL_WRITE(sc, RT2860_MAC_ADDR_DW0,
3053 RAL_WRITE(sc, RT2860_MAC_ADDR_DW1,
3060 struct rt2860_softc *sc = ic->ic_softc;
3063 tmp = RAL_READ(sc, RT2860_BKOFF_SLOT_CFG);
3066 RAL_WRITE(sc, RT2860_BKOFF_SLOT_CFG, tmp);
3070 rt2860_updateprot(struct rt2860_softc *sc)
3072 struct ieee80211com *ic = &sc->sc_ic;
3082 RAL_WRITE(sc, RT2860_CCK_PROT_CFG, tmp);
3090 RAL_WRITE(sc, RT2860_OFDM_PROT_CFG, tmp);
3096 struct rt2860_softc *sc = ic->ic_softc;
3099 tmp = RAL_READ(sc, RT2860_RX_FILTR_CFG);
3103 RAL_WRITE(sc, RT2860_RX_FILTR_CFG, tmp);
3109 struct rt2860_softc *sc = ic->ic_softc;
3120 RAL_WRITE(sc, RT2860_EDCA_AC_CFG(aci),
3128 RAL_WRITE(sc, RT2860_WMM_AIFSN_CFG,
3133 RAL_WRITE(sc, RT2860_WMM_CWMIN_CFG,
3138 RAL_WRITE(sc, RT2860_WMM_CWMAX_CFG,
3143 RAL_WRITE(sc, RT2860_WMM_TXOP0_CFG,
3146 RAL_WRITE(sc, RT2860_WMM_TXOP1_CFG,
3158 struct rt2860_softc *sc = ic->ic_softc;
3195 RAL_WRITE_REGION_1(sc, base, k->k_key, 16);
3198 RAL_WRITE_REGION_1(sc, base + 16, &k->k_key[16], 8);
3199 RAL_WRITE_REGION_1(sc, base + 24, &k->k_key[24], 8);
3203 RAL_WRITE_REGION_1(sc, base + 16, &k->k_key[24], 8);
3204 RAL_WRITE_REGION_1(sc, base + 24, &k->k_key[16], 8);
3207 RAL_WRITE_REGION_1(sc, base, k->k_key, k->k_len);
3239 RAL_WRITE_REGION_1(sc, RT2860_IVEIV(wcid), iv, 8);
3244 attr = RAL_READ(sc, RT2860_SKEY_MODE_0_7);
3247 RAL_WRITE(sc, RT2860_SKEY_MODE_0_7, attr);
3250 attr = RAL_READ(sc, RT2860_WCID_ATTR(wcid));
3252 RAL_WRITE(sc, RT2860_WCID_ATTR(wcid), attr);
3261 struct rt2860_softc *sc = ic->ic_softc;
3267 attr = RAL_READ(sc, RT2860_SKEY_MODE_0_7);
3269 RAL_WRITE(sc, RT2860_SKEY_MODE_0_7, attr);
3274 attr = RAL_READ(sc, RT2860_WCID_ATTR(wcid));
3276 RAL_WRITE(sc, RT2860_WCID_ATTR(wcid), attr);
3282 rt2860_rssi2dbm(struct rt2860_softc *sc, uint8_t rssi, uint8_t rxchain)
3284 struct ieee80211com *ic = &sc->sc_ic;
3290 delta = sc->rssi_5ghz[rxchain];
3294 delta -= sc->lna[1];
3296 delta -= sc->lna[2];
3298 delta -= sc->lna[3];
3300 delta = sc->rssi_2ghz[rxchain] - sc->lna[0];
3348 rt2860_read_eeprom(struct rt2860_softc *sc, uint8_t macaddr[IEEE80211_ADDR_LEN])
3356 sc->sc_srom_read = rt2860_eeprom_read_2;
3357 if (sc->mac_ver >= 0x3071) {
3358 tmp = RAL_READ(sc, RT3070_EFUSE_CTRL);
3361 sc->sc_srom_read = rt3090_efuse_read_2;
3366 val = rt2860_srom_read(sc, RT2860_EEPROM_VERSION);
3371 val = rt2860_srom_read(sc, RT2860_EEPROM_MAC01);
3374 val = rt2860_srom_read(sc, RT2860_EEPROM_MAC23);
3377 val = rt2860_srom_read(sc, RT2860_EEPROM_MAC45);
3383 val = rt2860_srom_read(sc, RT2860_EEPROM_COUNTRY);
3389 val = rt2860_srom_read(sc, RT2860_EEPROM_BBP_BASE + i);
3390 sc->bbp[i].val = val & 0xff;
3391 sc->bbp[i].reg = val >> 8;
3392 DPRINTF(("BBP%d=0x%02x\n", sc->bbp[i].reg, sc->bbp[i].val));
3394 if (sc->mac_ver >= 0x3071) {
3397 val = rt2860_srom_read(sc, RT3071_EEPROM_RF_BASE + i);
3398 sc->rf[i].val = val & 0xff;
3399 sc->rf[i].reg = val >> 8;
3400 DPRINTF(("RF%d=0x%02x\n", sc->rf[i].reg,
3401 sc->rf[i].val));
3406 val = rt2860_srom_read(sc, RT2860_EEPROM_FREQ_LEDS);
3407 sc->freq = ((val & 0xff) != 0xff) ? val & 0xff : 0;
3408 DPRINTF(("EEPROM freq offset %d\n", sc->freq & 0xff));
3411 sc->leds = val >> 8;
3412 sc->led[0] = rt2860_srom_read(sc, RT2860_EEPROM_LED1);
3413 sc->led[1] = rt2860_srom_read(sc, RT2860_EEPROM_LED2);
3414 sc->led[2] = rt2860_srom_read(sc, RT2860_EEPROM_LED3);
3417 sc->leds = 0x01;
3418 sc->led[0] = 0x5555;
3419 sc->led[1] = 0x2221;
3420 sc->led[2] = 0xa9f8;
3423 sc->leds, sc->led[0], sc->led[1], sc->led[2]));
3426 val = rt2860_srom_read(sc, RT2860_EEPROM_ANTENNA);
3427 if (sc->mac_ver >= 0x5390)
3428 sc->rf_rev = rt2860_srom_read(sc, RT2860_EEPROM_CHIPID);
3430 sc->rf_rev = (val >> 8) & 0xf;
3431 sc->ntxchains = (val >> 4) & 0xf;
3432 sc->nrxchains = val & 0xf;
3434 sc->rf_rev, sc->ntxchains, sc->nrxchains));
3437 val = rt2860_srom_read(sc, RT2860_EEPROM_CONFIG);
3441 sc->patch_dac = (val >> 15) & 1;
3443 sc->ext_5ghz_lna = (val >> 3) & 1;
3444 sc->ext_2ghz_lna = (val >> 2) & 1;
3446 sc->calib_2ghz = sc->calib_5ghz = 0; /* XXX (val >> 1) & 1 */
3448 sc->rfswitch = val & 1;
3450 if (sc->sc_flags & RT2860_ADVANCED_PS) {
3452 val = rt2860_srom_read(sc, RT2860_EEPROM_PCIE_PSLEVEL);
3454 sc->pslevel = val & 0x3;
3455 val = rt2860_srom_read(sc, RT2860_EEPROM_REV);
3457 sc->pslevel = MIN(sc->pslevel, 1);
3458 DPRINTF(("EEPROM PCIe PS Level=%d\n", sc->pslevel));
3464 val = rt2860_srom_read(sc,
3466 sc->txpow1[i + 0] = (int8_t)(val & 0xff);
3467 sc->txpow1[i + 1] = (int8_t)(val >> 8);
3469 if (sc->mac_ver != 0x5390) {
3470 val = rt2860_srom_read(sc,
3472 sc->txpow2[i + 0] = (int8_t)(val & 0xff);
3473 sc->txpow2[i + 1] = (int8_t)(val >> 8);
3478 if (sc->txpow1[i] < 0 ||
3479 sc->txpow1[i] > ((sc->mac_ver >= 0x5390) ? 39 : 31))
3480 sc->txpow1[i] = 5;
3481 if (sc->mac_ver != 0x5390) {
3482 if (sc->txpow2[i] < 0 ||
3483 sc->txpow2[i] > ((sc->mac_ver == 0x5392) ? 39 : 31))
3484 sc->txpow2[i] = 5;
3487 rt2860_rf2850[i].chan, sc->txpow1[i], sc->txpow2[i]));
3491 val = rt2860_srom_read(sc,
3493 sc->txpow1[i + 14] = (int8_t)(val & 0xff);
3494 sc->txpow1[i + 15] = (int8_t)(val >> 8);
3496 val = rt2860_srom_read(sc,
3498 sc->txpow2[i + 14] = (int8_t)(val & 0xff);
3499 sc->txpow2[i + 15] = (int8_t)(val >> 8);
3503 if (sc->txpow1[14 + i] < -7 || sc->txpow1[14 + i] > 15)
3504 sc->txpow1[14 + i] = 5;
3505 if (sc->txpow2[14 + i] < -7 || sc->txpow2[14 + i] > 15)
3506 sc->txpow2[14 + i] = 5;
3508 rt2860_rf2850[14 + i].chan, sc->txpow1[14 + i],
3509 sc->txpow2[14 + i]));
3513 val = rt2860_srom_read(sc, RT2860_EEPROM_DELTAPWR);
3532 val = rt2860_srom_read(sc, RT2860_EEPROM_RPWR + ridx * 2);
3534 val = rt2860_srom_read(sc, RT2860_EEPROM_RPWR + ridx * 2 + 1);
3537 sc->txpow20mhz[ridx] = reg;
3538 sc->txpow40mhz_2ghz[ridx] = b4inc(reg, delta_2ghz);
3539 sc->txpow40mhz_5ghz[ridx] = b4inc(reg, delta_5ghz);
3542 "40MHz/5GHz=0x%08x\n", ridx, sc->txpow20mhz[ridx],
3543 sc->txpow40mhz_2ghz[ridx], sc->txpow40mhz_5ghz[ridx]));
3547 val = rt2860_srom_read(sc, RT2860_EEPROM_TSSI1_2GHZ);
3548 sc->tssi_2ghz[0] = val & 0xff; /* [-4] */
3549 sc->tssi_2ghz[1] = val >> 8; /* [-3] */
3550 val = rt2860_srom_read(sc, RT2860_EEPROM_TSSI2_2GHZ);
3551 sc->tssi_2ghz[2] = val & 0xff; /* [-2] */
3552 sc->tssi_2ghz[3] = val >> 8; /* [-1] */
3553 val = rt2860_srom_read(sc, RT2860_EEPROM_TSSI3_2GHZ);
3554 sc->tssi_2ghz[4] = val & 0xff; /* [+0] */
3555 sc->tssi_2ghz[5] = val >> 8; /* [+1] */
3556 val = rt2860_srom_read(sc, RT2860_EEPROM_TSSI4_2GHZ);
3557 sc->tssi_2ghz[6] = val & 0xff; /* [+2] */
3558 sc->tssi_2ghz[7] = val >> 8; /* [+3] */
3559 val = rt2860_srom_read(sc, RT2860_EEPROM_TSSI5_2GHZ);
3560 sc->tssi_2ghz[8] = val & 0xff; /* [+4] */
3561 sc->step_2ghz = val >> 8;
3563 "0x%02x 0x%02x step=%d\n", sc->tssi_2ghz[0], sc->tssi_2ghz[1],
3564 sc->tssi_2ghz[2], sc->tssi_2ghz[3], sc->tssi_2ghz[4],
3565 sc->tssi_2ghz[5], sc->tssi_2ghz[6], sc->tssi_2ghz[7],
3566 sc->tssi_2ghz[8], sc->step_2ghz));
3568 if (sc->tssi_2ghz[4] == 0xff)
3569 sc->calib_2ghz = 0;
3571 val = rt2860_srom_read(sc, RT2860_EEPROM_TSSI1_5GHZ);
3572 sc->tssi_5ghz[0] = val & 0xff; /* [-4] */
3573 sc->tssi_5ghz[1] = val >> 8; /* [-3] */
3574 val = rt2860_srom_read(sc, RT2860_EEPROM_TSSI2_5GHZ);
3575 sc->tssi_5ghz[2] = val & 0xff; /* [-2] */
3576 sc->tssi_5ghz[3] = val >> 8; /* [-1] */
3577 val = rt2860_srom_read(sc, RT2860_EEPROM_TSSI3_5GHZ);
3578 sc->tssi_5ghz[4] = val & 0xff; /* [+0] */
3579 sc->tssi_5ghz[5] = val >> 8; /* [+1] */
3580 val = rt2860_srom_read(sc, RT2860_EEPROM_TSSI4_5GHZ);
3581 sc->tssi_5ghz[6] = val & 0xff; /* [+2] */
3582 sc->tssi_5ghz[7] = val >> 8; /* [+3] */
3583 val = rt2860_srom_read(sc, RT2860_EEPROM_TSSI5_5GHZ);
3584 sc->tssi_5ghz[8] = val & 0xff; /* [+4] */
3585 sc->step_5ghz = val >> 8;
3587 "0x%02x 0x%02x step=%d\n", sc->tssi_5ghz[0], sc->tssi_5ghz[1],
3588 sc->tssi_5ghz[2], sc->tssi_5ghz[3], sc->tssi_5ghz[4],
3589 sc->tssi_5ghz[5], sc->tssi_5ghz[6], sc->tssi_5ghz[7],
3590 sc->tssi_5ghz[8], sc->step_5ghz));
3592 if (sc->tssi_5ghz[4] == 0xff)
3593 sc->calib_5ghz = 0;
3596 val = rt2860_srom_read(sc, RT2860_EEPROM_RSSI1_2GHZ);
3597 sc->rssi_2ghz[0] = val & 0xff; /* Ant A */
3598 sc->rssi_2ghz[1] = val >> 8; /* Ant B */
3599 val = rt2860_srom_read(sc, RT2860_EEPROM_RSSI2_2GHZ);
3600 if (sc->mac_ver >= 0x3071) {
3606 sc->txmixgain_2ghz = val & 0x7;
3607 DPRINTF(("tx mixer gain=%u (2GHz)\n", sc->txmixgain_2ghz));
3609 sc->rssi_2ghz[2] = val & 0xff; /* Ant C */
3610 sc->lna[2] = val >> 8; /* channel group 2 */
3612 val = rt2860_srom_read(sc, RT2860_EEPROM_RSSI1_5GHZ);
3613 sc->rssi_5ghz[0] = val & 0xff; /* Ant A */
3614 sc->rssi_5ghz[1] = val >> 8; /* Ant B */
3615 val = rt2860_srom_read(sc, RT2860_EEPROM_RSSI2_5GHZ);
3616 sc->rssi_5ghz[2] = val & 0xff; /* Ant C */
3617 sc->lna[3] = val >> 8; /* channel group 3 */
3619 val = rt2860_srom_read(sc, RT2860_EEPROM_LNA);
3620 if (sc->mac_ver >= 0x3071)
3621 sc->lna[0] = RT3090_DEF_LNA;
3623 sc->lna[0] = val & 0xff;
3624 sc->lna[1] = val >> 8; /* channel group 1 */
3627 if (sc->lna[2] == 0 || sc->lna[2] == 0xff) {
3629 sc->lna[2] = sc->lna[1];
3631 if (sc->lna[3] == 0 || sc->lna[3] == 0xff) {
3633 sc->lna[3] = sc->lna[1];
3638 if (sc->rssi_2ghz[ant] < -10 || sc->rssi_2ghz[ant] > 10) {
3640 ant + 1, sc->rssi_2ghz[ant]));
3641 sc->rssi_2ghz[ant] = 0;
3643 if (sc->rssi_5ghz[ant] < -10 || sc->rssi_5ghz[ant] > 10) {
3645 ant + 1, sc->rssi_5ghz[ant]));
3646 sc->rssi_5ghz[ant] = 0;
3654 rt2860_bbp_init(struct rt2860_softc *sc)
3660 uint8_t bbp0 = rt2860_mcu_bbp_read(sc, 0);
3665 device_printf(sc->sc_dev,
3671 if (sc->mac_ver >= 0x5390)
3672 rt5390_bbp_init(sc);
3675 rt2860_mcu_bbp_write(sc, rt2860_def_bbp[i].reg,
3681 if (sc->mac_ver == 0x2860 && sc->mac_rev != 0x0101)
3682 rt2860_mcu_bbp_write(sc, 84, 0x19);
3684 if (sc->mac_ver >= 0x3071) {
3685 rt2860_mcu_bbp_write(sc, 79, 0x13);
3686 rt2860_mcu_bbp_write(sc, 80, 0x05);
3687 rt2860_mcu_bbp_write(sc, 81, 0x33);
3688 } else if (sc->mac_ver == 0x2860 && sc->mac_rev == 0x0100) {
3689 rt2860_mcu_bbp_write(sc, 69, 0x16);
3690 rt2860_mcu_bbp_write(sc, 73, 0x12);
3697 rt5390_bbp_init(struct rt2860_softc *sc)
3703 if (sc->nrxchains > 1) {
3704 bbp = rt2860_mcu_bbp_read(sc, 105);
3705 rt2860_mcu_bbp_write(sc, 105, bbp | RT5390_MLD);
3709 bbp = rt2860_mcu_bbp_read(sc, 4);
3710 rt2860_mcu_bbp_write(sc, 4, bbp | RT5390_MAC_IF_CTRL);
3713 rt2860_mcu_bbp_write(sc, rt5390_def_bbp[i].reg,
3717 if (sc->mac_ver == 0x5392) {
3718 rt2860_mcu_bbp_write(sc, 84, 0x9a);
3719 rt2860_mcu_bbp_write(sc, 95, 0x9a);
3720 rt2860_mcu_bbp_write(sc, 98, 0x12);
3721 rt2860_mcu_bbp_write(sc, 106, 0x05);
3722 rt2860_mcu_bbp_write(sc, 134, 0xd0);
3723 rt2860_mcu_bbp_write(sc, 135, 0xf6);
3726 bbp = rt2860_mcu_bbp_read(sc, 152);
3727 rt2860_mcu_bbp_write(sc, 152, bbp | 0x80);
3730 if (sc->mac_ver == 0x5390)
3731 rt2860_mcu_bbp_write(sc, 154, 0);
3735 rt2860_txrx_enable(struct rt2860_softc *sc)
3737 struct ieee80211com *ic = &sc->sc_ic;
3742 RAL_WRITE(sc, RT2860_MAC_SYS_CTRL, RT2860_MAC_TX_EN);
3743 RAL_BARRIER_READ_WRITE(sc);
3745 tmp = RAL_READ(sc, RT2860_WPDMA_GLO_CFG);
3751 device_printf(sc->sc_dev, "timeout waiting for DMA engine\n");
3759 RAL_WRITE(sc, RT2860_WPDMA_GLO_CFG, tmp);
3771 RAL_WRITE(sc, RT2860_RX_FILTR_CFG, tmp);
3773 RAL_WRITE(sc, RT2860_MAC_SYS_CTRL,
3782 struct rt2860_softc *sc = arg;
3783 struct ieee80211com *ic = &sc->sc_ic;
3785 RAL_LOCK(sc);
3786 rt2860_init_locked(sc);
3787 RAL_UNLOCK(sc);
3789 if (sc->sc_flags & RT2860_RUNNING)
3794 rt2860_init_locked(struct rt2860_softc *sc)
3796 struct ieee80211com *ic = &sc->sc_ic;
3802 RAL_LOCK_ASSERT(sc);
3804 if (sc->rfswitch) {
3806 if (!(RAL_READ(sc, RT2860_GPIO_CTRL) & (1 << 2))) {
3807 device_printf(sc->sc_dev,
3810 rt2860_stop_locked(sc);
3815 RAL_WRITE(sc, RT2860_PWR_PIN_CFG, RT2860_IO_RA_PE);
3818 tmp = RAL_READ(sc, RT2860_WPDMA_GLO_CFG);
3822 RAL_WRITE(sc, RT2860_WPDMA_GLO_CFG, tmp);
3825 RAL_WRITE(sc, RT2860_WPDMA_RST_IDX, RT2860_RST_DRX_IDX0 |
3830 RAL_WRITE(sc, RT2860_SYS_CTRL, 0xe1f);
3831 RAL_BARRIER_WRITE(sc);
3832 RAL_WRITE(sc, RT2860_SYS_CTRL, 0xe00);
3834 if ((error = rt2860_load_microcode(sc)) != 0) {
3835 device_printf(sc->sc_dev, "could not load 8051 microcode\n");
3836 rt2860_stop_locked(sc);
3840 rt2860_set_macaddr(sc, vap ? vap->iv_myaddr : ic->ic_macaddr);
3844 if (sc->txpow20mhz[ridx] == 0xffffffff)
3846 RAL_WRITE(sc, RT2860_TX_PWR_CFG(ridx), sc->txpow20mhz[ridx]);
3850 tmp = RAL_READ(sc, RT2860_WPDMA_GLO_CFG);
3856 device_printf(sc->sc_dev, "timeout waiting for DMA engine\n");
3857 rt2860_stop_locked(sc);
3863 RAL_WRITE(sc, RT2860_WPDMA_GLO_CFG, tmp);
3866 RAL_WRITE(sc, RT2860_WPDMA_RST_IDX, 0x1003f);
3869 RAL_WRITE(sc, RT2860_SYS_CTRL, 0xe1f);
3870 RAL_BARRIER_WRITE(sc);
3871 RAL_WRITE(sc, RT2860_SYS_CTRL, 0xe00);
3873 RAL_WRITE(sc, RT2860_PWR_PIN_CFG, RT2860_IO_RA_PE | RT2860_IO_RF_PE);
3875 RAL_WRITE(sc, RT2860_MAC_SYS_CTRL, RT2860_BBP_HRST | RT2860_MAC_SRST);
3876 RAL_BARRIER_WRITE(sc);
3877 RAL_WRITE(sc, RT2860_MAC_SYS_CTRL, 0);
3880 RAL_WRITE(sc, rt2860_def_mac[i].reg, rt2860_def_mac[i].val);
3881 if (sc->mac_ver >= 0x5390)
3882 RAL_WRITE(sc, RT2860_TX_SW_CFG0, 0x00000404);
3883 else if (sc->mac_ver >= 0x3071) {
3885 RAL_WRITE(sc, RT2860_TX_SW_CFG0,
3889 if (!(RAL_READ(sc, RT2860_PCI_CFG) & RT2860_PCI_CFG_PCI)) {
3890 sc->sc_flags |= RT2860_PCIE;
3892 tmp = RAL_READ(sc, RT2860_US_CYC_CNT);
3894 RAL_WRITE(sc, RT2860_US_CYC_CNT, tmp);
3899 if (!(RAL_READ(sc, RT2860_MAC_STATUS_REG) &
3905 device_printf(sc->sc_dev, "timeout waiting for MAC\n");
3906 rt2860_stop_locked(sc);
3911 RAL_WRITE(sc, RT2860_H2M_BBPAGENT, 0);
3912 RAL_WRITE(sc, RT2860_H2M_MAILBOX, 0);
3914 rt2860_mcu_cmd(sc, RT2860_MCU_CMD_RFRESET, 0, 0);
3917 if ((error = rt2860_bbp_init(sc)) != 0) {
3918 rt2860_stop_locked(sc);
3923 RAL_SET_REGION_4(sc, RT2860_WCID_ENTRY(0), 0, 512);
3925 RAL_SET_REGION_4(sc, RT2860_PKEY(0), 0, 2048);
3927 RAL_SET_REGION_4(sc, RT2860_IVEIV(0), 0, 512);
3929 RAL_SET_REGION_4(sc, RT2860_WCID_ATTR(0), 0, 256);
3931 RAL_SET_REGION_4(sc, RT2860_SKEY(0, 0), 0, 8 * 32);
3933 RAL_SET_REGION_4(sc, RT2860_SKEY_MODE_0_7, 0, 4);
3937 RAL_WRITE(sc, RT2860_TX_BASE_PTR(qid), sc->txq[qid].paddr);
3938 RAL_WRITE(sc, RT2860_TX_MAX_CNT(qid), RT2860_TX_RING_COUNT);
3939 RAL_WRITE(sc, RT2860_TX_CTX_IDX(qid), 0);
3943 RAL_WRITE(sc, RT2860_RX_BASE_PTR, sc->rxq.paddr);
3944 RAL_WRITE(sc, RT2860_RX_MAX_CNT, RT2860_RX_RING_COUNT);
3945 RAL_WRITE(sc, RT2860_RX_CALC_IDX, RT2860_RX_RING_COUNT - 1);
3948 RAL_WRITE(sc, RT2860_MAX_LEN_CFG, 1 << 12 |
3952 tmp = RAL_READ(sc, RT2860_WPDMA_GLO_CFG);
3958 device_printf(sc->sc_dev, "timeout waiting for DMA engine\n");
3959 rt2860_stop_locked(sc);
3965 RAL_WRITE(sc, RT2860_WPDMA_GLO_CFG, tmp);
3968 RAL_WRITE(sc, RT2860_DELAY_INT_CFG, 0);
3972 if (sc->bbp[i].reg == 0 || sc->bbp[i].reg == 0xff)
3974 rt2860_mcu_bbp_write(sc, sc->bbp[i].reg, sc->bbp[i].val);
3978 if (sc->rf_rev == RT3070_RF_2020 ||
3979 sc->rf_rev == RT3070_RF_3020 ||
3980 sc->rf_rev == RT3070_RF_3320 ||
3981 sc->mac_ver == 0x5390)
3982 rt3090_set_rx_antenna(sc, 0);
3985 rt2860_mcu_cmd(sc, RT2860_MCU_CMD_LED1, sc->led[0], 0);
3986 rt2860_mcu_cmd(sc, RT2860_MCU_CMD_LED2, sc->led[1], 0);
3987 rt2860_mcu_cmd(sc, RT2860_MCU_CMD_LED3, sc->led[2], 0);
3989 if (sc->mac_ver >= 0x5390)
3990 rt5390_rf_init(sc);
3991 else if (sc->mac_ver >= 0x3071) {
3992 if ((error = rt3090_rf_init(sc)) != 0) {
3993 rt2860_stop_locked(sc);
3998 rt2860_mcu_cmd(sc, RT2860_MCU_CMD_SLEEP, 0x02ff, 1);
3999 rt2860_mcu_cmd(sc, RT2860_MCU_CMD_WAKEUP, 0, 1);
4001 if (sc->mac_ver >= 0x5390)
4002 rt5390_rf_wakeup(sc);
4003 else if (sc->mac_ver >= 0x3071)
4004 rt3090_rf_wakeup(sc);
4007 bbp3 = rt2860_mcu_bbp_read(sc, 3);
4009 if (sc->nrxchains == 2)
4011 else if (sc->nrxchains == 3)
4013 rt2860_mcu_bbp_write(sc, 3, bbp3);
4016 bbp1 = rt2860_mcu_bbp_read(sc, 1);
4017 if (sc->ntxchains == 1)
4019 else if (sc->mac_ver == 0x3593 && sc->ntxchains == 2)
4021 else if (sc->mac_ver == 0x3593 && sc->ntxchains == 3)
4023 rt2860_mcu_bbp_write(sc, 1, bbp1);
4025 if (sc->mac_ver >= 0x3071)
4026 rt3090_rf_setup(sc);
4029 rt2860_switch_chan(sc, ic->ic_curchan);
4032 rt2860_mcu_cmd(sc, RT2860_MCU_CMD_RFRESET, 0, 0);
4035 tmp = RAL_READ(sc, RT2860_TX_RTS_CFG);
4038 RAL_WRITE(sc, RT2860_TX_RTS_CFG, tmp);
4041 rt2860_updateprot(sc);
4044 rt2860_set_leds(sc, RT2860_LED_RADIO);
4047 if ((error = rt2860_txrx_enable(sc)) != 0) {
4048 rt2860_stop_locked(sc);
4053 RAL_WRITE(sc, RT2860_INT_STATUS, 0xffffffff);
4055 RAL_WRITE(sc, RT2860_INT_MASK, 0x3fffc);
4057 if (sc->sc_flags & RT2860_ADVANCED_PS)
4058 rt2860_mcu_cmd(sc, RT2860_MCU_CMD_PSLEVEL, sc->pslevel, 0);
4060 sc->sc_flags |= RT2860_RUNNING;
4062 callout_reset(&sc->watchdog_ch, hz, rt2860_watchdog, sc);
4068 struct rt2860_softc *sc = arg;
4070 RAL_LOCK(sc);
4071 rt2860_stop_locked(sc);
4072 RAL_UNLOCK(sc);
4076 rt2860_stop_locked(struct rt2860_softc *sc)
4081 if (sc->sc_flags & RT2860_RUNNING)
4082 rt2860_set_leds(sc, 0); /* turn all LEDs off */
4084 callout_stop(&sc->watchdog_ch);
4085 sc->sc_tx_timer = 0;
4086 sc->sc_flags &= ~RT2860_RUNNING;
4089 RAL_WRITE(sc, RT2860_INT_MASK, 0);
4092 rt2860_set_gp_timer(sc, 0);
4095 tmp = RAL_READ(sc, RT2860_MAC_SYS_CTRL);
4097 RAL_WRITE(sc, RT2860_MAC_SYS_CTRL, tmp);
4100 RAL_WRITE(sc, RT2860_MAC_SYS_CTRL, RT2860_BBP_HRST | RT2860_MAC_SRST);
4101 RAL_BARRIER_WRITE(sc);
4102 RAL_WRITE(sc, RT2860_MAC_SYS_CTRL, 0);
4105 sc->qfullmsk = 0;
4107 rt2860_reset_tx_ring(sc, &sc->txq[qid]);
4108 rt2860_reset_rx_ring(sc, &sc->rxq);
4112 rt2860_load_microcode(struct rt2860_softc *sc)
4117 RAL_LOCK_ASSERT(sc);
4119 RAL_UNLOCK(sc);
4121 RAL_LOCK(sc);
4123 device_printf(sc->sc_dev,
4129 RAL_WRITE(sc, RT2860_SYS_CTRL, RT2860_HST_PM_SEL);
4131 RAL_WRITE_REGION_1(sc, RT2860_FW_BASE, fp->data, fp->datasize);
4133 RAL_WRITE(sc, RT2860_SYS_CTRL, 0);
4134 RAL_BARRIER_WRITE(sc);
4135 RAL_WRITE(sc, RT2860_SYS_CTRL, RT2860_MCU_RESET);
4137 RAL_WRITE(sc, RT2860_H2M_BBPAGENT, 0);
4138 RAL_WRITE(sc, RT2860_H2M_MAILBOX, 0);
4141 RAL_BARRIER_READ_WRITE(sc);
4143 if (RAL_READ(sc, RT2860_SYS_CTRL) & RT2860_MCU_READY)
4148 device_printf(sc->sc_dev,
4164 rt2860_calib(struct rt2860_softc *sc)
4166 struct ieee80211com *ic = &sc->sc_ic;
4172 bbp49 = rt2860_mcu_bbp_read(sc, 49);
4175 tssi = &sc->tssi_2ghz[4];
4176 step = sc->step_2ghz;
4178 tssi = &sc->tssi_5ghz[4];
4179 step = sc->step_5ghz;
4198 if (sc->txpow20mhz[ridx] == 0xffffffff)
4200 RAL_WRITE(sc, RT2860_TX_PWR_CFG(ridx),
4201 b4inc(sc->txpow20mhz[ridx], d));
4207 rt3090_set_rx_antenna(struct rt2860_softc *sc, int aux)
4212 if (sc->mac_ver == 0x5390) {
4213 rt2860_mcu_bbp_write(sc, 152,
4214 rt2860_mcu_bbp_read(sc, 152) & ~0x80);
4216 tmp = RAL_READ(sc, RT2860_PCI_EECTRL);
4217 RAL_WRITE(sc, RT2860_PCI_EECTRL, tmp & ~RT2860_C);
4218 tmp = RAL_READ(sc, RT2860_GPIO_CTRL);
4219 RAL_WRITE(sc, RT2860_GPIO_CTRL, (tmp & ~0x0808) | 0x08);
4222 if (sc->mac_ver == 0x5390) {
4223 rt2860_mcu_bbp_write(sc, 152,
4224 rt2860_mcu_bbp_read(sc, 152) | 0x80);
4226 tmp = RAL_READ(sc, RT2860_PCI_EECTRL);
4227 RAL_WRITE(sc, RT2860_PCI_EECTRL, tmp | RT2860_C);
4228 tmp = RAL_READ(sc, RT2860_GPIO_CTRL);
4229 RAL_WRITE(sc, RT2860_GPIO_CTRL, tmp & ~0x0808);
4235 rt2860_switch_chan(struct rt2860_softc *sc, struct ieee80211_channel *c)
4237 struct ieee80211com *ic = &sc->sc_ic;
4244 if (sc->mac_ver >= 0x5390)
4245 rt5390_set_chan(sc, chan);
4246 else if (sc->mac_ver >= 0x3071)
4247 rt3090_set_chan(sc, chan);
4249 rt2860_set_chan(sc, chan);
4262 if (sc->mac_ver < 0x5390)
4263 rt2860_select_chan_group(sc, group);
4269 rt2860_setup_beacon(struct rt2860_softc *sc, struct ieee80211vap *vap)
4292 RAL_WRITE_REGION_1(sc, RT2860_BCN_BASE(0),
4294 RAL_WRITE_REGION_1(sc, RT2860_BCN_BASE(0) + sizeof txwi,
4303 rt2860_enable_tsf_sync(struct rt2860_softc *sc)
4305 struct ieee80211com *ic = &sc->sc_ic;
4309 tmp = RAL_READ(sc, RT2860_BCN_TIME_CFG);
4335 RAL_WRITE(sc, RT2860_BCN_TIME_CFG, tmp);