Lines Matching refs:x1
33 #define IGU_PF_CONF_FUNC_EN (0x1<<0) /* function enable */
34 #define IGU_PF_CONF_MSI_MSIX_EN (0x1<<1) /* MSI/MSIX enable */
35 #define IGU_PF_CONF_INT_LINE_EN (0x1<<2) /* INT enable */
36 #define IGU_PF_CONF_ATTN_BIT_EN (0x1<<3) /* attention enable */
37 #define IGU_PF_CONF_SINGLE_ISR_EN (0x1<<4) /* single ISR mode enable */
38 #define IGU_PF_CONF_SIMD_MODE (0x1<<5) /* simd all ones mode */
41 #define IGU_VF_CONF_FUNC_EN (0x1<<0) /* function enable */
42 #define IGU_VF_CONF_MSI_MSIX_EN (0x1<<1) /* MSI/MSIX enable */
43 #define IGU_VF_CONF_SINGLE_ISR_EN (0x1<<4) /* single ISR mode enable */
65 #define IGU_CTRL_REG_RESERVED_MASK 0x1
67 #define IGU_CTRL_REG_TYPE_MASK 0x1 /* use enum igu_ctrl_cmd */