qat/qat_common/qat_hal.c

439 		    unsigned int csr_val)
449 		qat_hal_wr_ae_csr(handle, ae, ae_csr, csr_val);
460 		    unsigned int *csr_val)
466 	qat_hal_rd_ae_csr(handle, ae, ae_csr, csr_val);
594 	unsigned int csr_val;
601 	csr_val = ADF_CSR_RD(handle->hal_misc_addr_v, csr_addr);
602 	if ((csr_val & ESRAM_AUTO_TINIT) && (csr_val & ESRAM_AUTO_TINIT_DONE))
604 	csr_val = ADF_CSR_RD(handle->hal_misc_addr_v, csr_addr);
605 	csr_val |= ESRAM_AUTO_TINIT;
607 	ADF_CSR_WR(handle->hal_misc_addr_v, csr_addr, csr_val);
610 		csr_val = ADF_CSR_RD(handle->hal_misc_addr_v, csr_addr);
612 	} while (!(csr_val & ESRAM_AUTO_TINIT_DONE) && times--);
897 	unsigned int csr_val = 0;
905 		qat_hal_rd_ae_csr(handle, ae, AE_MISC_CONTROL, &csr_val);
906 		scs_flag = csr_val & (1 << MMC_SHARE_CS_BITPOS);
907 		csr_val &= ~(1 << MMC_SHARE_CS_BITPOS);
908 		qat_hal_wr_ae_csr(handle, ae, AE_MISC_CONTROL, csr_val);
909 		qat_hal_rd_ae_csr(handle, ae, CTX_ENABLES, &csr_val);
910 		csr_val &= IGNORE_W1C_MASK;
912 			csr_val |= CE_NN_MODE;
914 		qat_hal_wr_ae_csr(handle, ae, CTX_ENABLES, csr_val);
957 		qat_hal_rd_ae_csr(handle, ae, AE_MISC_CONTROL, &csr_val);
959 			csr_val |= (1 << MMC_SHARE_CS_BITPOS);
960 		qat_hal_wr_ae_csr(handle, ae, AE_MISC_CONTROL, csr_val);
1114 		unsigned int csr_val = 0;
1116 		qat_hal_rd_ae_csr(handle, ae, SIGNATURE_ENABLE, &csr_val);
1117 		csr_val |= 0x1;
1118 		qat_hal_wr_ae_csr(handle, ae, SIGNATURE_ENABLE, csr_val);
1294 	unsigned int csr_val = 0, newcsr_val;
1333 	qat_hal_rd_ae_csr(handle, ae, AE_MISC_CONTROL, &csr_val);
1334 	scs_flag = csr_val & (1 << MMC_SHARE_CS_BITPOS);
1335 	newcsr_val = CLR_BIT(csr_val, MMC_SHARE_CS_BITPOS);
1382 	qat_hal_rd_ae_csr(handle, ae, AE_MISC_CONTROL, &csr_val);
1383 	newcsr_val = scs_flag ? SET_BIT(csr_val, MMC_SHARE_CS_BITPOS) :
1384 				CLR_BIT(csr_val, MMC_SHARE_CS_BITPOS);
1449 	unsigned int csr_val = 0, newcsr_val = 0;
1465 	qat_hal_rd_ae_csr(handle, ae, AE_MISC_CONTROL, &csr_val);
1466 	scs_flag = csr_val & (1 << MMC_SHARE_CS_BITPOS);
1467 	newcsr_val = CLR_BIT(csr_val, MMC_SHARE_CS_BITPOS);
1505 	qat_hal_rd_ae_csr(handle, ae, AE_MISC_CONTROL, &csr_val);
1506 	newcsr_val = scs_flag ? SET_BIT(csr_val, MMC_SHARE_CS_BITPOS) :
1507 				CLR_BIT(csr_val, MMC_SHARE_CS_BITPOS);