Lines Matching refs:priv
73 mlx5e_ethtool_sync_tx_completion_fact(struct mlx5e_priv *priv)
84 uint64_t max = priv->params_ethtool.tx_queue_size /
96 priv->params_ethtool.tx_completion_fact_max = max;
102 if (priv->params_ethtool.tx_completion_fact < 1)
103 priv->params_ethtool.tx_completion_fact = 1;
104 else if (priv->params_ethtool.tx_completion_fact > max)
105 priv->params_ethtool.tx_completion_fact = max;
109 mlx5e_getmaxrate(struct mlx5e_priv *priv)
111 struct mlx5_core_dev *mdev = priv->mdev;
117 PRIV_LOCK(priv);
125 priv->params_ethtool.max_bw_value[i] = max_bw_value[i] * MLX5E_100MB;
128 priv->params_ethtool.max_bw_value[i] = max_bw_value[i] * MLX5E_1GB;
131 priv->params_ethtool.max_bw_value[i] = 0;
134 priv->params_ethtool.max_bw_value[i] = -1;
140 PRIV_UNLOCK(priv);
145 mlx5e_get_max_alloc(struct mlx5e_priv *priv)
147 struct mlx5_core_dev *mdev = priv->mdev;
151 PRIV_LOCK(priv);
152 err = -mlx5_query_port_tc_bw_alloc(mdev, priv->params_ethtool.max_bw_share);
156 priv->params_ethtool.max_bw_share[x] =
160 priv->params_ethtool.max_bw_share);
162 PRIV_UNLOCK(priv);
168 mlx5e_get_dscp(struct mlx5e_priv *priv)
170 struct mlx5_core_dev *mdev = priv->mdev;
178 PRIV_LOCK(priv);
179 err = -mlx5_query_dscp2prio(mdev, priv->params_ethtool.dscp2prio);
183 err = -mlx5_query_trust_state(mdev, &priv->params_ethtool.trust_state);
187 PRIV_UNLOCK(priv);
192 mlx5e_tc_get_parameters(struct mlx5e_priv *priv,
203 for (i = 0; i <= mlx5_max_tc(priv->mdev); i++) {
205 new_bw_value[i] : priv->params_ethtool.max_bw_value[i];
224 struct mlx5e_priv *priv = arg1;
225 struct mlx5_core_dev *mdev = priv->mdev;
233 PRIV_LOCK(priv);
234 err = SYSCTL_OUT(req, priv->params_ethtool.max_bw_value,
235 sizeof(priv->params_ethtool.max_bw_value[0]) * max_rates);
251 mlx5e_tc_get_parameters(priv, new_bw_value, max_bw_value, max_bw_unit);
257 memcpy(priv->params_ethtool.max_bw_value, new_bw_value,
258 sizeof(priv->params_ethtool.max_bw_value));
260 PRIV_UNLOCK(priv);
267 struct mlx5e_priv *priv = arg1;
268 struct mlx5_core_dev *mdev = priv->mdev;
275 PRIV_LOCK(priv);
276 err = SYSCTL_OUT(req, priv->params_ethtool.max_bw_share, max_rates);
302 memcpy(priv->params_ethtool.max_bw_share, max_bw_share,
303 sizeof(priv->params_ethtool.max_bw_share));
305 PRIV_UNLOCK(priv);
310 mlx5e_get_prio_tc(struct mlx5e_priv *priv)
312 struct mlx5_core_dev *mdev = priv->mdev;
316 PRIV_LOCK(priv);
317 if (!MLX5_CAP_GEN(priv->mdev, ets)) {
318 PRIV_UNLOCK(priv);
323 err = -mlx5_query_port_prio_tc(mdev, i, priv->params_ethtool.prio_tc + i);
327 PRIV_UNLOCK(priv);
334 struct mlx5e_priv *priv = arg1;
335 struct mlx5_core_dev *mdev = priv->mdev;
340 PRIV_LOCK(priv);
341 err = SYSCTL_OUT(req, priv->params_ethtool.prio_tc, MLX5E_MAX_PRIORITY);
356 if (temp[i] == priv->params_ethtool.prio_tc[i])
362 priv->params_ethtool.prio_tc[i] = temp[i];
365 PRIV_UNLOCK(priv);
370 mlx5e_fec_update(struct mlx5e_priv *priv)
372 struct mlx5_core_dev *mdev = priv->mdev;
390 priv->params_ethtool.fec_mask_10x_25x[0] =
392 priv->params_ethtool.fec_mask_10x_25x[1] =
395 priv->params_ethtool.fec_mask_10x_25x[2] =
397 priv->params_ethtool.fec_mask_10x_25x[3] =
401 priv->params_ethtool.fec_avail_10x_25x[0] =
403 priv->params_ethtool.fec_avail_10x_25x[1] =
406 priv->params_ethtool.fec_avail_10x_25x[2] =
408 priv->params_ethtool.fec_avail_10x_25x[3] =
412 priv->params_ethtool.fec_mask_50x[0] =
414 priv->params_ethtool.fec_mask_50x[1] =
416 priv->params_ethtool.fec_mask_50x[2] =
418 priv->params_ethtool.fec_mask_50x[3] =
422 priv->params_ethtool.fec_avail_50x[0] =
424 priv->params_ethtool.fec_avail_50x[1] =
426 priv->params_ethtool.fec_avail_50x[2] =
428 priv->params_ethtool.fec_avail_50x[3] =
432 priv->params_ethtool.fec_mode_active =
441 struct mlx5e_priv *priv = arg1;
442 struct mlx5_core_dev *mdev = priv->mdev;
451 PRIV_LOCK(priv);
452 err = SYSCTL_OUT(req, priv->params_ethtool.fec_mask_10x_25x,
453 sizeof(priv->params_ethtool.fec_mask_10x_25x));
487 ~priv->params_ethtool.fec_avail_10x_25x[x]) {
492 priv->params_ethtool.fec_mask_10x_25x[x]);
511 MLX5_SET(pplm_reg, in, fec_override_admin_50g_1x, priv->params_ethtool.fec_mask_50x[0]);
512 MLX5_SET(pplm_reg, in, fec_override_admin_100g_2x, priv->params_ethtool.fec_mask_50x[1]);
513 MLX5_SET(pplm_reg, in, fec_override_admin_200g_4x, priv->params_ethtool.fec_mask_50x[2]);
514 MLX5_SET(pplm_reg, in, fec_override_admin_400g_8x, priv->params_ethtool.fec_mask_50x[3]);
521 memcpy(priv->params_ethtool.fec_mask_10x_25x, fec_mask_10x_25x,
522 sizeof(priv->params_ethtool.fec_mask_10x_25x));
524 mlx5_toggle_port_link(priv->mdev);
526 PRIV_UNLOCK(priv);
533 struct mlx5e_priv *priv = arg1;
536 PRIV_LOCK(priv);
537 err = SYSCTL_OUT(req, priv->params_ethtool.fec_avail_10x_25x,
538 sizeof(priv->params_ethtool.fec_avail_10x_25x));
539 PRIV_UNLOCK(priv);
546 struct mlx5e_priv *priv = arg1;
547 struct mlx5_core_dev *mdev = priv->mdev;
556 PRIV_LOCK(priv);
557 err = SYSCTL_OUT(req, priv->params_ethtool.fec_mask_50x,
558 sizeof(priv->params_ethtool.fec_mask_50x));
592 ~priv->params_ethtool.fec_avail_50x[x]) {
597 priv->params_ethtool.fec_mask_50x[x]);
615 MLX5_SET(pplm_reg, in, fec_override_admin_10g_40g, priv->params_ethtool.fec_mask_10x_25x[0]);
616 MLX5_SET(pplm_reg, in, fec_override_admin_25g, priv->params_ethtool.fec_mask_10x_25x[1]);
617 MLX5_SET(pplm_reg, in, fec_override_admin_50g, priv->params_ethtool.fec_mask_10x_25x[1]);
618 MLX5_SET(pplm_reg, in, fec_override_admin_56g, priv->params_ethtool.fec_mask_10x_25x[2]);
619 MLX5_SET(pplm_reg, in, fec_override_admin_100g, priv->params_ethtool.fec_mask_10x_25x[3]);
626 memcpy(priv->params_ethtool.fec_mask_50x, fec_mask_50x,
627 sizeof(priv->params_ethtool.fec_mask_50x));
629 mlx5_toggle_port_link(priv->mdev);
631 PRIV_UNLOCK(priv);
638 struct mlx5e_priv *priv = arg1;
641 PRIV_LOCK(priv);
642 err = SYSCTL_OUT(req, priv->params_ethtool.fec_avail_50x,
643 sizeof(priv->params_ethtool.fec_avail_50x));
644 PRIV_UNLOCK(priv);
651 struct mlx5e_priv *priv = arg1;
652 struct mlx5_core_dev *mdev = priv->mdev;
656 PRIV_LOCK(priv);
657 result = priv->params_ethtool.trust_state;
660 result == priv->params_ethtool.trust_state)
682 priv->params_ethtool.trust_state = result;
685 mlx5e_refresh_sq_inline(priv);
687 mlx5e_rl_refresh_sq_inline(&priv->rl);
690 PRIV_UNLOCK(priv);
697 struct mlx5e_priv *priv = arg1;
699 struct mlx5_core_dev *mdev = priv->mdev;
704 PRIV_LOCK(priv);
705 err = SYSCTL_OUT(req, priv->params_ethtool.dscp2prio + prio_index,
706 sizeof(priv->params_ethtool.dscp2prio) / 8);
710 memcpy(dscp2prio, priv->params_ethtool.dscp2prio, sizeof(dscp2prio));
725 memcpy(priv->params_ethtool.dscp2prio, dscp2prio,
726 sizeof(priv->params_ethtool.dscp2prio));
728 PRIV_UNLOCK(priv);
733 mlx5e_update_buf_lossy(struct mlx5e_priv *priv)
737 PRIV_ASSERT_LOCKED(priv);
739 pfc.pfc_en = priv->params.rx_priority_flow_control;
740 return (-mlx5e_port_manual_buffer_config(priv, MLX5E_PORT_BUFFER_PFC,
741 priv->params_ethtool.hw_mtu, &pfc, NULL, NULL));
747 struct mlx5e_priv *priv;
752 priv = arg1;
753 PRIV_LOCK(priv);
754 error = -mlx5e_port_query_buffer(priv, &port_buffer);
765 error = -mlx5e_port_manual_buffer_config(priv, MLX5E_PORT_BUFFER_SIZE,
766 priv->params_ethtool.hw_mtu, NULL, buf_size, NULL);
768 PRIV_UNLOCK(priv);
775 struct mlx5e_priv *priv;
780 priv = arg1;
781 mdev = priv->mdev;
782 PRIV_LOCK(priv);
792 error = -mlx5e_port_manual_buffer_config(priv,
794 priv->params_ethtool.hw_mtu, NULL, NULL, buffer);
796 error = mlx5e_update_buf_lossy(priv);
798 PRIV_UNLOCK(priv);
805 struct mlx5e_priv *priv;
809 priv = arg1;
810 PRIV_LOCK(priv);
811 cable_len = priv->dcbx.cable_len;
814 cable_len != priv->dcbx.cable_len) {
815 error = -mlx5e_port_manual_buffer_config(priv,
816 MLX5E_PORT_BUFFER_CABLE_LEN, priv->params_ethtool.hw_mtu,
819 priv->dcbx.cable_len = cable_len;
821 PRIV_UNLOCK(priv);
828 struct mlx5e_priv *priv = arg1;
831 PRIV_LOCK(priv);
832 err = SYSCTL_OUT(req, priv->params_ethtool.hw_val_temp,
833 sizeof(priv->params_ethtool.hw_val_temp[0]) *
834 priv->params_ethtool.hw_num_temp);
837 PRIV_UNLOCK(priv);
842 mlx5e_hw_temperature_update(struct mlx5e_priv *priv)
847 if (priv->params_ethtool.hw_num_temp == 0) {
852 err = -mlx5_core_access_reg(priv->mdev, NULL, 0, out_cap, sz_cap,
862 priv->params_ethtool.hw_num_temp = value;
865 for (x = 0; x != priv->params_ethtool.hw_num_temp; x++) {
871 err = -mlx5_core_access_reg(priv->mdev, out_sensor, sz_sensor,
877 priv->params_ethtool.hw_val_temp[x] =
890 struct mlx5e_priv *priv = arg1;
896 PRIV_LOCK(priv);
897 value = priv->params_ethtool.arg[arg2];
901 value == priv->params_ethtool.arg[arg2])
905 priv->params_ethtool.arg[arg2] = value;
910 if (priv->gone) {
914 was_opened = test_bit(MLX5E_STATE_OPENED, &priv->state);
915 mode_modify = MLX5_CAP_GEN(priv->mdev, cq_period_mode_modify);
920 if (priv->params_ethtool.rx_coalesce_usecs < 1)
921 priv->params_ethtool.rx_coalesce_usecs = 0;
922 else if (priv->params_ethtool.rx_coalesce_usecs >
924 priv->params_ethtool.rx_coalesce_usecs =
927 priv->params.rx_cq_moderation_usec =
928 priv->params_ethtool.rx_coalesce_usecs;
932 error = mlx5e_refresh_channel_params(priv);
937 if (priv->params_ethtool.rx_coalesce_pkts < 1)
938 priv->params_ethtool.rx_coalesce_pkts = 0;
939 else if (priv->params_ethtool.rx_coalesce_pkts >
941 priv->params_ethtool.rx_coalesce_pkts =
944 priv->params.rx_cq_moderation_pkts =
945 priv->params_ethtool.rx_coalesce_pkts;
949 error = mlx5e_refresh_channel_params(priv);
954 if (priv->params_ethtool.tx_coalesce_usecs < 1)
955 priv->params_ethtool.tx_coalesce_usecs = 0;
956 else if (priv->params_ethtool.tx_coalesce_usecs >
958 priv->params_ethtool.tx_coalesce_usecs =
961 priv->params.tx_cq_moderation_usec =
962 priv->params_ethtool.tx_coalesce_usecs;
966 error = mlx5e_refresh_channel_params(priv);
971 if (priv->params_ethtool.tx_coalesce_pkts < 1)
972 priv->params_ethtool.tx_coalesce_pkts = 0;
973 else if (priv->params_ethtool.tx_coalesce_pkts >
975 priv->params_ethtool.tx_coalesce_pkts =
978 priv->params.tx_cq_moderation_pkts =
979 priv->params_ethtool.tx_coalesce_pkts;
983 error = mlx5e_refresh_channel_params(priv);
989 mlx5e_close_locked(priv->ifp);
992 if (priv->params_ethtool.tx_queue_size <
994 priv->params_ethtool.tx_queue_size =
996 } else if (priv->params_ethtool.tx_queue_size >
997 priv->params_ethtool.tx_queue_size_max) {
998 priv->params_ethtool.tx_queue_size =
999 priv->params_ethtool.tx_queue_size_max;
1002 priv->params.log_sq_size =
1003 order_base_2(priv->params_ethtool.tx_queue_size);
1004 priv->params_ethtool.tx_queue_size =
1005 1 << priv->params.log_sq_size;
1008 mlx5e_ethtool_sync_tx_completion_fact(priv);
1012 mlx5e_open_locked(priv->ifp);
1018 mlx5e_close_locked(priv->ifp);
1021 if (priv->params_ethtool.rx_queue_size <
1023 priv->params_ethtool.rx_queue_size =
1025 } else if (priv->params_ethtool.rx_queue_size >
1026 priv->params_ethtool.rx_queue_size_max) {
1027 priv->params_ethtool.rx_queue_size =
1028 priv->params_ethtool.rx_queue_size_max;
1031 priv->params.log_rq_size =
1032 order_base_2(priv->params_ethtool.rx_queue_size);
1033 priv->params_ethtool.rx_queue_size =
1034 1 << priv->params.log_rq_size;
1038 mlx5e_open_locked(priv->ifp);
1044 mlx5e_close_locked(priv->ifp);
1047 if (priv->params_ethtool.channels_rsss < 1)
1048 priv->params_ethtool.channels_rsss = 1;
1049 else if (priv->params_ethtool.channels_rsss > 128)
1050 priv->params_ethtool.channels_rsss = 128;
1052 priv->params.channels_rsss = priv->params_ethtool.channels_rsss;
1056 mlx5e_open_locked(priv->ifp);
1062 mlx5e_close_locked(priv->ifp);
1065 if (priv->params_ethtool.channels < 1)
1066 priv->params_ethtool.channels = 1;
1067 else if (priv->params_ethtool.channels >
1068 (u64) priv->mdev->priv.eq_table.num_comp_vectors) {
1069 priv->params_ethtool.channels =
1070 (u64) priv->mdev->priv.eq_table.num_comp_vectors;
1072 priv->params.num_channels = priv->params_ethtool.channels;
1076 mlx5e_open_locked(priv->ifp);
1082 mlx5e_close_locked(priv->ifp);
1085 if (priv->params_ethtool.rx_coalesce_mode > 3)
1086 priv->params_ethtool.rx_coalesce_mode = 3;
1087 priv->params.rx_cq_moderation_mode =
1088 priv->params_ethtool.rx_coalesce_mode;
1093 mlx5e_open_locked(priv->ifp);
1095 error = mlx5e_refresh_channel_params(priv);
1102 mlx5e_close_locked(priv->ifp);
1105 if (priv->params_ethtool.tx_coalesce_mode != 0)
1106 priv->params_ethtool.tx_coalesce_mode = 1;
1107 priv->params.tx_cq_moderation_mode =
1108 priv->params_ethtool.tx_coalesce_mode;
1113 mlx5e_open_locked(priv->ifp);
1115 error = mlx5e_refresh_channel_params(priv);
1122 mlx5e_close_locked(priv->ifp);
1125 if (priv->params_ethtool.hw_lro != 0 &&
1126 MLX5_CAP_ETH(priv->mdev, lro_cap)) {
1127 priv->params_ethtool.hw_lro = 1;
1129 if (if_getcapenable(priv->ifp) & IFCAP_LRO) {
1130 priv->params.hw_lro_en = true;
1132 priv->params.hw_lro_en = false;
1134 mlx5_en_warn(priv->ifp, "To enable HW LRO "
1139 if (priv->params_ethtool.hw_lro != 0)
1141 priv->params.hw_lro_en = false;
1142 priv->params_ethtool.hw_lro = 0;
1146 mlx5e_open_locked(priv->ifp);
1152 mlx5e_close_locked(priv->ifp);
1155 if (priv->params_ethtool.cqe_zipping &&
1156 MLX5_CAP_GEN(priv->mdev, cqe_compression)) {
1157 priv->params.cqe_zipping_en = true;
1158 priv->params_ethtool.cqe_zipping = 1;
1160 priv->params.cqe_zipping_en = false;
1161 priv->params_ethtool.cqe_zipping = 0;
1165 mlx5e_open_locked(priv->ifp);
1171 mlx5e_close_locked(priv->ifp);
1174 mlx5e_ethtool_sync_tx_completion_fact(priv);
1178 mlx5e_open_locked(priv->ifp);
1184 priv->params_ethtool.modify_tx_dma =
1185 priv->params_ethtool.modify_tx_dma ? 1 : 0;
1187 mlx5e_modify_tx_dma(priv, value != 0);
1190 priv->params_ethtool.modify_tx_dma = 0;
1197 priv->params_ethtool.modify_rx_dma =
1198 priv->params_ethtool.modify_rx_dma ? 1 : 0;
1200 mlx5e_modify_rx_dma(priv, value != 0);
1203 priv->params_ethtool.modify_rx_dma = 0;
1208 priv->params_ethtool.diag_pci_enable =
1209 priv->params_ethtool.diag_pci_enable ? 1 : 0;
1211 error = -mlx5_core_set_diagnostics_full(priv->mdev,
1212 priv->params_ethtool.diag_pci_enable,
1213 priv->params_ethtool.diag_general_enable);
1217 priv->params_ethtool.diag_general_enable =
1218 priv->params_ethtool.diag_general_enable ? 1 : 0;
1220 error = -mlx5_core_set_diagnostics_full(priv->mdev,
1221 priv->params_ethtool.diag_pci_enable,
1222 priv->params_ethtool.diag_general_enable);
1227 if (MLX5_CAP_GEN(priv->mdev, port_type) != MLX5_CAP_PORT_TYPE_ETH) {
1232 priv->params_ethtool.mc_local_lb =
1233 priv->params_ethtool.mc_local_lb ? 1 : 0;
1235 if (MLX5_CAP_GEN(priv->mdev, disable_local_lb_mc)) {
1236 error = mlx5_nic_vport_modify_local_lb(priv->mdev,
1237 MLX5_LOCAL_MC_LB, priv->params_ethtool.mc_local_lb);
1245 if (MLX5_CAP_GEN(priv->mdev, port_type) != MLX5_CAP_PORT_TYPE_ETH) {
1250 priv->params_ethtool.uc_local_lb =
1251 priv->params_ethtool.uc_local_lb ? 1 : 0;
1253 if (MLX5_CAP_GEN(priv->mdev, disable_local_lb_uc)) {
1254 error = mlx5_nic_vport_modify_local_lb(priv->mdev,
1255 MLX5_LOCAL_UC_LB, priv->params_ethtool.uc_local_lb);
1265 mlx5e_close_locked(priv->ifp);
1266 mlx5e_open_locked(priv->ifp);
1274 PRIV_UNLOCK(priv);
1289 struct mlx5e_priv *priv;
1297 priv = arg1;
1305 PRIV_LOCK(priv);
1306 opened = test_bit(MLX5E_STATE_OPENED, &priv->state);
1309 priv->mdev->priv.msix_arr[MLX5_EQ_VEC_PAGES].vector);
1311 priv->mdev->priv.msix_arr[MLX5_EQ_VEC_CMD].vector);
1313 priv->mdev->priv.msix_arr[MLX5_EQ_VEC_ASYNC].vector);
1315 for (i = 0; i != priv->params.num_channels; i++) {
1319 if (mlx5_vector2eqn(priv->mdev, i, &eqn_not_used, &irqn) != 0)
1322 c = opened ? &priv->channel[i] : NULL;
1327 priv->mdev->priv.msix_arr[irqn].vector);
1329 for (tc = 0; tc != priv->num_tc; tc++) {
1335 priv->mdev->priv.msix_arr[irqn].vector);
1338 PRIV_UNLOCK(priv);
1347 struct mlx5e_priv *priv = arg1;
1351 PRIV_LOCK(priv);
1352 if (priv->gone != 0) {
1356 sys_debug = priv->sysctl_debug;
1361 if (sys_debug == priv->sysctl_debug)
1364 if ((priv->sysctl_debug = sys_debug)) {
1365 mlx5e_create_stats(&priv->stats.port_stats_debug.ctx,
1366 SYSCTL_CHILDREN(priv->sysctl_ifnet), "debug_stats",
1368 priv->stats.port_stats_debug.arg);
1369 SYSCTL_ADD_PROC(&priv->stats.port_stats_debug.ctx,
1370 SYSCTL_CHILDREN(priv->sysctl_ifnet), OID_AUTO,
1372 CTLFLAG_RD | CTLFLAG_MPSAFE | CTLTYPE_STRING, priv, 0,
1375 sysctl_ctx_free(&priv->stats.port_stats_debug.ctx);
1378 PRIV_UNLOCK(priv);
1383 mlx5e_create_diagnostics(struct mlx5e_priv *priv)
1391 ctx = &priv->sysctl_ctx;
1395 SYSCTL_CHILDREN(priv->sysctl_ifnet), OID_AUTO,
1403 if (mlx5_core_supports_diagnostics(priv->mdev, entry.counter_id) == 0)
1406 entry.desc, CTLFLAG_RD, priv->params_pci.array + x,
1413 if (mlx5_core_supports_diagnostics(priv->mdev, entry.counter_id) == 0)
1416 entry.desc, CTLFLAG_RD, priv->params_general.array + x,
1422 mlx5e_create_ethtool(struct mlx5e_priv *priv)
1433 priv->params_ethtool.irq_cpu_base = -1; /* disabled */
1434 priv->params_ethtool.irq_cpu_stride = 1;
1435 priv->params_ethtool.tx_queue_size_max = 1 << MLX5E_PARAMS_MAXIMUM_LOG_SQ_SIZE;
1436 priv->params_ethtool.rx_queue_size_max = 1 << MLX5E_PARAMS_MAXIMUM_LOG_RQ_SIZE;
1437 priv->params_ethtool.tx_queue_size = 1 << priv->params.log_sq_size;
1438 priv->params_ethtool.rx_queue_size = 1 << priv->params.log_rq_size;
1439 priv->params_ethtool.channels = priv->params.num_channels;
1440 priv->params_ethtool.channels_rsss = priv->params.channels_rsss;
1441 priv->params_ethtool.coalesce_pkts_max = MLX5E_FLD_MAX(cqc, cq_max_count);
1442 priv->params_ethtool.coalesce_usecs_max = MLX5E_FLD_MAX(cqc, cq_period);
1443 priv->params_ethtool.rx_coalesce_mode = priv->params.rx_cq_moderation_mode;
1444 priv->params_ethtool.rx_coalesce_usecs = priv->params.rx_cq_moderation_usec;
1445 priv->params_ethtool.rx_coalesce_pkts = priv->params.rx_cq_moderation_pkts;
1446 priv->params_ethtool.tx_coalesce_mode = priv->params.tx_cq_moderation_mode;
1447 priv->params_ethtool.tx_coalesce_usecs = priv->params.tx_cq_moderation_usec;
1448 priv->params_ethtool.tx_coalesce_pkts = priv->params.tx_cq_moderation_pkts;
1449 priv->params_ethtool.hw_lro = priv->params.hw_lro_en;
1450 priv->params_ethtool.cqe_zipping = priv->params.cqe_zipping_en;
1451 mlx5e_ethtool_sync_tx_completion_fact(priv);
1454 if (MLX5_CAP_GEN(priv->mdev, disable_local_lb_mc) ||
1455 MLX5_CAP_GEN(priv->mdev, disable_local_lb_uc)) {
1459 err = mlx5_nic_vport_query_local_lb(priv->mdev, MLX5_LOCAL_MC_LB, &val);
1461 priv->params_ethtool.mc_local_lb = val;
1463 err = mlx5_nic_vport_query_local_lb(priv->mdev, MLX5_LOCAL_UC_LB, &val);
1465 priv->params_ethtool.uc_local_lb = val;
1469 node = SYSCTL_ADD_NODE(&priv->sysctl_ctx,
1470 SYSCTL_CHILDREN(priv->sysctl_ifnet), OID_AUTO,
1478 SYSCTL_ADD_PROC(&priv->sysctl_ctx, SYSCTL_CHILDREN(node), OID_AUTO,
1480 CTLFLAG_MPSAFE, priv, x, &mlx5e_ethtool_handler, "QU",
1484 SYSCTL_ADD_PROC(&priv->sysctl_ctx, SYSCTL_CHILDREN(node), OID_AUTO,
1486 CTLFLAG_MPSAFE, priv, x, &mlx5e_ethtool_handler, "QU",
1495 SYSCTL_ADD_PROC(&priv->sysctl_ctx, SYSCTL_CHILDREN(node), OID_AUTO,
1497 CTLFLAG_MPSAFE, priv, x, &mlx5e_ethtool_handler, "QU",
1503 fec_node = SYSCTL_ADD_NODE(&priv->sysctl_ctx,
1510 if (mlx5e_fec_update(priv) == 0) {
1511 SYSCTL_ADD_U32(&priv->sysctl_ctx, SYSCTL_CHILDREN(fec_node), OID_AUTO,
1513 &priv->params_ethtool.fec_mode_active, 0,
1516 SYSCTL_ADD_PROC(&priv->sysctl_ctx, SYSCTL_CHILDREN(fec_node), OID_AUTO,
1518 priv, 0, &mlx5e_fec_mask_10x_25x_handler, "CU",
1525 SYSCTL_ADD_PROC(&priv->sysctl_ctx, SYSCTL_CHILDREN(fec_node), OID_AUTO,
1527 priv, 0, &mlx5e_fec_avail_10x_25x_handler, "CU",
1534 SYSCTL_ADD_PROC(&priv->sysctl_ctx, SYSCTL_CHILDREN(fec_node), OID_AUTO,
1536 priv, 0, &mlx5e_fec_mask_50x_handler, "SU",
1542 SYSCTL_ADD_PROC(&priv->sysctl_ctx, SYSCTL_CHILDREN(fec_node), OID_AUTO,
1544 priv, 0, &mlx5e_fec_avail_50x_handler, "SU",
1551 SYSCTL_ADD_PROC(&priv->sysctl_ctx, SYSCTL_CHILDREN(node), OID_AUTO,
1552 "debug_stats", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_MPSAFE, priv,
1555 pnameunit = device_get_nameunit(priv->mdev->pdev->dev.bsddev);
1557 SYSCTL_ADD_STRING(&priv->sysctl_ctx, SYSCTL_CHILDREN(node),
1563 mlx5e_create_diagnostics(priv);
1566 qos_node = SYSCTL_ADD_NODE(&priv->sysctl_ctx,
1574 if (mlx5e_getmaxrate(priv) == 0) {
1575 SYSCTL_ADD_PROC(&priv->sysctl_ctx, SYSCTL_CHILDREN(qos_node),
1577 priv, 0, mlx5e_tc_maxrate_handler, "QU",
1583 if (mlx5e_get_max_alloc(priv) == 0) {
1584 SYSCTL_ADD_PROC(&priv->sysctl_ctx, SYSCTL_CHILDREN(qos_node),
1586 priv, 0, mlx5e_tc_rate_share_handler, "QU",
1592 if (mlx5e_get_prio_tc(priv) == 0) {
1593 SYSCTL_ADD_PROC(&priv->sysctl_ctx, SYSCTL_CHILDREN(qos_node),
1595 priv, 0, mlx5e_prio_to_tc_handler, "CU",
1600 if (mlx5e_get_dscp(priv) == 0) {
1604 SYSCTL_ADD_PROC(&priv->sysctl_ctx, SYSCTL_CHILDREN(qos_node),
1606 priv, i, mlx5e_dscp_prio_handler, "CU",
1611 SYSCTL_ADD_PROC(&priv->sysctl_ctx, SYSCTL_CHILDREN(qos_node),
1613 priv, 0, mlx5e_trust_state_handler, "CU",
1614 MLX5_CAP_QCAM_FEATURE(priv->mdev, qpts_trust_both) ?
1620 if (mlx5e_port_query_buffer(priv, &port_buffer) == 0) {
1621 SYSCTL_ADD_PROC(&priv->sysctl_ctx, SYSCTL_CHILDREN(qos_node),
1624 priv, 0, mlx5e_buf_size_handler, "IU",
1626 SYSCTL_ADD_PROC(&priv->sysctl_ctx, SYSCTL_CHILDREN(qos_node),
1629 priv, 0, mlx5e_buf_prio_handler, "CU",
1631 SYSCTL_ADD_PROC(&priv->sysctl_ctx, SYSCTL_CHILDREN(qos_node),
1634 priv, 0, mlx5e_cable_length_handler, "IU",
1638 if (mlx5e_hw_temperature_update(priv) == 0) {
1639 SYSCTL_ADD_PROC(&priv->sysctl_ctx, SYSCTL_CHILDREN(priv->sysctl_ifnet),
1642 priv, 0, mlx5e_hw_temperature_handler, "I",