mlx4/mlx4_core/mlx4_eq.c

123 	struct mlx4_eqe *eqe = get_eqe(eq, eq->cons_index, eqe_factor, size);
124 	return !!(eqe->owner & 0x80) ^ !!(eq->cons_index & eq->nent) ? NULL : eqe;
129 	struct mlx4_eqe *eqe =
131 	return (!!(eqe->owner & 0x80) ^
133 		eqe : NULL;
146 	struct mlx4_eqe *eqe;
150 	for (eqe = next_slave_event_eqe(slave_eq); eqe;
151 	      eqe = next_slave_event_eqe(slave_eq)) {
152 		slave = eqe->slave_id;
154 		if (eqe->type == MLX4_EVENT_TYPE_PORT_CHANGE &&
155 		    eqe->subtype == MLX4_PORT_CHANGE_SUBTYPE_DOWN &&
169 				if (eqe->type == MLX4_EVENT_TYPE_PORT_MNG_CHG_EVENT &&
170 				    eqe->subtype == MLX4_DEV_PMC_SUBTYPE_PORT_INFO) {
171 					phys_port  = eqe->event.port_mgmt_change.port;
175 					eqe->event.port_mgmt_change.port = slave_port;
177 				if (mlx4_GEN_EQE(dev, i, eqe))
181 					eqe->event.port_mgmt_change.port = phys_port;
184 			if (mlx4_GEN_EQE(dev, slave, eqe))
194 static void slave_event(struct mlx4_dev *dev, u8 slave, struct mlx4_eqe *eqe)
211 	memcpy(s_eqe, eqe, sizeof(struct mlx4_eqe) - 1);
224 			     struct mlx4_eqe *eqe)
233 	slave_event(dev, slave, eqe);
250 	struct mlx4_eqe eqe;
258 	memset(&eqe, 0, sizeof eqe);
260 	eqe.type = MLX4_EVENT_TYPE_PORT_MNG_CHG_EVENT;
261 	eqe.subtype = MLX4_DEV_PMC_SUBTYPE_PKEY_TABLE;
262 	eqe.event.port_mgmt_change.port = mlx4_phys_to_slave_port(dev, slave, port);
264 	return mlx4_GEN_EQE(dev, slave, &eqe);
270 	struct mlx4_eqe eqe;
275 	memset(&eqe, 0, sizeof eqe);
277 	eqe.type = MLX4_EVENT_TYPE_PORT_MNG_CHG_EVENT;
278 	eqe.subtype = MLX4_DEV_PMC_SUBTYPE_GUID_INFO;
279 	eqe.event.port_mgmt_change.port = mlx4_phys_to_slave_port(dev, slave, port);
281 	return mlx4_GEN_EQE(dev, slave, &eqe);
288 	struct mlx4_eqe eqe;
294 	memset(&eqe, 0, sizeof eqe);
296 	eqe.type = MLX4_EVENT_TYPE_PORT_CHANGE;
297 	eqe.subtype = port_subtype_change;
298 	eqe.event.port_change.port = cpu_to_be32(slave_port << 28);
302 	return mlx4_GEN_EQE(dev, slave, &eqe);
429 	struct mlx4_eqe eqe;
431 	memset(&eqe, 0, sizeof eqe);
433 	eqe.type = MLX4_EVENT_TYPE_PORT_MNG_CHG_EVENT;
434 	eqe.subtype = MLX4_DEV_PMC_SUBTYPE_PORT_INFO;
435 	eqe.event.port_mgmt_change.port = port;
436 	eqe.event.port_mgmt_change.params.port_info.changed_attr =
439 	slave_event(dev, ALL_SLAVES, &eqe);
492 	struct mlx4_eqe *eqe;
506 	while ((eqe = next_eqe_sw(eq, dev->caps.eqe_factor, eqe_size))) {
513 		switch (eqe->type) {
515 			cqn = be32_to_cpu(eqe->event.comp.cqn) & 0xffffff;
527 			mlx4_dbg(dev, "event %d arrived\n", eqe->type);
532 						be32_to_cpu(eqe->event.qp.qpn)
536 						 eqe->type, eqe->subtype,
542 					mlx4_slave_event(dev, slave, eqe);
547 			mlx4_qp_event(dev, be32_to_cpu(eqe->event.qp.qpn) &
548 				      0xffffff, eqe->type);
559 						be32_to_cpu(eqe->event.srq.srqn)
564 						  eqe->type, eqe->subtype,
570 					  be32_to_cpu(eqe->event.srq.srqn),
571 					  eqe->type, eqe->subtype);
575 						  __func__, eqe->type,
576 						  eqe->subtype, slave);
577 					mlx4_slave_event(dev, slave, eqe);
581 			mlx4_srq_event(dev, be32_to_cpu(eqe->event.srq.srqn) &
582 				       0xffffff, eqe->type);
587 				       be16_to_cpu(eqe->event.cmd.token),
588 				       eqe->event.cmd.status,
589 				       be64_to_cpu(eqe->event.cmd.out_param));
594 			port = be32_to_cpu(eqe->event.port_change.port) >> 28;
596 			if (eqe->subtype == MLX4_PORT_CHANGE_SUBTYPE_DOWN) {
614 							eqe->event.port_change.port =
616 								(be32_to_cpu(eqe->event.port_change.port) & 0xFFFFFFF)
618 							mlx4_slave_event(dev, i, eqe);
628 							eqe->event.port_change.port =
630 								(be32_to_cpu(eqe->event.port_change.port) & 0xFFFFFFF)
632 							mlx4_slave_event(dev, i, eqe);
654 							eqe->event.port_change.port =
656 								(be32_to_cpu(eqe->event.port_change.port) & 0xFFFFFFF)
658 							mlx4_slave_event(dev, i, eqe);
672 				  eqe->event.cq_err.syndrome == 1 ?
674 				  be32_to_cpu(eqe->event.cq_err.cqn) & 0xffffff);
678 					be32_to_cpu(eqe->event.cq_err.cqn)
682 						 eqe->type, eqe->subtype,
688 					mlx4_slave_event(dev, slave, eqe);
693 				      be32_to_cpu(eqe->event.cq_err.cqn)
695 				      eqe->type);
716 			       eqe->event.comm_channel_arm.bit_vec,
717 			       sizeof eqe->event.comm_channel_arm.bit_vec);
723 			flr_slave = be32_to_cpu(eqe->event.flr_event.slave_id);
753 			if (eqe->subtype == MLX4_FATAL_WARNING_SUBTYPE_WARMING) {
760 						mlx4_slave_event(dev, i, eqe);
763 					 be16_to_cpu(eqe->event.warming.warning_threshold),
764 					 be16_to_cpu(eqe->event.warming.current_temperature));
767 					  eqe->type, eqe->subtype, eq->eqn,
768 					  eq->cons_index, eqe->owner, eq->nent,
769 					  eqe->slave_id,
770 					  !!(eqe->owner & 0x80) ^
777 					    (unsigned long) eqe);
781 			switch (eqe->subtype) {
784 					  eqe->event.bad_cable.port);
792 					 eqe->type, eqe->subtype, eq->eqn,
793 					 eq->cons_index, eqe->owner, eq->nent,
794 					 !!(eqe->owner & 0x80) ^
804 				  eqe->type, eqe->subtype, eq->eqn,
805 				  eq->cons_index, eqe->owner, eq->nent,
806 				  eqe->slave_id,
807 				  !!(eqe->owner & 0x80) ^