Lines Matching refs:sc
194 #define LGE_SETBIT(sc, reg, x) \
195 CSR_WRITE_4(sc, reg, \
196 CSR_READ_4(sc, reg) | (x))
198 #define LGE_CLRBIT(sc, reg, x) \
199 CSR_WRITE_4(sc, reg, \
200 CSR_READ_4(sc, reg) & ~(x))
203 CSR_WRITE_4(sc, LGE_MEAR, CSR_READ_4(sc, LGE_MEAR) | x)
206 CSR_WRITE_4(sc, LGE_MEAR, CSR_READ_4(sc, LGE_MEAR) & ~x)
212 lge_eeprom_getword(struct lge_softc *sc, int addr, u_int16_t *dest)
217 CSR_WRITE_4(sc, LGE_EECTL, LGE_EECTL_CMD_READ|
221 if (!(CSR_READ_4(sc, LGE_EECTL) & LGE_EECTL_CMD_READ))
225 device_printf(sc->lge_dev, "EEPROM read timed out\n");
229 val = CSR_READ_4(sc, LGE_EEDATA);
243 lge_read_eeprom(struct lge_softc *sc, caddr_t dest, int off, int cnt, int swap)
249 lge_eeprom_getword(sc, off + i, &word);
263 struct lge_softc *sc;
266 sc = device_get_softc(dev);
273 if (sc->lge_pcs == 0 && phy == 0)
276 CSR_WRITE_4(sc, LGE_GMIICTL, (phy << 8) | reg | LGE_GMIICMD_READ);
279 if (!(CSR_READ_4(sc, LGE_GMIICTL) & LGE_GMIICTL_CMDBUSY))
283 device_printf(sc->lge_dev, "PHY read timed out\n");
287 return(CSR_READ_4(sc, LGE_GMIICTL) >> 16);
293 struct lge_softc *sc;
296 sc = device_get_softc(dev);
298 CSR_WRITE_4(sc, LGE_GMIICTL,
302 if (!(CSR_READ_4(sc, LGE_GMIICTL) & LGE_GMIICTL_CMDBUSY))
306 device_printf(sc->lge_dev, "PHY write timed out\n");
316 struct lge_softc *sc;
319 sc = device_get_softc(dev);
320 mii = device_get_softc(sc->lge_miibus);
322 LGE_CLRBIT(sc, LGE_GMIIMODE, LGE_GMIIMODE_SPEED);
326 LGE_SETBIT(sc, LGE_GMIIMODE, LGE_SPEED_1000);
329 LGE_SETBIT(sc, LGE_GMIIMODE, LGE_SPEED_100);
332 LGE_SETBIT(sc, LGE_GMIIMODE, LGE_SPEED_10);
340 LGE_SETBIT(sc, LGE_GMIIMODE, LGE_SPEED_1000);
345 LGE_SETBIT(sc, LGE_GMIIMODE, LGE_GMIIMODE_FDX);
347 LGE_CLRBIT(sc, LGE_GMIIMODE, LGE_GMIIMODE_FDX);
367 lge_setmulti(struct lge_softc *sc)
372 ifp = sc->lge_ifp;
373 LGE_LOCK_ASSERT(sc);
376 CSR_WRITE_4(sc, LGE_MODE1, LGE_MODE1_SETRST_CTL1|LGE_MODE1_RX_MCAST);
379 CSR_WRITE_4(sc, LGE_MAR0, 0xFFFFFFFF);
380 CSR_WRITE_4(sc, LGE_MAR1, 0xFFFFFFFF);
385 CSR_WRITE_4(sc, LGE_MAR0, 0);
386 CSR_WRITE_4(sc, LGE_MAR1, 0);
391 CSR_WRITE_4(sc, LGE_MAR0, hashes[0]);
392 CSR_WRITE_4(sc, LGE_MAR1, hashes[1]);
398 lge_reset(struct lge_softc *sc)
402 LGE_SETBIT(sc, LGE_MODE1, LGE_MODE1_SETRST_CTL0|LGE_MODE1_SOFTRST);
405 if (!(CSR_READ_4(sc, LGE_MODE1) & LGE_MODE1_SOFTRST))
410 device_printf(sc->lge_dev, "reset never completed\n");
449 struct lge_softc *sc;
453 sc = device_get_softc(dev);
454 sc->lge_dev = dev;
456 mtx_init(&sc->lge_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK,
458 callout_init_mtx(&sc->lge_stat_callout, &sc->lge_mtx, 0);
466 sc->lge_res = bus_alloc_resource_any(dev, LGE_RES, &rid, RF_ACTIVE);
468 if (sc->lge_res == NULL) {
474 sc->lge_btag = rman_get_bustag(sc->lge_res);
475 sc->lge_bhandle = rman_get_bushandle(sc->lge_res);
479 sc->lge_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
482 if (sc->lge_irq == NULL) {
489 lge_reset(sc);
494 lge_read_eeprom(sc, (caddr_t)&eaddr[0], LGE_EE_NODEADDR_0, 1, 0);
495 lge_read_eeprom(sc, (caddr_t)&eaddr[2], LGE_EE_NODEADDR_1, 1, 0);
496 lge_read_eeprom(sc, (caddr_t)&eaddr[4], LGE_EE_NODEADDR_2, 1, 0);
498 sc->lge_ldata = contigmalloc(sizeof(struct lge_list_data), M_DEVBUF,
501 if (sc->lge_ldata == NULL) {
508 if (lge_alloc_jumbo_mem(sc)) {
514 ifp = sc->lge_ifp = if_alloc(IFT_ETHER);
520 if_setsoftc(ifp, sc);
530 if (CSR_READ_4(sc, LGE_GMIIMODE) & LGE_GMIIMODE_PCSENH)
531 sc->lge_pcs = 1;
533 sc->lge_pcs = 0;
538 error = mii_attach(dev, &sc->lge_miibus, ifp, lge_ifmedia_upd,
550 error = bus_setup_intr(dev, sc->lge_irq, INTR_TYPE_NET | INTR_MPSAFE,
551 NULL, lge_intr, sc, &sc->lge_intrhand);
561 lge_free_jumbo_mem(sc);
562 if (sc->lge_ldata)
563 contigfree(sc->lge_ldata,
567 if (sc->lge_irq)
568 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->lge_irq);
569 if (sc->lge_res)
570 bus_release_resource(dev, LGE_RES, LGE_RID, sc->lge_res);
571 mtx_destroy(&sc->lge_mtx);
578 struct lge_softc *sc;
581 sc = device_get_softc(dev);
582 ifp = sc->lge_ifp;
584 LGE_LOCK(sc);
585 lge_reset(sc);
586 lge_stop(sc);
587 LGE_UNLOCK(sc);
588 callout_drain(&sc->lge_stat_callout);
592 device_delete_child(dev, sc->lge_miibus);
594 bus_teardown_intr(dev, sc->lge_irq, sc->lge_intrhand);
595 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->lge_irq);
596 bus_release_resource(dev, LGE_RES, LGE_RID, sc->lge_res);
598 contigfree(sc->lge_ldata, sizeof(struct lge_list_data), M_DEVBUF);
600 lge_free_jumbo_mem(sc);
601 mtx_destroy(&sc->lge_mtx);
610 lge_list_tx_init(struct lge_softc *sc)
616 cd = &sc->lge_cdata;
617 ld = sc->lge_ldata;
635 lge_list_rx_init(struct lge_softc *sc)
641 ld = sc->lge_ldata;
642 cd = &sc->lge_cdata;
646 CSR_WRITE_4(sc, LGE_RXDESC_ADDR_HI, 0);
649 if (CSR_READ_1(sc, LGE_RXCMDFREE_8BIT) == 0)
651 if (lge_newbuf(sc, &ld->lge_rx_list[i], NULL) == ENOBUFS)
656 CSR_READ_4(sc, LGE_ISR);
665 lge_newbuf(struct lge_softc *sc, struct lge_rx_desc *c, struct mbuf *m)
673 device_printf(sc->lge_dev, "no memory for rx list "
679 buf = lge_jalloc(sc);
682 device_printf(sc->lge_dev, "jumbo allocation failed "
690 m_extadd(m_new, buf, LGE_JUMBO_FRAMELEN, lge_jfree, sc, NULL,
723 CSR_WRITE_4(sc, LGE_RXDESC_ADDR_LO, vtophys(c));
724 LGE_INC(sc->lge_cdata.lge_rx_prod, LGE_RX_LIST_CNT);
730 lge_alloc_jumbo_mem(struct lge_softc *sc)
737 sc->lge_cdata.lge_jumbo_buf = contigmalloc(LGE_JMEM, M_DEVBUF,
740 if (sc->lge_cdata.lge_jumbo_buf == NULL) {
741 device_printf(sc->lge_dev, "no memory for jumbo buffers!\n");
745 SLIST_INIT(&sc->lge_jfree_listhead);
746 SLIST_INIT(&sc->lge_jinuse_listhead);
752 ptr = sc->lge_cdata.lge_jumbo_buf;
754 sc->lge_cdata.lge_jslots[i] = ptr;
759 device_printf(sc->lge_dev, "no memory for jumbo "
764 SLIST_INSERT_HEAD(&sc->lge_jfree_listhead,
772 lge_free_jumbo_mem(struct lge_softc *sc)
776 if (sc->lge_cdata.lge_jumbo_buf == NULL)
779 while ((entry = SLIST_FIRST(&sc->lge_jinuse_listhead))) {
780 device_printf(sc->lge_dev,
782 SLIST_REMOVE_HEAD(&sc->lge_jinuse_listhead, jpool_entries);
783 SLIST_INSERT_HEAD(&sc->lge_jfree_listhead, entry,
786 while (!SLIST_EMPTY(&sc->lge_jfree_listhead)) {
787 entry = SLIST_FIRST(&sc->lge_jfree_listhead);
788 SLIST_REMOVE_HEAD(&sc->lge_jfree_listhead, jpool_entries);
792 contigfree(sc->lge_cdata.lge_jumbo_buf, LGE_JMEM, M_DEVBUF);
801 lge_jalloc(struct lge_softc *sc)
805 entry = SLIST_FIRST(&sc->lge_jfree_listhead);
809 device_printf(sc->lge_dev, "no free jumbo buffers\n");
814 SLIST_REMOVE_HEAD(&sc->lge_jfree_listhead, jpool_entries);
815 SLIST_INSERT_HEAD(&sc->lge_jinuse_listhead, entry, jpool_entries);
816 return(sc->lge_cdata.lge_jslots[entry->slot]);
825 struct lge_softc *sc;
830 sc = m->m_ext.ext_arg1;
832 if (sc == NULL)
837 - (vm_offset_t)sc->lge_cdata.lge_jumbo_buf) / LGE_JLEN;
842 entry = SLIST_FIRST(&sc->lge_jinuse_listhead);
846 SLIST_REMOVE_HEAD(&sc->lge_jinuse_listhead, jpool_entries);
847 SLIST_INSERT_HEAD(&sc->lge_jfree_listhead, entry, jpool_entries);
855 lge_rxeof(struct lge_softc *sc, int cnt)
863 ifp = sc->lge_ifp;
867 i = sc->lge_cdata.lge_rx_cons;
873 cur_rx = &sc->lge_ldata->lge_rx_list[i];
890 lge_newbuf(sc, &LGE_RXTAIL(sc), m);
894 if (lge_newbuf(sc, &LGE_RXTAIL(sc), NULL) == ENOBUFS) {
897 lge_newbuf(sc, &LGE_RXTAIL(sc), m);
899 device_printf(sc->lge_dev, "no receive buffers "
926 LGE_UNLOCK(sc);
928 LGE_LOCK(sc);
931 sc->lge_cdata.lge_rx_cons = i;
937 lge_rxeoc(struct lge_softc *sc)
941 ifp = sc->lge_ifp;
943 lge_init_locked(sc);
953 lge_txeof(struct lge_softc *sc)
959 ifp = sc->lge_ifp;
962 sc->lge_timer = 0;
968 idx = sc->lge_cdata.lge_tx_cons;
969 txdone = CSR_READ_1(sc, LGE_TXDMADONE_8BIT);
971 while (idx != sc->lge_cdata.lge_tx_prod && txdone) {
972 cur_tx = &sc->lge_ldata->lge_tx_list[idx];
983 sc->lge_timer = 0;
986 sc->lge_cdata.lge_tx_cons = idx;
997 struct lge_softc *sc;
1001 sc = xsc;
1002 ifp = sc->lge_ifp;
1003 LGE_LOCK_ASSERT(sc);
1005 CSR_WRITE_4(sc, LGE_STATSIDX, LGE_STATS_SINGLE_COLL_PKTS);
1006 if_inc_counter(ifp, IFCOUNTER_COLLISIONS, CSR_READ_4(sc, LGE_STATSVAL));
1007 CSR_WRITE_4(sc, LGE_STATSIDX, LGE_STATS_MULTI_COLL_PKTS);
1008 if_inc_counter(ifp, IFCOUNTER_COLLISIONS, CSR_READ_4(sc, LGE_STATSVAL));
1010 if (!sc->lge_link) {
1011 mii = device_get_softc(sc->lge_miibus);
1015 sc->lge_link++;
1019 device_printf(sc->lge_dev, "gigabit link up\n");
1025 if (sc->lge_timer != 0 && --sc->lge_timer == 0)
1026 lge_watchdog(sc);
1027 callout_reset(&sc->lge_stat_callout, hz, lge_tick, sc);
1035 struct lge_softc *sc;
1039 sc = arg;
1040 ifp = sc->lge_ifp;
1041 LGE_LOCK(sc);
1045 lge_stop(sc);
1046 LGE_UNLOCK(sc);
1056 status = CSR_READ_4(sc, LGE_ISR);
1062 lge_txeof(sc);
1065 lge_rxeof(sc, LGE_RX_DMACNT(status));
1068 lge_rxeoc(sc);
1071 sc->lge_link = 0;
1072 callout_stop(&sc->lge_stat_callout);
1073 lge_tick(sc);
1078 CSR_WRITE_4(sc, LGE_IMR, LGE_IMR_SETRST_CTL0|LGE_IMR_INTR_ENB);
1083 LGE_UNLOCK(sc);
1092 lge_encap(struct lge_softc *sc, struct mbuf *m_head, u_int32_t *txidx)
1105 cur_tx = &sc->lge_ldata->lge_tx_list[*txidx];
1127 CSR_WRITE_4(sc, LGE_TXDESC_ADDR_LO, vtophys(cur_tx));
1142 struct lge_softc *sc;
1144 sc = if_getsoftc(ifp);
1145 LGE_LOCK(sc);
1147 LGE_UNLOCK(sc);
1153 struct lge_softc *sc;
1157 sc = if_getsoftc(ifp);
1159 if (!sc->lge_link)
1162 idx = sc->lge_cdata.lge_tx_prod;
1167 while(sc->lge_ldata->lge_tx_list[idx].lge_mbuf == NULL) {
1168 if (CSR_READ_1(sc, LGE_TXCMDFREE_8BIT) == 0)
1175 if (lge_encap(sc, m_head, &idx)) {
1188 sc->lge_cdata.lge_tx_prod = idx;
1193 sc->lge_timer = 5;
1201 struct lge_softc *sc = xsc;
1203 LGE_LOCK(sc);
1204 lge_init_locked(sc);
1205 LGE_UNLOCK(sc);
1209 lge_init_locked(struct lge_softc *sc)
1211 if_t ifp = sc->lge_ifp;
1213 LGE_LOCK_ASSERT(sc);
1220 lge_stop(sc);
1221 lge_reset(sc);
1224 CSR_WRITE_4(sc, LGE_PAR0, *(u_int32_t *)(&if_getlladdr(sc->lge_ifp)[0]));
1225 CSR_WRITE_4(sc, LGE_PAR1, *(u_int32_t *)(&if_getlladdr(sc->lge_ifp)[4]));
1228 if (lge_list_rx_init(sc) == ENOBUFS) {
1229 device_printf(sc->lge_dev, "initialization failed: no "
1231 lge_stop(sc);
1238 lge_list_tx_init(sc);
1241 CSR_WRITE_4(sc, LGE_MODE1, LGE_MODE1_RX_UCAST|
1248 CSR_WRITE_4(sc, LGE_MODE1,
1251 CSR_WRITE_4(sc, LGE_MODE1, LGE_MODE1_RX_PROMISC);
1258 CSR_WRITE_4(sc, LGE_MODE1,
1261 CSR_WRITE_4(sc, LGE_MODE1, LGE_MODE1_RX_BCAST);
1265 CSR_WRITE_4(sc, LGE_MODE1, LGE_MODE1_SETRST_CTL1|LGE_MODE1_RMVPAD);
1268 CSR_WRITE_4(sc, LGE_MODE1, LGE_MODE1_RX_ERRPKTS);
1271 CSR_WRITE_4(sc, LGE_MODE1, LGE_MODE1_SETRST_CTL1|LGE_MODE1_RX_GIANTS);
1274 CSR_WRITE_4(sc, LGE_MODE1, LGE_MODE1_TX_FLOWCTL);
1275 CSR_WRITE_4(sc, LGE_MODE1, LGE_MODE1_RX_FLOWCTL);
1278 CSR_WRITE_4(sc, LGE_MODE1, LGE_MODE1_RX_CRC);
1281 CSR_WRITE_4(sc, LGE_MODE1, LGE_MODE1_MPACK_ENB);
1284 CSR_WRITE_4(sc, LGE_MODE1, LGE_MODE1_VLAN_RX|LGE_MODE1_VLAN_TX|
1288 CSR_WRITE_2(sc, LGE_RXFIFO_HIWAT, 0x3FFF);
1289 CSR_WRITE_4(sc, LGE_IMR, LGE_IMR_SETRST_CTL1|LGE_IMR_RXFIFO_WAT);
1294 lge_setmulti(sc);
1300 CSR_WRITE_4(sc, LGE_MODE2, LGE_MODE2_RX_IPCSUM|
1308 CSR_WRITE_4(sc, LGE_MODE1, LGE_MODE1_SETRST_CTL0|LGE_MODE1_GMIIPOLL);
1311 CSR_WRITE_4(sc, LGE_RXDESC_ADDR_HI, 0);
1312 CSR_WRITE_4(sc, LGE_MODE1, LGE_MODE1_SETRST_CTL1|LGE_MODE1_RX_ENB);
1314 CSR_WRITE_4(sc, LGE_TXDESC_ADDR_HI, 0);
1315 CSR_WRITE_4(sc, LGE_MODE1, LGE_MODE1_SETRST_CTL1|LGE_MODE1_TX_ENB);
1320 CSR_WRITE_4(sc, LGE_IMR, LGE_IMR_SETRST_CTL0|
1328 callout_reset(&sc->lge_stat_callout, hz, lge_tick, sc);
1339 struct lge_softc *sc;
1341 sc = if_getsoftc(ifp);
1342 LGE_LOCK(sc);
1344 LGE_UNLOCK(sc);
1352 struct lge_softc *sc;
1356 sc = if_getsoftc(ifp);
1358 LGE_LOCK_ASSERT(sc);
1359 mii = device_get_softc(sc->lge_miibus);
1360 sc->lge_link = 0;
1372 struct lge_softc *sc;
1375 sc = if_getsoftc(ifp);
1377 LGE_LOCK(sc);
1378 mii = device_get_softc(sc->lge_miibus);
1382 LGE_UNLOCK(sc);
1390 struct lge_softc *sc = if_getsoftc(ifp);
1397 LGE_LOCK(sc);
1402 LGE_UNLOCK(sc);
1405 LGE_LOCK(sc);
1409 !(sc->lge_if_flags & IFF_PROMISC)) {
1410 CSR_WRITE_4(sc, LGE_MODE1,
1415 sc->lge_if_flags & IFF_PROMISC) {
1416 CSR_WRITE_4(sc, LGE_MODE1,
1420 lge_init_locked(sc);
1424 lge_stop(sc);
1426 sc->lge_if_flags = if_getflags(ifp);
1427 LGE_UNLOCK(sc);
1432 LGE_LOCK(sc);
1433 lge_setmulti(sc);
1434 LGE_UNLOCK(sc);
1439 mii = device_get_softc(sc->lge_miibus);
1451 lge_watchdog(struct lge_softc *sc)
1455 LGE_LOCK_ASSERT(sc);
1456 ifp = sc->lge_ifp;
1461 lge_stop(sc);
1462 lge_reset(sc);
1464 lge_init_locked(sc);
1475 lge_stop(struct lge_softc *sc)
1480 LGE_LOCK_ASSERT(sc);
1481 ifp = sc->lge_ifp;
1482 sc->lge_timer = 0;
1483 callout_stop(&sc->lge_stat_callout);
1484 CSR_WRITE_4(sc, LGE_IMR, LGE_IMR_INTR_ENB);
1487 CSR_WRITE_4(sc, LGE_MODE1, LGE_MODE1_RX_ENB|LGE_MODE1_TX_ENB);
1488 sc->lge_link = 0;
1494 if (sc->lge_ldata->lge_rx_list[i].lge_mbuf != NULL) {
1495 m_freem(sc->lge_ldata->lge_rx_list[i].lge_mbuf);
1496 sc->lge_ldata->lge_rx_list[i].lge_mbuf = NULL;
1499 bzero((char *)&sc->lge_ldata->lge_rx_list,
1500 sizeof(sc->lge_ldata->lge_rx_list));
1506 if (sc->lge_ldata->lge_tx_list[i].lge_mbuf != NULL) {
1507 m_freem(sc->lge_ldata->lge_tx_list[i].lge_mbuf);
1508 sc->lge_ldata->lge_tx_list[i].lge_mbuf = NULL;
1512 bzero((char *)&sc->lge_ldata->lge_tx_list,
1513 sizeof(sc->lge_ldata->lge_tx_list));
1527 struct lge_softc *sc;
1529 sc = device_get_softc(dev);
1531 LGE_LOCK(sc);
1532 lge_reset(sc);
1533 lge_stop(sc);
1534 LGE_UNLOCK(sc);