dev/iwm/if_iwmreg.h

1270  * data) into one of up to 7 prioritized Tx DMA FIFO channels within the
1288  * Driver should normally map queues 0-6 to Tx DMA/FIFO channels 0-6.
1290  * channels 0-3 to support 11n aggregation via EDCA DMA channels.
1692  * Device has one configuration register for each of 8 Tx DMA/FIFO channels
1694  * which feed the DMA/FIFO channels); config regs are separated by 0x20 bytes.
1789 /* Tx service channels */
2771  * of the device on the channel. Since the fw supports multiple channels
3710  * cleared when changing channels or when driver issues IWM_REPLY_STATISTICS_CMD
3982  *	other channels as well. This should be to true only in case that the
5500  * @IWM_LMAC_SCAN_FLAG_PASSIVE: force passive scan on all channels
5507  * @IWM_LMAC_SCAN_FLAG_EXTENDED_DWELL: use extended dwell time on channels
5528  * @channel_num: num of channels to scan
5529  * @active-dwell: dwell time for active channels
5530  * @passive-dwell: dwell time for passive channels
5532  * @extended_dwell: dwell time for channels 1, 6 and 11 (in certain cases)
5689  * struct iwm_lmac_scan_complete_notif - notifies end of scanning (all channels)
5691  * @scanned_channels: number of channels scanned (and number of valid results)
5737 /* Bits 26-31 are for num of channels in channel_array */
5774  * @dwell_extended:		default dwell time for channels 1, 6 and 11
5779  * @channel_array:		default supported channels
5872  *      parameters following channels configuration array.
5891  *      parameters following channels configuration array.
5911  * @count: num of channels in scan request
5930  * @extended_dwell: dwell time for channels 1, 6 and 11
6073  * @matching_channels: bitmap of channels that matched, referencing
6074  *	the channels passed in tue scan offload request
6113  * @scanned_channels: number of channels scanned and number of valid elements in
6669  * @cap: capabilities for all channels which matches the MCC
6671  * @n_channels: number of channels in @channels_data (may be 14, 39, 50 or 51
6672  *		channels, depending on platform)
6673  * @channels: channel control data map, DWORD for each channel. Only the first
6682 	uint32_t channels[0];
6692  * @cap: capabilities for all channels which matches the MCC
6696  * @n_channels: number of channels in @channels_data (may be 14, 39, 50 or 51
6697  *		channels, depending on platform)
6698  * @channels: channel control data map, DWORD for each channel. Only the first
6709 	uint32_t channels[0];
6722  * @cap: capabilities for all channels which matches the MCC
6726  * @n_channels: number of channels in @channels_data (may be 14, 39, 50 or 51
6727  *		channels, depending on platform)
6728  * @channels: channel control data map, DWORD for each channel. Only the first
6739 	uint32_t channels[0];