isci/scil/scu_bios_definitions.h

162      * elements corresponds to the number of SCU controller units contained
196          * this controller:
222          * on this controller.  This allows the OEM to avoid exceeding
238     } controller;
250         *      Bit 0 = This controller's PHY index 0     (0x01)
251         *      Bit 1 = This controller's PHY index 1     (0x02)
252         *      Bit 2 = This controller's PHY index 2     (0x04)
253         *      Bit 3 = This controller's PHY index 3     (0x08)
260     } ports[SCI_MAX_PORTS]; // Up to 4 Ports per SCU controller unit
274          * SAS Addresses for all PHYs within a controller group SHALL be the
341     } phys[SCI_MAX_PHYS];   // 4 PHYs per SCU controller unit
360          * this controller:
386          * on this controller.  This allows the OEM to avoid exceeding
435     } controller;
447         *      Bit 0 = This controller's PHY index 0     (0x01)
448         *      Bit 1 = This controller's PHY index 1     (0x02)
449         *      Bit 2 = This controller's PHY index 2     (0x04)
450         *      Bit 3 = This controller's PHY index 3     (0x08)
457     } ports[SCI_MAX_PORTS]; // Up to 4 Ports per SCU controller unit
471          * SAS Addresses for all PHYs within a controller group SHALL be the
538     } phys[SCI_MAX_PHYS];   // 4 PHYs per SCU controller unit
557          * this controller:
583          * on this controller.  This allows the OEM to avoid exceeding
645     } controller;
657         *      Bit 0 = This controller's PHY index 0     (0x01)
658         *      Bit 1 = This controller's PHY index 1     (0x02)
659         *      Bit 2 = This controller's PHY index 2     (0x04)
660         *      Bit 3 = This controller's PHY index 3     (0x08)
667     } ports[SCI_MAX_PORTS]; // Up to 4 Ports per SCU controller unit
681          * SAS Addresses for all PHYs within a controller group SHALL be the
748     } phys[SCI_MAX_PHYS];   // 4 PHYs per SCU controller unit
767          * this controller:
793          * on this controller.  This allows the OEM to avoid exceeding
866     } controller;
878         *      Bit 0 = This controller's PHY index 0     (0x01)
879         *      Bit 1 = This controller's PHY index 1     (0x02)
880         *      Bit 2 = This controller's PHY index 2     (0x04)
881         *      Bit 3 = This controller's PHY index 3     (0x08)
888     } ports[SCI_MAX_PORTS]; // Up to 4 Ports per SCU controller unit
902          * SAS Addresses for all PHYs within a controller group SHALL be the
969     } phys[SCI_MAX_PHYS];   // 4 PHYs per SCU controller unit
988      * Per controller element descriptor containing the controller's