Lines Matching refs:mac
380 bwn_phy_lp_init_pre(struct bwn_mac *mac)
382 struct bwn_phy *phy = &mac->mac_phy;
389 bwn_phy_lp_init(struct bwn_mac *mac)
408 struct bwn_phy_lp *plp = &mac->mac_phy.phy_lp;
409 struct bwn_softc *sc = mac->mac_sc;
422 if ((error = bwn_phy_lp_readsprom(mac)))
425 bwn_phy_lp_bbinit(mac);
428 BWN_PHY_SET(mac, BWN_PHY_4WIRECTL, 0x2);
430 BWN_PHY_MASK(mac, BWN_PHY_4WIRECTL, 0xfffd);
433 if (mac->mac_phy.rf_ver == 0x2062) {
434 if ((error = bwn_phy_lp_b2062_init(mac)))
437 if ((error = bwn_phy_lp_b2063_init(mac)))
443 tmp = BWN_RF_READ(mac, st->st_rfaddr);
446 BWN_PHY_SETMASK(mac,
451 BWN_PHY_WRITE(mac, BWN_PHY_OFDM(0xf0), 0x5f80);
452 BWN_PHY_WRITE(mac, BWN_PHY_OFDM(0xf1), 0);
456 if (mac->mac_phy.rev >= 2) {
457 if ((error = bwn_phy_lp_rxcal_r2(mac)))
461 if ((error = bwn_phy_lp_rccal_r12(mac)))
465 bwn_phy_lp_set_rccap(mac);
467 error = bwn_phy_lp_switch_channel(mac, 7);
471 bwn_phy_lp_txpctl_init(mac);
472 bwn_phy_lp_calib(mac);
477 bwn_phy_lp_read(struct bwn_mac *mac, uint16_t reg)
480 BWN_WRITE_2(mac, BWN_PHYCTL, reg);
481 return (BWN_READ_2(mac, BWN_PHYDATA));
485 bwn_phy_lp_write(struct bwn_mac *mac, uint16_t reg, uint16_t value)
488 BWN_WRITE_2(mac, BWN_PHYCTL, reg);
489 BWN_WRITE_2(mac, BWN_PHYDATA, value);
493 bwn_phy_lp_maskset(struct bwn_mac *mac, uint16_t reg, uint16_t mask,
497 BWN_WRITE_2(mac, BWN_PHYCTL, reg);
498 BWN_WRITE_2(mac, BWN_PHYDATA,
499 (BWN_READ_2(mac, BWN_PHYDATA) & mask) | set);
503 bwn_phy_lp_rf_read(struct bwn_mac *mac, uint16_t reg)
507 if (mac->mac_phy.rev < 2 && reg != 0x4001)
509 if (mac->mac_phy.rev >= 2)
511 BWN_WRITE_2(mac, BWN_RFCTL, reg);
512 return BWN_READ_2(mac, BWN_RFDATALO);
516 bwn_phy_lp_rf_write(struct bwn_mac *mac, uint16_t reg, uint16_t value)
520 BWN_WRITE_2(mac, BWN_RFCTL, reg);
521 BWN_WRITE_2(mac, BWN_RFDATALO, value);
525 bwn_phy_lp_rf_onoff(struct bwn_mac *mac, int on)
529 BWN_PHY_MASK(mac, BWN_PHY_RF_OVERRIDE_0, 0xe0ff);
530 BWN_PHY_MASK(mac, BWN_PHY_RF_OVERRIDE_2,
531 (mac->mac_phy.rev >= 2) ? 0xf7f7 : 0xffe7);
535 if (mac->mac_phy.rev >= 2) {
536 BWN_PHY_MASK(mac, BWN_PHY_RF_OVERRIDE_VAL_0, 0x83ff);
537 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_0, 0x1f00);
538 BWN_PHY_MASK(mac, BWN_PHY_AFE_DDFS, 0x80ff);
539 BWN_PHY_MASK(mac, BWN_PHY_RF_OVERRIDE_2_VAL, 0xdfff);
540 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_2, 0x0808);
544 BWN_PHY_MASK(mac, BWN_PHY_RF_OVERRIDE_VAL_0, 0xe0ff);
545 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_0, 0x1f00);
546 BWN_PHY_MASK(mac, BWN_PHY_RF_OVERRIDE_2_VAL, 0xfcff);
547 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_2, 0x0018);
551 bwn_phy_lp_switch_channel(struct bwn_mac *mac, uint32_t chan)
553 struct bwn_phy *phy = &mac->mac_phy;
558 error = bwn_phy_lp_b2063_switch_channel(mac, chan);
562 error = bwn_phy_lp_b2062_switch_channel(mac, chan);
565 bwn_phy_lp_set_anafilter(mac, chan);
566 bwn_phy_lp_set_gaintbl(mac, ieee80211_ieee2mhz(chan, 0));
570 BWN_WRITE_2(mac, BWN_CHANNEL, chan);
575 bwn_phy_lp_get_default_chan(struct bwn_mac *mac)
577 struct bwn_softc *sc = mac->mac_sc;
584 bwn_phy_lp_set_antenna(struct bwn_mac *mac, int antenna)
586 struct bwn_phy *phy = &mac->mac_phy;
592 bwn_hf_write(mac, bwn_hf_read(mac) & ~BWN_HF_UCODE_ANTDIV_HELPER);
593 BWN_PHY_SETMASK(mac, BWN_PHY_CRSGAIN_CTL, 0xfffd, antenna & 0x2);
594 BWN_PHY_SETMASK(mac, BWN_PHY_CRSGAIN_CTL, 0xfffe, antenna & 0x1);
595 bwn_hf_write(mac, bwn_hf_read(mac) | BWN_HF_UCODE_ANTDIV_HELPER);
600 bwn_phy_lp_task_60s(struct bwn_mac *mac)
603 bwn_phy_lp_calib(mac);
607 bwn_phy_lp_readsprom(struct bwn_mac *mac)
609 struct bwn_phy_lp *plp = &mac->mac_phy.phy_lp;
610 struct bwn_softc *sc = mac->mac_sc;
665 bwn_phy_lp_bbinit(struct bwn_mac *mac)
668 bwn_phy_lp_tblinit(mac);
669 if (mac->mac_phy.rev >= 2)
670 bwn_phy_lp_bbinit_r2(mac);
672 bwn_phy_lp_bbinit_r01(mac);
676 bwn_phy_lp_txpctl_init(struct bwn_mac *mac)
680 struct bwn_softc *sc = mac->mac_sc;
683 bwn_phy_lp_set_txgain(mac,
685 bwn_phy_lp_set_bbmult(mac, 150);
689 bwn_phy_lp_calib(struct bwn_mac *mac)
691 struct bwn_phy_lp *plp = &mac->mac_phy.phy_lp;
692 struct bwn_softc *sc = mac->mac_sc;
704 bwn_mac_suspend(mac);
707 BWN_WRITE_2(mac, BWN_BTCOEX_CTL, 0x3);
708 BWN_WRITE_2(mac, BWN_BTCOEX_TXCTL, 0xff);
710 if (mac->mac_phy.rev >= 2)
711 bwn_phy_lp_digflt_save(mac);
712 bwn_phy_lp_get_txpctlmode(mac);
714 bwn_phy_lp_set_txpctlmode(mac, BWN_PHYLP_TXPCTL_OFF);
715 if (mac->mac_phy.rev == 0 && mode != BWN_PHYLP_TXPCTL_OFF)
716 bwn_phy_lp_bugfix(mac);
717 if (mac->mac_phy.rev >= 2 && fc == 1) {
718 bwn_phy_lp_get_txpctlmode(mac);
720 oafeovr = BWN_PHY_READ(mac, BWN_PHY_AFE_CTL_OVR) & 0x40;
722 ogain = bwn_phy_lp_get_txgain(mac);
723 orf = BWN_PHY_READ(mac, BWN_PHY_RF_PWR_OVERRIDE) & 0xff;
724 obbmult = bwn_phy_lp_get_bbmult(mac);
725 bwn_phy_lp_set_txpctlmode(mac, BWN_PHYLP_TXPCTL_OFF);
727 bwn_phy_lp_set_txgain(mac, &ogain);
728 bwn_phy_lp_set_bbmult(mac, obbmult);
729 bwn_phy_lp_set_txpctlmode(mac, omode);
730 BWN_PHY_SETMASK(mac, BWN_PHY_RF_PWR_OVERRIDE, 0xff00, orf);
732 bwn_phy_lp_set_txpctlmode(mac, mode);
733 if (mac->mac_phy.rev >= 2)
734 bwn_phy_lp_digflt_restore(mac);
742 } else if (mac->mac_phy.rev >= 2)
753 BWN_PHY_SETMASK(mac, BWN_PHY_RX_COMP_COEFF_S, 0xff00, rc->rc_c1);
754 BWN_PHY_SETMASK(mac, BWN_PHY_RX_COMP_COEFF_S, 0x00ff, rc->rc_c0 << 8);
756 bwn_phy_lp_set_trsw_over(mac, 1 /* TX */, 0 /* RX */);
759 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_0, 0x8);
760 BWN_PHY_SETMASK(mac, BWN_PHY_RF_OVERRIDE_VAL_0, 0xfff7, 0);
762 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_0, 0x20);
763 BWN_PHY_SETMASK(mac, BWN_PHY_RF_OVERRIDE_VAL_0, 0xffdf, 0);
766 bwn_phy_lp_set_rxgain(mac, 0x2d5d);
767 BWN_PHY_MASK(mac, BWN_PHY_AFE_CTL_OVR, 0xfffe);
768 BWN_PHY_MASK(mac, BWN_PHY_AFE_CTL_OVRVAL, 0xfffe);
769 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_0, 0x800);
770 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_VAL_0, 0x800);
771 bwn_phy_lp_set_deaf(mac, 0);
773 (void)bwn_phy_lp_calc_rx_iq_comp(mac, 0xfff0);
774 bwn_phy_lp_clear_deaf(mac, 0);
775 BWN_PHY_MASK(mac, BWN_PHY_RF_OVERRIDE_0, 0xfffc);
776 BWN_PHY_MASK(mac, BWN_PHY_RF_OVERRIDE_0, 0xfff7);
777 BWN_PHY_MASK(mac, BWN_PHY_RF_OVERRIDE_0, 0xffdf);
780 BWN_PHY_MASK(mac, BWN_PHY_RF_OVERRIDE_0, 0xfffe);
781 BWN_PHY_MASK(mac, BWN_PHY_RF_OVERRIDE_0, 0xffef);
782 BWN_PHY_MASK(mac, BWN_PHY_RF_OVERRIDE_0, 0xffbf);
783 if (mac->mac_phy.rev >= 2) {
784 BWN_PHY_MASK(mac, BWN_PHY_RF_OVERRIDE_2, 0xfeff);
786 BWN_PHY_MASK(mac, BWN_PHY_RF_OVERRIDE_2, 0xfbff);
787 BWN_PHY_MASK(mac, BWN_PHY_OFDM(0xe5), 0xfff7);
790 BWN_PHY_MASK(mac, BWN_PHY_RF_OVERRIDE_2, 0xfdff);
793 BWN_PHY_MASK(mac, BWN_PHY_AFE_CTL_OVR, 0xfffe);
794 BWN_PHY_MASK(mac, BWN_PHY_AFE_CTL_OVRVAL, 0xf7ff);
796 bwn_mac_enable(mac);
800 bwn_phy_lp_switch_analog(struct bwn_mac *mac, int on)
804 BWN_PHY_MASK(mac, BWN_PHY_AFE_CTL_OVR, 0xfff8);
808 BWN_PHY_SET(mac, BWN_PHY_AFE_CTL_OVRVAL, 0x0007);
809 BWN_PHY_SET(mac, BWN_PHY_AFE_CTL_OVR, 0x0007);
813 bwn_phy_lp_b2063_switch_channel(struct bwn_mac *mac, uint8_t chan)
816 struct bwn_softc *sc = mac->mac_sc;
839 BWN_RF_WRITE(mac, BWN_B2063_LOGEN_VCOBUF1, bc->bc_data[0]);
840 BWN_RF_WRITE(mac, BWN_B2063_LOGEN_MIXER2, bc->bc_data[1]);
841 BWN_RF_WRITE(mac, BWN_B2063_LOGEN_BUF2, bc->bc_data[2]);
842 BWN_RF_WRITE(mac, BWN_B2063_LOGEN_RCCR1, bc->bc_data[3]);
843 BWN_RF_WRITE(mac, BWN_B2063_A_RX_1ST3, bc->bc_data[4]);
844 BWN_RF_WRITE(mac, BWN_B2063_A_RX_2ND1, bc->bc_data[5]);
845 BWN_RF_WRITE(mac, BWN_B2063_A_RX_2ND4, bc->bc_data[6]);
846 BWN_RF_WRITE(mac, BWN_B2063_A_RX_2ND7, bc->bc_data[7]);
847 BWN_RF_WRITE(mac, BWN_B2063_A_RX_PS6, bc->bc_data[8]);
848 BWN_RF_WRITE(mac, BWN_B2063_TX_RF_CTL2, bc->bc_data[9]);
849 BWN_RF_WRITE(mac, BWN_B2063_TX_RF_CTL5, bc->bc_data[10]);
850 BWN_RF_WRITE(mac, BWN_B2063_PA_CTL11, bc->bc_data[11]);
852 old = BWN_RF_READ(mac, BWN_B2063_COM15);
853 BWN_RF_SET(mac, BWN_B2063_COM15, 0x1e);
862 BWN_RF_WRITE(mac, BWN_B2063_JTAG_VCO_CALIB3, 0x2);
863 BWN_RF_SETMASK(mac, BWN_B2063_JTAG_VCO_CALIB6,
865 BWN_RF_SETMASK(mac, BWN_B2063_JTAG_VCO_CALIB7,
867 BWN_RF_WRITE(mac, BWN_B2063_JTAG_VCO_CALIB5, timeoutref);
875 BWN_RF_SETMASK(mac, BWN_B2063_JTAG_VCO_CALIB7,
877 BWN_RF_WRITE(mac, BWN_B2063_JTAG_VCO_CALIB8, count & 0xff);
885 BWN_RF_SETMASK(mac, BWN_B2063_JTAG_SG1, 0xffe0, tmp[0] >> 4);
886 BWN_RF_SETMASK(mac, BWN_B2063_JTAG_SG2, 0xfe0f, tmp[0] << 4);
887 BWN_RF_SETMASK(mac, BWN_B2063_JTAG_SG2, 0xfff0, tmp[0] >> 16);
888 BWN_RF_WRITE(mac, BWN_B2063_JTAG_SG3, (tmp[1] >> 8) & 0xff);
889 BWN_RF_WRITE(mac, BWN_B2063_JTAG_SG4, tmp[1] & 0xff);
891 BWN_RF_WRITE(mac, BWN_B2063_JTAG_LF1, 0xb9);
892 BWN_RF_WRITE(mac, BWN_B2063_JTAG_LF2, 0x88);
893 BWN_RF_WRITE(mac, BWN_B2063_JTAG_LF3, 0x28);
894 BWN_RF_WRITE(mac, BWN_B2063_JTAG_LF4, 0x63);
906 BWN_RF_SETMASK(mac, BWN_B2063_JTAG_CP2, 0xffc0, tmp[4]);
907 BWN_RF_SETMASK(mac, BWN_B2063_JTAG_CP2, 0xffbf, scale << 6);
914 BWN_RF_SETMASK(mac, BWN_B2063_JTAG_CP3, 0xffe0, tmp[5]);
915 BWN_RF_SETMASK(mac, BWN_B2063_JTAG_CP3, 0xffdf, scale << 5);
917 BWN_RF_SETMASK(mac, BWN_B2063_JTAG_XTAL_12, 0xfffb, 0x4);
919 BWN_RF_SET(mac, BWN_B2063_JTAG_XTAL_12, 0x2);
921 BWN_RF_MASK(mac, BWN_B2063_JTAG_XTAL_12, 0xfd);
924 BWN_RF_SET(mac, BWN_B2063_JTAG_VCO1, 0x2);
926 BWN_RF_MASK(mac, BWN_B2063_JTAG_VCO1, 0xfd);
928 BWN_RF_SET(mac, BWN_B2063_PLL_SP2, 0x3);
930 BWN_RF_MASK(mac, BWN_B2063_PLL_SP2, 0xfffc);
933 BWN_RF_MASK(mac, BWN_B2063_PLL_SP1, ~0x40);
934 tmp16 = BWN_RF_READ(mac, BWN_B2063_JTAG_CALNRST) & 0xf8;
935 BWN_RF_WRITE(mac, BWN_B2063_JTAG_CALNRST, tmp16);
937 BWN_RF_WRITE(mac, BWN_B2063_JTAG_CALNRST, tmp16 | 0x4);
939 BWN_RF_WRITE(mac, BWN_B2063_JTAG_CALNRST, tmp16 | 0x6);
941 BWN_RF_WRITE(mac, BWN_B2063_JTAG_CALNRST, tmp16 | 0x7);
943 BWN_RF_SET(mac, BWN_B2063_PLL_SP1, 0x40);
945 BWN_RF_WRITE(mac, BWN_B2063_COM15, old);
950 bwn_phy_lp_b2062_switch_channel(struct bwn_mac *mac, uint8_t chan)
952 struct bwn_softc *sc = mac->mac_sc;
953 struct bwn_phy_lp *plp = &mac->mac_phy.phy_lp;
976 BWN_RF_SET(mac, BWN_B2062_S_RFPLLCTL14, 0x04);
977 BWN_RF_WRITE(mac, BWN_B2062_N_LGENATUNE0, bc->bc_data[0]);
978 BWN_RF_WRITE(mac, BWN_B2062_N_LGENATUNE2, bc->bc_data[1]);
979 BWN_RF_WRITE(mac, BWN_B2062_N_LGENATUNE3, bc->bc_data[2]);
980 BWN_RF_WRITE(mac, BWN_B2062_N_TX_TUNE, bc->bc_data[3]);
981 BWN_RF_WRITE(mac, BWN_B2062_S_LGENG_CTL1, bc->bc_data[4]);
982 BWN_RF_WRITE(mac, BWN_B2062_N_LGENACTL5, bc->bc_data[5]);
983 BWN_RF_WRITE(mac, BWN_B2062_N_LGENACTL6, bc->bc_data[6]);
984 BWN_RF_WRITE(mac, BWN_B2062_N_TX_PGA, bc->bc_data[7]);
985 BWN_RF_WRITE(mac, BWN_B2062_N_TX_PAD, bc->bc_data[8]);
987 BWN_RF_WRITE(mac, BWN_B2062_S_RFPLLCTL33, 0xcc);
988 BWN_RF_WRITE(mac, BWN_B2062_S_RFPLLCTL34, 0x07);
989 bwn_phy_lp_b2062_reset_pllbias(mac);
998 BWN_RF_WRITE(mac, BWN_B2062_S_RFPLLCTL26, tmp[5]);
1002 BWN_RF_WRITE(mac, BWN_B2062_S_RFPLLCTL27, tmp[5]);
1006 BWN_RF_WRITE(mac, BWN_B2062_S_RFPLLCTL28, tmp[5]);
1010 BWN_RF_WRITE(mac, BWN_B2062_S_RFPLLCTL29,
1012 tmp[7] = BWN_RF_READ(mac, BWN_B2062_S_RFPLLCTL19);
1014 BWN_RF_WRITE(mac, BWN_B2062_S_RFPLLCTL23, (tmp[8] >> 8) + 16);
1015 BWN_RF_WRITE(mac, BWN_B2062_S_RFPLLCTL24, tmp[8] & 0xff);
1017 bwn_phy_lp_b2062_vco_calib(mac);
1018 if (BWN_RF_READ(mac, BWN_B2062_S_RFPLLCTL3) & 0x10) {
1019 BWN_RF_WRITE(mac, BWN_B2062_S_RFPLLCTL33, 0xfc);
1020 BWN_RF_WRITE(mac, BWN_B2062_S_RFPLLCTL34, 0);
1021 bwn_phy_lp_b2062_reset_pllbias(mac);
1022 bwn_phy_lp_b2062_vco_calib(mac);
1023 if (BWN_RF_READ(mac, BWN_B2062_S_RFPLLCTL3) & 0x10) {
1024 BWN_RF_MASK(mac, BWN_B2062_S_RFPLLCTL14, ~0x04);
1028 BWN_RF_MASK(mac, BWN_B2062_S_RFPLLCTL14, ~0x04);
1033 bwn_phy_lp_set_anafilter(struct bwn_mac *mac, uint8_t channel)
1035 struct bwn_phy_lp *plp = &mac->mac_phy.phy_lp;
1038 if (mac->mac_phy.rev < 2) {
1039 BWN_PHY_SETMASK(mac, BWN_PHY_LP_PHY_CTL, 0xfcff, tmp << 9);
1040 if ((mac->mac_phy.rev == 1) && (plp->plp_rccap))
1041 bwn_phy_lp_set_rccap(mac);
1045 BWN_RF_WRITE(mac, BWN_B2063_TX_BB_SP3, 0x3f);
1049 bwn_phy_lp_set_gaintbl(struct bwn_mac *mac, uint32_t freq)
1051 struct bwn_phy_lp *plp = &mac->mac_phy.phy_lp;
1052 struct bwn_softc *sc = mac->mac_sc;
1056 KASSERT(mac->mac_phy.rev < 2, ("%s:%d: fail", __func__, __LINE__));
1071 bwn_tab_write_multi(mac, BWN_TAB_2(13, 0), 3, tmp);
1072 bwn_tab_write_multi(mac, BWN_TAB_2(12, 0), 3, tmp);
1076 bwn_phy_lp_digflt_save(struct bwn_mac *mac)
1078 struct bwn_phy_lp *plp = &mac->mac_phy.phy_lp;
1094 plp->plp_digfilt[i] = BWN_PHY_READ(mac, addr[i]);
1095 BWN_PHY_WRITE(mac, addr[i], val[i]);
1100 bwn_phy_lp_get_txpctlmode(struct bwn_mac *mac)
1102 struct bwn_phy_lp *plp = &mac->mac_phy.phy_lp;
1103 struct bwn_softc *sc = mac->mac_sc;
1106 ctl = BWN_PHY_READ(mac, BWN_PHY_TX_PWR_CTL_CMD);
1125 bwn_phy_lp_set_txpctlmode(struct bwn_mac *mac, uint8_t mode)
1127 struct bwn_phy_lp *plp = &mac->mac_phy.phy_lp;
1131 bwn_phy_lp_get_txpctlmode(mac);
1138 BWN_PHY_SETMASK(mac, BWN_PHY_TX_PWR_CTL_CMD, 0xff80,
1140 BWN_PHY_SETMASK(mac, BWN_PHY_TX_PWR_CTL_NNUM,
1144 if (mac->mac_phy.rev < 2)
1145 BWN_PHY_MASK(mac, BWN_PHY_RF_OVERRIDE_2, 0xfeff);
1147 BWN_PHY_MASK(mac, BWN_PHY_RF_OVERRIDE_2, 0xff7f);
1148 BWN_PHY_MASK(mac, BWN_PHY_RF_OVERRIDE_2, 0xbfff);
1150 BWN_PHY_MASK(mac, BWN_PHY_AFE_CTL_OVR, 0xffbf);
1154 if (mac->mac_phy.rev >= 2) {
1156 BWN_PHY_SET(mac, BWN_PHY_OFDM(0xd0), 0x2);
1158 BWN_PHY_MASK(mac, BWN_PHY_OFDM(0xd0), 0xfffd);
1176 BWN_PHY_SETMASK(mac, BWN_PHY_TX_PWR_CTL_CMD,
1181 bwn_phy_lp_bugfix(struct bwn_mac *mac)
1183 struct bwn_phy_lp *plp = &mac->mac_phy.phy_lp;
1184 struct bwn_softc *sc = mac->mac_sc;
1199 bwn_phy_lp_get_txpctlmode(mac);
1205 bwn_tab_read_multi(mac,
1206 (mac->mac_phy.rev < 2) ? BWN_TAB_4(10, 0x140) :
1209 bwn_phy_lp_tblinit(mac);
1210 bwn_phy_lp_bbinit(mac);
1211 bwn_phy_lp_txpctl_init(mac);
1212 bwn_phy_lp_rf_onoff(mac, 1);
1213 bwn_phy_lp_set_txpctlmode(mac, BWN_PHYLP_TXPCTL_OFF);
1215 bwn_tab_write_multi(mac,
1216 (mac->mac_phy.rev < 2) ? BWN_TAB_4(10, 0x140) :
1219 BWN_WRITE_2(mac, BWN_CHANNEL, plp->plp_chan);
1222 bwn_phy_lp_set_anafilter(mac, plp->plp_chan);
1226 bwn_phy_lp_get_txpctlmode(mac);
1228 bwn_phy_lp_set_txpctlmode(mac, BWN_PHYLP_TXPCTL_ON_SW);
1229 if (mac->mac_phy.rev >= 2) {
1230 rxcomp = bwn_tab_read(mac,
1232 txgain = bwn_tab_read(mac,
1238 bwn_phy_lp_set_txgain(mac, &tg);
1240 rxcomp = bwn_tab_read(mac,
1242 txgain = bwn_tab_read(mac,
1244 BWN_PHY_SETMASK(mac, BWN_PHY_TX_GAIN_CTL_OVERRIDE_VAL,
1246 bwn_phy_lp_set_txgain_dac(mac, txgain & 0x7);
1247 bwn_phy_lp_set_txgain_pa(mac, (txgain >> 24) & 0x7f);
1249 bwn_phy_lp_set_bbmult(mac, (rxcomp >> 20) & 0xff);
1254 bwn_tab_write_multi(mac, BWN_TAB_2(0, 80), 2, value);
1256 coeff = bwn_tab_read(mac,
1257 (mac->mac_phy.rev >= 2) ? BWN_TAB_4(7, txpwridx + 448) :
1259 bwn_tab_write(mac, BWN_TAB_2(0, 85), coeff & 0xffff);
1260 if (mac->mac_phy.rev >= 2) {
1261 rfpwr = bwn_tab_read(mac,
1263 BWN_PHY_SETMASK(mac, BWN_PHY_RF_PWR_OVERRIDE, 0xff00,
1266 bwn_phy_lp_set_txgain_override(mac);
1269 bwn_phy_lp_set_rccap(mac);
1270 bwn_phy_lp_set_antenna(mac, plp->plp_antenna);
1271 bwn_phy_lp_set_txpctlmode(mac, mode);
1276 bwn_phy_lp_digflt_restore(struct bwn_mac *mac)
1278 struct bwn_phy_lp *plp = &mac->mac_phy.phy_lp;
1289 BWN_PHY_WRITE(mac, addr[i], plp->plp_digfilt[i]);
1293 bwn_phy_lp_tblinit(struct bwn_mac *mac)
1295 uint32_t freq = ieee80211_ieee2mhz(bwn_phy_lp_get_default_chan(mac), 0);
1297 if (mac->mac_phy.rev < 2) {
1298 bwn_phy_lp_tblinit_r01(mac);
1299 bwn_phy_lp_tblinit_txgain(mac);
1300 bwn_phy_lp_set_gaintbl(mac, freq);
1304 bwn_phy_lp_tblinit_r2(mac);
1305 bwn_phy_lp_tblinit_txgain(mac);
1320 bwn_phy_lp_bbinit_r2(struct bwn_mac *mac)
1322 struct bwn_phy_lp *plp = &mac->mac_phy.phy_lp;
1323 struct bwn_softc *sc = mac->mac_sc;
1358 BWN_PHY_WRITE(mac, v1[i].reg, v1[i].value);
1359 BWN_PHY_SET(mac, BWN_PHY_ADC_COMPENSATION_CTL, 0x10);
1361 BWN_PHY_SETMASK(mac, v2[i].offset, v2[i].mask, v2[i].set);
1363 BWN_PHY_MASK(mac, BWN_PHY_CRSGAIN_CTL, ~0x4000);
1364 BWN_PHY_MASK(mac, BWN_PHY_CRSGAIN_CTL, ~0x2000);
1365 BWN_PHY_SET(mac, BWN_PHY_OFDM(0x10a), 0x1);
1367 bwn_tab_write(mac, BWN_TAB_4(17, 65), 0xec);
1368 BWN_PHY_SETMASK(mac, BWN_PHY_OFDM(0x10a), 0xff01, 0x14);
1370 BWN_PHY_SETMASK(mac, BWN_PHY_OFDM(0x10a), 0xff01, 0x10);
1372 BWN_PHY_SETMASK(mac, BWN_PHY_OFDM(0xdf), 0xff00, 0xf4);
1373 BWN_PHY_SETMASK(mac, BWN_PHY_OFDM(0xdf), 0x00ff, 0xf100);
1374 BWN_PHY_WRITE(mac, BWN_PHY_CLIPTHRESH, 0x48);
1375 BWN_PHY_SETMASK(mac, BWN_PHY_HIGAINDB, 0xff00, 0x46);
1376 BWN_PHY_SETMASK(mac, BWN_PHY_OFDM(0xe4), 0xff00, 0x10);
1377 BWN_PHY_SETMASK(mac, BWN_PHY_PWR_THRESH1, 0xfff0, 0x9);
1378 BWN_PHY_MASK(mac, BWN_PHY_GAINDIRECTMISMATCH, ~0xf);
1379 BWN_PHY_SETMASK(mac, BWN_PHY_VERYLOWGAINDB, 0x00ff, 0x5500);
1380 BWN_PHY_SETMASK(mac, BWN_PHY_CLIPCTRTHRESH, 0xfc1f, 0xa0);
1381 BWN_PHY_SETMASK(mac, BWN_PHY_GAINDIRECTMISMATCH, 0xe0ff, 0x300);
1382 BWN_PHY_SETMASK(mac, BWN_PHY_HIGAINDB, 0x00ff, 0x2a00);
1385 BWN_PHY_SETMASK(mac, BWN_PHY_LOWGAINDB, 0x00ff, 0x2100);
1386 BWN_PHY_SETMASK(mac, BWN_PHY_VERYLOWGAINDB, 0xff00, 0xa);
1388 BWN_PHY_SETMASK(mac, BWN_PHY_LOWGAINDB, 0x00ff, 0x1e00);
1389 BWN_PHY_SETMASK(mac, BWN_PHY_VERYLOWGAINDB, 0xff00, 0xd);
1392 BWN_PHY_SETMASK(mac, v3[i].offset, v3[i].mask, v3[i].set);
1395 bwn_tab_write(mac, BWN_TAB_2(0x08, 0x14), 0);
1396 bwn_tab_write(mac, BWN_TAB_2(0x08, 0x12), 0x40);
1400 BWN_PHY_SET(mac, BWN_PHY_CRSGAIN_CTL, 0x40);
1401 BWN_PHY_SETMASK(mac, BWN_PHY_CRSGAIN_CTL, 0xf0ff, 0xb00);
1402 BWN_PHY_SETMASK(mac, BWN_PHY_SYNCPEAKCNT, 0xfff8, 0x6);
1403 BWN_PHY_SETMASK(mac, BWN_PHY_MINPWR_LEVEL, 0x00ff, 0x9d00);
1404 BWN_PHY_SETMASK(mac, BWN_PHY_MINPWR_LEVEL, 0xff00, 0xa1);
1405 BWN_PHY_MASK(mac, BWN_PHY_IDLEAFTERPKTRXTO, 0x00ff);
1407 BWN_PHY_MASK(mac, BWN_PHY_CRSGAIN_CTL, ~0x40);
1409 BWN_PHY_SETMASK(mac, BWN_PHY_CRS_ED_THRESH, 0xff00, 0xb3);
1410 BWN_PHY_SETMASK(mac, BWN_PHY_CRS_ED_THRESH, 0x00ff, 0xad00);
1411 BWN_PHY_SETMASK(mac, BWN_PHY_INPUT_PWRDB, 0xff00, plp->plp_rxpwroffset);
1412 BWN_PHY_SET(mac, BWN_PHY_RESET_CTL, 0x44);
1413 BWN_PHY_WRITE(mac, BWN_PHY_RESET_CTL, 0x80);
1414 BWN_PHY_WRITE(mac, BWN_PHY_AFE_RSSI_CTL_0, 0xa954);
1415 BWN_PHY_WRITE(mac, BWN_PHY_AFE_RSSI_CTL_1,
1421 BWN_PHY_SET(mac, BWN_PHY_AFE_ADC_CTL_0, 0x1c);
1422 BWN_PHY_SETMASK(mac, BWN_PHY_AFE_CTL, 0x00ff, 0x8800);
1423 BWN_PHY_SETMASK(mac, BWN_PHY_AFE_ADC_CTL_1, 0xfc3c, 0x0400);
1426 bwn_phy_lp_digflt_save(mac);
1430 bwn_phy_lp_bbinit_r01(struct bwn_mac *mac)
1432 struct bwn_phy_lp *plp = &mac->mac_phy.phy_lp;
1433 struct bwn_softc *sc = mac->mac_sc;
1495 BWN_PHY_MASK(mac, BWN_PHY_AFE_DAC_CTL, 0xf7ff);
1496 BWN_PHY_WRITE(mac, BWN_PHY_AFE_CTL, 0);
1497 BWN_PHY_WRITE(mac, BWN_PHY_AFE_CTL_OVR, 0);
1498 BWN_PHY_WRITE(mac, BWN_PHY_RF_OVERRIDE_0, 0);
1499 BWN_PHY_WRITE(mac, BWN_PHY_RF_OVERRIDE_2, 0);
1500 BWN_PHY_SET(mac, BWN_PHY_AFE_DAC_CTL, 0x0004);
1501 BWN_PHY_SETMASK(mac, BWN_PHY_OFDMSYNCTHRESH0, 0xff00, 0x0078);
1502 BWN_PHY_SETMASK(mac, BWN_PHY_CLIPCTRTHRESH, 0x83ff, 0x5800);
1503 BWN_PHY_WRITE(mac, BWN_PHY_ADC_COMPENSATION_CTL, 0x0016);
1504 BWN_PHY_SETMASK(mac, BWN_PHY_AFE_ADC_CTL_0, 0xfff8, 0x0004);
1505 BWN_PHY_SETMASK(mac, BWN_PHY_VERYLOWGAINDB, 0x00ff, 0x5400);
1506 BWN_PHY_SETMASK(mac, BWN_PHY_HIGAINDB, 0x00ff, 0x2400);
1507 BWN_PHY_SETMASK(mac, BWN_PHY_LOWGAINDB, 0x00ff, 0x2100);
1508 BWN_PHY_SETMASK(mac, BWN_PHY_VERYLOWGAINDB, 0xff00, 0x0006);
1509 BWN_PHY_MASK(mac, BWN_PHY_RX_RADIO_CTL, 0xfffe);
1511 BWN_PHY_SETMASK(mac, v1[i].offset, v1[i].mask, v1[i].set);
1512 BWN_PHY_SETMASK(mac, BWN_PHY_INPUT_PWRDB,
1529 if (mac->mac_phy.rev == 0)
1530 BWN_PHY_SETMASK(mac, BWN_PHY_LP_RF_SIGNAL_LUT,
1532 bwn_tab_write(mac, BWN_TAB_2(11, 7), 60);
1540 BWN_PHY_SETMASK(mac, BWN_PHY_LP_RF_SIGNAL_LUT, 0xffcf, 0x0020);
1541 bwn_tab_write(mac, BWN_TAB_2(11, 7), 100);
1544 BWN_PHY_WRITE(mac, BWN_PHY_AFE_RSSI_CTL_0, tmp);
1546 BWN_PHY_SETMASK(mac, BWN_PHY_AFE_RSSI_CTL_1, 0xf000, 0x0aaa);
1548 BWN_PHY_SETMASK(mac, BWN_PHY_AFE_RSSI_CTL_1, 0xf000, 0x02aa);
1549 bwn_tab_write(mac, BWN_TAB_2(11, 1), 24);
1550 BWN_PHY_SETMASK(mac, BWN_PHY_RX_RADIO_CTL,
1552 if (mac->mac_phy.rev == 1 &&
1555 BWN_PHY_SETMASK(mac, v2[i].offset, v2[i].mask,
1559 ((mac->mac_phy.rev == 0) &&
1562 BWN_PHY_SETMASK(mac, v3[i].offset, v3[i].mask,
1564 } else if (mac->mac_phy.rev == 1 ||
1567 BWN_PHY_SETMASK(mac, v4[i].offset, v4[i].mask,
1571 BWN_PHY_SETMASK(mac, v5[i].offset, v5[i].mask,
1574 if (mac->mac_phy.rev == 1 &&
1576 BWN_PHY_COPY(mac, BWN_PHY_TR_LOOKUP_5, BWN_PHY_TR_LOOKUP_1);
1577 BWN_PHY_COPY(mac, BWN_PHY_TR_LOOKUP_6, BWN_PHY_TR_LOOKUP_2);
1578 BWN_PHY_COPY(mac, BWN_PHY_TR_LOOKUP_7, BWN_PHY_TR_LOOKUP_3);
1579 BWN_PHY_COPY(mac, BWN_PHY_TR_LOOKUP_8, BWN_PHY_TR_LOOKUP_4);
1584 BWN_PHY_SET(mac, BWN_PHY_CRSGAIN_CTL, 0x0006);
1585 BWN_PHY_WRITE(mac, BWN_PHY_GPIO_SELECT, 0x0005);
1586 BWN_PHY_WRITE(mac, BWN_PHY_GPIO_OUTEN, 0xffff);
1587 bwn_hf_write(mac, bwn_hf_read(mac) | BWN_HF_PR45960W);
1590 BWN_PHY_SET(mac, BWN_PHY_LP_PHY_CTL, 0x8000);
1591 BWN_PHY_SET(mac, BWN_PHY_CRSGAIN_CTL, 0x0040);
1592 BWN_PHY_SETMASK(mac, BWN_PHY_MINPWR_LEVEL, 0x00ff, 0xa400);
1593 BWN_PHY_SETMASK(mac, BWN_PHY_CRSGAIN_CTL, 0xf0ff, 0x0b00);
1594 BWN_PHY_SETMASK(mac, BWN_PHY_SYNCPEAKCNT, 0xfff8, 0x0007);
1595 BWN_PHY_SETMASK(mac, BWN_PHY_DSSS_CONFIRM_CNT, 0xfff8, 0x0003);
1596 BWN_PHY_SETMASK(mac, BWN_PHY_DSSS_CONFIRM_CNT, 0xffc7, 0x0020);
1597 BWN_PHY_MASK(mac, BWN_PHY_IDLEAFTERPKTRXTO, 0x00ff);
1599 BWN_PHY_MASK(mac, BWN_PHY_LP_PHY_CTL, 0x7fff);
1600 BWN_PHY_MASK(mac, BWN_PHY_CRSGAIN_CTL, 0xffbf);
1602 if (mac->mac_phy.rev == 1) {
1603 tmp = BWN_PHY_READ(mac, BWN_PHY_CLIPCTRTHRESH);
1606 BWN_PHY_WRITE(mac, BWN_PHY_4C3, tmp2);
1607 tmp = BWN_PHY_READ(mac, BWN_PHY_GAINDIRECTMISMATCH);
1610 BWN_PHY_WRITE(mac, BWN_PHY_4C4, tmp2);
1611 tmp = BWN_PHY_READ(mac, BWN_PHY_VERYLOWGAINDB);
1614 BWN_PHY_WRITE(mac, BWN_PHY_4C5, tmp2);
1624 bwn_phy_lp_b2062_init(struct bwn_mac *mac)
1632 struct bwn_phy_lp *plp = &mac->mac_phy.phy_lp;
1633 struct bwn_softc *sc = mac->mac_sc;
1666 bwn_phy_lp_b2062_tblinit(mac);
1669 BWN_RF_WRITE(mac, v1[i].reg, v1[i].value);
1670 if (mac->mac_phy.rev > 0)
1671 BWN_RF_WRITE(mac, BWN_B2062_S_BG_CTL1,
1672 (BWN_RF_READ(mac, BWN_B2062_N_COM2) >> 1) | 0x80);
1674 BWN_RF_SET(mac, BWN_B2062_N_TSSI_CTL0, 0x1);
1676 BWN_RF_MASK(mac, BWN_B2062_N_TSSI_CTL0, ~0x1);
1680 BWN_RF_MASK(mac, BWN_B2062_S_RFPLLCTL1, 0xfffb);
1683 BWN_RF_SET(mac, BWN_B2062_S_RFPLLCTL1, 0x4);
1686 BWN_RF_WRITE(mac, BWN_B2062_S_RFPLLCTL7,
1688 BWN_RF_WRITE(mac, BWN_B2062_S_RFPLLCTL18,
1690 BWN_RF_WRITE(mac, BWN_B2062_S_RFPLLCTL19,
1703 BWN_RF_WRITE(mac, BWN_B2062_S_RFPLLCTL8,
1705 BWN_RF_WRITE(mac, BWN_B2062_S_RFPLLCTL9,
1707 BWN_RF_WRITE(mac, BWN_B2062_S_RFPLLCTL10, f->value[4]);
1708 BWN_RF_WRITE(mac, BWN_B2062_S_RFPLLCTL11, f->value[5]);
1717 bwn_phy_lp_b2063_init(struct bwn_mac *mac)
1720 bwn_phy_lp_b2063_tblinit(mac);
1721 BWN_RF_WRITE(mac, BWN_B2063_LOGEN_SP5, 0);
1722 BWN_RF_SET(mac, BWN_B2063_COM8, 0x38);
1723 BWN_RF_WRITE(mac, BWN_B2063_REG_SP1, 0x56);
1724 BWN_RF_MASK(mac, BWN_B2063_RX_BB_CTL2, ~0x2);
1725 BWN_RF_WRITE(mac, BWN_B2063_PA_SP7, 0);
1726 BWN_RF_WRITE(mac, BWN_B2063_TX_RF_SP6, 0x20);
1727 BWN_RF_WRITE(mac, BWN_B2063_TX_RF_SP9, 0x40);
1728 if (mac->mac_phy.rev == 2) {
1729 BWN_RF_WRITE(mac, BWN_B2063_PA_SP3, 0xa0);
1730 BWN_RF_WRITE(mac, BWN_B2063_PA_SP4, 0xa0);
1731 BWN_RF_WRITE(mac, BWN_B2063_PA_SP2, 0x18);
1733 BWN_RF_WRITE(mac, BWN_B2063_PA_SP3, 0x20);
1734 BWN_RF_WRITE(mac, BWN_B2063_PA_SP2, 0x20);
1741 bwn_phy_lp_rxcal_r2(struct bwn_mac *mac)
1743 struct bwn_softc *sc = mac->mac_sc;
1772 tmp = BWN_RF_READ(mac, BWN_B2063_RX_BB_SP8) & 0xff;
1775 BWN_RF_WRITE(mac, v1[i].reg, v1[i].value);
1776 BWN_RF_MASK(mac, BWN_B2063_PLL_SP1, 0xf7);
1778 BWN_RF_WRITE(mac, v1[i].reg, v1[i].value);
1780 if (BWN_RF_READ(mac, BWN_B2063_RC_CALIB_CTL6) & 0x2)
1785 if (!(BWN_RF_READ(mac, BWN_B2063_RC_CALIB_CTL6) & 0x2))
1786 BWN_RF_WRITE(mac, BWN_B2063_RX_BB_SP8, tmp);
1788 tmp = BWN_RF_READ(mac, BWN_B2063_TX_BB_SP3) & 0xff;
1791 BWN_RF_WRITE(mac, v2[i].reg, v2[i].value);
1793 BWN_RF_WRITE(mac, BWN_B2063_RC_CALIB_CTL4, 0xfc);
1794 BWN_RF_WRITE(mac, BWN_B2063_RC_CALIB_CTL5, 0x0);
1796 BWN_RF_WRITE(mac, BWN_B2063_RC_CALIB_CTL4, 0x13);
1797 BWN_RF_WRITE(mac, BWN_B2063_RC_CALIB_CTL5, 0x1);
1799 BWN_RF_WRITE(mac, BWN_B2063_PA_SP7, 0x7d);
1801 if (BWN_RF_READ(mac, BWN_B2063_RC_CALIB_CTL6) & 0x2)
1805 if (!(BWN_RF_READ(mac, BWN_B2063_RC_CALIB_CTL6) & 0x2))
1806 BWN_RF_WRITE(mac, BWN_B2063_TX_BB_SP3, tmp);
1807 BWN_RF_WRITE(mac, BWN_B2063_RC_CALIB_CTL1, 0x7e);
1813 bwn_phy_lp_rccal_r12(struct bwn_mac *mac)
1815 struct bwn_phy_lp *plp = &mac->mac_phy.phy_lp;
1816 struct bwn_softc *sc = mac->mac_sc;
1830 error = bwn_phy_lp_switch_channel(mac, 7);
1834 txo = (BWN_PHY_READ(mac, BWN_PHY_AFE_CTL_OVR) & 0x40) ? 1 : 0;
1835 bbmult = bwn_phy_lp_get_bbmult(mac);
1837 tx_gains = bwn_phy_lp_get_txgain(mac);
1839 save[0] = BWN_PHY_READ(mac, BWN_PHY_RF_OVERRIDE_0);
1840 save[1] = BWN_PHY_READ(mac, BWN_PHY_RF_OVERRIDE_VAL_0);
1841 save[2] = BWN_PHY_READ(mac, BWN_PHY_AFE_CTL_OVR);
1842 save[3] = BWN_PHY_READ(mac, BWN_PHY_AFE_CTL_OVRVAL);
1843 save[4] = BWN_PHY_READ(mac, BWN_PHY_RF_OVERRIDE_2);
1844 save[5] = BWN_PHY_READ(mac, BWN_PHY_RF_OVERRIDE_2_VAL);
1845 save[6] = BWN_PHY_READ(mac, BWN_PHY_LP_PHY_CTL);
1847 bwn_phy_lp_get_txpctlmode(mac);
1849 bwn_phy_lp_set_txpctlmode(mac, BWN_PHYLP_TXPCTL_OFF);
1852 bwn_phy_lp_set_deaf(mac, 1);
1853 bwn_phy_lp_set_trsw_over(mac, 0, 1);
1854 BWN_PHY_MASK(mac, BWN_PHY_RF_OVERRIDE_VAL_0, 0xfffb);
1855 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_0, 0x4);
1856 BWN_PHY_MASK(mac, BWN_PHY_RF_OVERRIDE_VAL_0, 0xfff7);
1857 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_0, 0x8);
1858 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_VAL_0, 0x10);
1859 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_0, 0x10);
1860 BWN_PHY_MASK(mac, BWN_PHY_RF_OVERRIDE_VAL_0, 0xffdf);
1861 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_0, 0x20);
1862 BWN_PHY_MASK(mac, BWN_PHY_RF_OVERRIDE_VAL_0, 0xffbf);
1863 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_0, 0x40);
1864 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_2_VAL, 0x7);
1865 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_2_VAL, 0x38);
1866 BWN_PHY_MASK(mac, BWN_PHY_RF_OVERRIDE_2_VAL, 0xff3f);
1867 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_2_VAL, 0x100);
1868 BWN_PHY_MASK(mac, BWN_PHY_RF_OVERRIDE_2_VAL, 0xfdff);
1869 BWN_PHY_WRITE(mac, BWN_PHY_PS_CTL_OVERRIDE_VAL0, 0);
1870 BWN_PHY_WRITE(mac, BWN_PHY_PS_CTL_OVERRIDE_VAL1, 1);
1871 BWN_PHY_WRITE(mac, BWN_PHY_PS_CTL_OVERRIDE_VAL2, 0x20);
1872 BWN_PHY_MASK(mac, BWN_PHY_RF_OVERRIDE_2_VAL, 0xfbff);
1873 BWN_PHY_MASK(mac, BWN_PHY_RF_OVERRIDE_2_VAL, 0xf7ff);
1874 BWN_PHY_WRITE(mac, BWN_PHY_TX_GAIN_CTL_OVERRIDE_VAL, 0);
1875 BWN_PHY_WRITE(mac, BWN_PHY_RX_GAIN_CTL_OVERRIDE_VAL, 0x45af);
1876 BWN_PHY_WRITE(mac, BWN_PHY_RF_OVERRIDE_2, 0x3ff);
1878 loopback = bwn_phy_lp_loopback(mac);
1881 bwn_phy_lp_set_rxgain_idx(mac, loopback);
1882 BWN_PHY_SETMASK(mac, BWN_PHY_LP_PHY_CTL, 0xffbf, 0x40);
1883 BWN_PHY_SETMASK(mac, BWN_PHY_RF_OVERRIDE_2_VAL, 0xfff8, 0x1);
1884 BWN_PHY_SETMASK(mac, BWN_PHY_RF_OVERRIDE_2_VAL, 0xffc7, 0x8);
1885 BWN_PHY_SETMASK(mac, BWN_PHY_RF_OVERRIDE_2_VAL, 0xff3f, 0xc0);
1890 BWN_RF_WRITE(mac, BWN_B2062_N_RXBB_CALIB2, i);
1893 bwn_phy_lp_ddfs_turnon(mac, 1, 1, j, j, 0);
1894 if (!(bwn_phy_lp_rx_iq_est(mac, 1000, 32, &ie)))
1907 bwn_phy_lp_ddfs_turnoff(mac);
1910 bwn_phy_lp_clear_deaf(mac, 1);
1911 BWN_PHY_MASK(mac, BWN_PHY_RF_OVERRIDE_0, 0xff80);
1912 BWN_PHY_MASK(mac, BWN_PHY_RF_OVERRIDE_2, 0xfc00);
1914 BWN_PHY_WRITE(mac, BWN_PHY_RF_OVERRIDE_VAL_0, save[1]);
1915 BWN_PHY_WRITE(mac, BWN_PHY_RF_OVERRIDE_0, save[0]);
1916 BWN_PHY_WRITE(mac, BWN_PHY_AFE_CTL_OVRVAL, save[3]);
1917 BWN_PHY_WRITE(mac, BWN_PHY_AFE_CTL_OVR, save[2]);
1918 BWN_PHY_WRITE(mac, BWN_PHY_RF_OVERRIDE_2_VAL, save[5]);
1919 BWN_PHY_WRITE(mac, BWN_PHY_RF_OVERRIDE_2, save[4]);
1920 BWN_PHY_WRITE(mac, BWN_PHY_LP_PHY_CTL, save[6]);
1922 bwn_phy_lp_set_bbmult(mac, bbmult);
1924 bwn_phy_lp_set_txgain(mac, &tx_gains);
1925 bwn_phy_lp_set_txpctlmode(mac, txpctlmode);
1927 bwn_phy_lp_set_rccap(mac);
1933 bwn_phy_lp_set_rccap(struct bwn_mac *mac)
1935 struct bwn_phy_lp *plp = &mac->mac_phy.phy_lp;
1938 if (mac->mac_phy.rev == 1)
1941 BWN_RF_WRITE(mac, BWN_B2062_N_RXBB_CALIB2,
1943 BWN_RF_WRITE(mac, BWN_B2062_N_TXCTL_A, rc_cap | 0x80);
1944 BWN_RF_WRITE(mac, BWN_B2062_S_RXG_CNT16,
1969 bwn_phy_lp_b2062_reset_pllbias(struct bwn_mac *mac)
1971 struct bwn_softc *sc = mac->mac_sc;
1973 BWN_RF_WRITE(mac, BWN_B2062_S_RFPLLCTL2, 0xff);
1976 BWN_RF_WRITE(mac, BWN_B2062_N_COM1, 4);
1977 BWN_RF_WRITE(mac, BWN_B2062_S_RFPLLCTL2, 4);
1979 BWN_RF_WRITE(mac, BWN_B2062_S_RFPLLCTL2, 0);
1985 bwn_phy_lp_b2062_vco_calib(struct bwn_mac *mac)
1988 BWN_RF_WRITE(mac, BWN_B2062_S_RFPLLCTL21, 0x42);
1989 BWN_RF_WRITE(mac, BWN_B2062_S_RFPLLCTL21, 0x62);
1994 bwn_phy_lp_b2062_tblinit(struct bwn_mac *mac)
1998 struct bwn_softc *sc = mac->mac_sc;
2056 BWN_RF_WRITE(mac, br->br_offset, br->br_valueg);
2059 BWN_RF_WRITE(mac, br->br_offset, br->br_valuea);
2067 bwn_phy_lp_b2063_tblinit(struct bwn_mac *mac)
2071 struct bwn_softc *sc = mac->mac_sc;
2124 BWN_RF_WRITE(mac, br->br_offset, br->br_valueg);
2127 BWN_RF_WRITE(mac, br->br_offset, br->br_valuea);
2135 bwn_tab_read_multi(struct bwn_mac *mac, uint32_t typenoffset,
2146 BWN_PHY_WRITE(mac, BWN_PHY_TABLE_ADDR, offset);
2151 *data = BWN_PHY_READ(mac, BWN_PHY_TABLEDATALO) & 0xff;
2155 *((uint16_t *)data) = BWN_PHY_READ(mac,
2160 *((uint32_t *)data) = BWN_PHY_READ(mac,
2163 *((uint32_t *)data) |= BWN_PHY_READ(mac,
2174 bwn_tab_write_multi(struct bwn_mac *mac, uint32_t typenoffset,
2185 BWN_PHY_WRITE(mac, BWN_PHY_TABLE_ADDR, offset);
2194 BWN_PHY_WRITE(mac, BWN_PHY_TABLEDATALO, value);
2201 BWN_PHY_WRITE(mac, BWN_PHY_TABLEDATALO, value);
2206 BWN_PHY_WRITE(mac, BWN_PHY_TABLEDATAHI, value >> 16);
2207 BWN_PHY_WRITE(mac, BWN_PHY_TABLEDATALO, value);
2216 bwn_phy_lp_get_txgain(struct bwn_mac *mac)
2221 tg.tg_dac = (BWN_PHY_READ(mac, BWN_PHY_AFE_DAC_CTL) & 0x380) >> 7;
2222 if (mac->mac_phy.rev < 2) {
2223 tmp = BWN_PHY_READ(mac,
2231 tmp = BWN_PHY_READ(mac, BWN_PHY_TX_GAIN_CTL_OVERRIDE_VAL);
2232 tg.tg_pad = BWN_PHY_READ(mac, BWN_PHY_OFDM(0xfb)) & 0xff;
2239 bwn_phy_lp_get_bbmult(struct bwn_mac *mac)
2242 return (bwn_tab_read(mac, BWN_TAB_2(0, 87)) & 0xff00) >> 8;
2246 bwn_phy_lp_set_txgain(struct bwn_mac *mac, struct bwn_txgain *tg)
2250 if (mac->mac_phy.rev < 2) {
2251 BWN_PHY_SETMASK(mac, BWN_PHY_TX_GAIN_CTL_OVERRIDE_VAL, 0xf800,
2253 bwn_phy_lp_set_txgain_dac(mac, tg->tg_dac);
2254 bwn_phy_lp_set_txgain_override(mac);
2258 pa = bwn_phy_lp_get_pa_gain(mac);
2259 BWN_PHY_WRITE(mac, BWN_PHY_TX_GAIN_CTL_OVERRIDE_VAL,
2261 BWN_PHY_SETMASK(mac, BWN_PHY_OFDM(0xfb), 0x8000,
2263 BWN_PHY_WRITE(mac, BWN_PHY_OFDM(0xfc), (tg->tg_pga << 8) | tg->tg_gm);
2264 BWN_PHY_SETMASK(mac, BWN_PHY_OFDM(0xfd), 0x8000,
2266 bwn_phy_lp_set_txgain_dac(mac, tg->tg_dac);
2267 bwn_phy_lp_set_txgain_override(mac);
2271 bwn_phy_lp_set_bbmult(struct bwn_mac *mac, uint8_t bbmult)
2274 bwn_tab_write(mac, BWN_TAB_2(0, 87), (uint16_t)bbmult << 8);
2278 bwn_phy_lp_set_trsw_over(struct bwn_mac *mac, uint8_t tx, uint8_t rx)
2282 BWN_PHY_SETMASK(mac, BWN_PHY_RF_OVERRIDE_VAL_0, 0xfffc, trsw);
2283 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_0, 0x3);
2287 bwn_phy_lp_set_rxgain(struct bwn_mac *mac, uint32_t gain)
2289 struct bwn_softc *sc = mac->mac_sc;
2293 if (mac->mac_phy.rev < 2) {
2298 BWN_PHY_SETMASK(mac, BWN_PHY_RF_OVERRIDE_VAL_0, 0xfffe, trsw);
2299 BWN_PHY_SETMASK(mac, BWN_PHY_RF_OVERRIDE_2_VAL,
2301 BWN_PHY_SETMASK(mac, BWN_PHY_RF_OVERRIDE_2_VAL,
2303 BWN_PHY_WRITE(mac, BWN_PHY_RX_GAIN_CTL_OVERRIDE_VAL, lna);
2310 BWN_PHY_SETMASK(mac, BWN_PHY_RF_OVERRIDE_VAL_0, 0xfffe, trsw);
2311 BWN_PHY_SETMASK(mac, BWN_PHY_RF_OVERRIDE_2_VAL,
2313 BWN_PHY_SETMASK(mac, BWN_PHY_RF_OVERRIDE_2_VAL,
2315 BWN_PHY_WRITE(mac, BWN_PHY_RX_GAIN_CTL_OVERRIDE_VAL, low_gain);
2316 BWN_PHY_SETMASK(mac, BWN_PHY_AFE_DDFS, 0xfff0, high_gain);
2319 BWN_PHY_SETMASK(mac, BWN_PHY_RF_OVERRIDE_2_VAL,
2321 BWN_PHY_SETMASK(mac, BWN_PHY_OFDM(0xe6), 0xffe7,
2326 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_0, 0x1);
2327 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_0, 0x10);
2328 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_0, 0x40);
2329 if (mac->mac_phy.rev >= 2) {
2330 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_2, 0x100);
2332 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_2, 0x400);
2333 BWN_PHY_SET(mac, BWN_PHY_OFDM(0xe5), 0x8);
2337 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_2, 0x200);
2341 bwn_phy_lp_set_deaf(struct bwn_mac *mac, uint8_t user)
2343 struct bwn_phy_lp *plp = &mac->mac_phy.phy_lp;
2350 BWN_PHY_SETMASK(mac, BWN_PHY_CRSGAIN_CTL, 0xff1f, 0x80);
2354 bwn_phy_lp_clear_deaf(struct bwn_mac *mac, uint8_t user)
2356 struct bwn_phy_lp *plp = &mac->mac_phy.phy_lp;
2357 struct bwn_softc *sc = mac->mac_sc;
2369 BWN_PHY_SETMASK(mac, BWN_PHY_CRSGAIN_CTL, 0xff1f, 0x60);
2371 BWN_PHY_SETMASK(mac, BWN_PHY_CRSGAIN_CTL, 0xff1f, 0x20);
2375 bwn_phy_lp_calc_rx_iq_comp(struct bwn_mac *mac, uint16_t sample)
2398 v1 = BWN_PHY_READ(mac, BWN_PHY_RX_COMP_COEFF_S);
2402 BWN_PHY_SETMASK(mac, BWN_PHY_RX_COMP_COEFF_S, 0xff00, 0x00c0);
2403 BWN_PHY_MASK(mac, BWN_PHY_RX_COMP_COEFF_S, 0x00ff);
2405 ret = bwn_phy_lp_rx_iq_est(mac, sample, 32, &ie);
2417 tmp[1] = -bwn_sqrt(mac, tmp[1] - (tmp[0] * tmp[0]));
2421 BWN_PHY_SETMASK(mac, BWN_PHY_RX_COMP_COEFF_S, 0xff00, v1);
2422 BWN_PHY_SETMASK(mac, BWN_PHY_RX_COMP_COEFF_S, 0x00ff, v0 << 8);
2429 bwn_phy_lp_tblinit_r01(struct bwn_mac *mac)
2596 KASSERT(mac->mac_phy.rev < 2, ("%s:%d: fail", __func__, __LINE__));
2598 bwn_tab_write_multi(mac, BWN_TAB_1(2, 0), N(bwn_tab_sigsq_tbl),
2600 bwn_tab_write_multi(mac, BWN_TAB_2(1, 0), N(noisescale), noisescale);
2601 bwn_tab_write_multi(mac, BWN_TAB_2(14, 0), N(crsgainnft), crsgainnft);
2602 bwn_tab_write_multi(mac, BWN_TAB_2(8, 0), N(filterctl), filterctl);
2603 bwn_tab_write_multi(mac, BWN_TAB_4(9, 0), N(psctl), psctl);
2604 bwn_tab_write_multi(mac, BWN_TAB_1(6, 0), N(bwn_tab_pllfrac_tbl),
2606 bwn_tab_write_multi(mac, BWN_TAB_2(0, 0), N(bwn_tabl_iqlocal_tbl),
2608 if (mac->mac_phy.rev == 0) {
2609 bwn_tab_write_multi(mac, BWN_TAB_2(13, 0), N(ofdmcckgain_r0),
2611 bwn_tab_write_multi(mac, BWN_TAB_2(12, 0), N(ofdmcckgain_r0),
2614 bwn_tab_write_multi(mac, BWN_TAB_2(13, 0), N(ofdmcckgain_r1),
2616 bwn_tab_write_multi(mac, BWN_TAB_2(12, 0), N(ofdmcckgain_r1),
2619 bwn_tab_write_multi(mac, BWN_TAB_2(15, 0), N(gaindelta), gaindelta);
2620 bwn_tab_write_multi(mac, BWN_TAB_4(10, 0), N(txpwrctl), txpwrctl);
2624 bwn_phy_lp_tblinit_r2(struct bwn_mac *mac)
2626 struct bwn_softc *sc = mac->mac_sc;
2811 KASSERT(mac->mac_phy.rev < 2, ("%s:%d: fail", __func__, __LINE__));
2814 bwn_tab_write(mac, BWN_TAB_4(7, i), 0);
2816 bwn_tab_write_multi(mac, BWN_TAB_1(2, 0), N(bwn_tab_sigsq_tbl),
2818 bwn_tab_write_multi(mac, BWN_TAB_2(1, 0), N(noisescale), noisescale);
2819 bwn_tab_write_multi(mac, BWN_TAB_4(11, 0), N(filterctl), filterctl);
2820 bwn_tab_write_multi(mac, BWN_TAB_4(12, 0), N(psctl), psctl);
2821 bwn_tab_write_multi(mac, BWN_TAB_4(13, 0), N(gainidx), gainidx);
2822 bwn_tab_write_multi(mac, BWN_TAB_2(14, 0), N(auxgainidx), auxgainidx);
2823 bwn_tab_write_multi(mac, BWN_TAB_2(15, 0), N(swctl), swctl);
2824 bwn_tab_write_multi(mac, BWN_TAB_1(16, 0), N(hf), hf);
2825 bwn_tab_write_multi(mac, BWN_TAB_4(17, 0), N(gainval), gainval);
2826 bwn_tab_write_multi(mac, BWN_TAB_2(18, 0), N(gain), gain);
2827 bwn_tab_write_multi(mac, BWN_TAB_1(6, 0), N(bwn_tab_pllfrac_tbl),
2829 bwn_tab_write_multi(mac, BWN_TAB_2(0, 0), N(bwn_tabl_iqlocal_tbl),
2831 bwn_tab_write_multi(mac, BWN_TAB_4(9, 0), N(papdeps), papdeps);
2832 bwn_tab_write_multi(mac, BWN_TAB_4(10, 0), N(papdmult), papdmult);
2836 bwn_tab_write_multi(mac, BWN_TAB_4(13, 0), N(gainidx_a0),
2838 bwn_tab_write_multi(mac, BWN_TAB_2(14, 0), N(auxgainidx_a0),
2840 bwn_tab_write_multi(mac, BWN_TAB_4(17, 0), N(gainval_a0),
2842 bwn_tab_write_multi(mac, BWN_TAB_2(18, 0), N(gain_a0), gain_a0);
2847 bwn_phy_lp_tblinit_txgain(struct bwn_mac *mac)
2849 struct bwn_softc *sc = mac->mac_sc;
3451 if (mac->mac_phy.rev != 0 && mac->mac_phy.rev != 1) {
3453 bwn_phy_lp_gaintbl_write_multi(mac, 0, 128, txgain_r2);
3455 bwn_phy_lp_gaintbl_write_multi(mac, 0, 128,
3458 bwn_phy_lp_gaintbl_write_multi(mac, 0, 128,
3463 if (mac->mac_phy.rev == 0) {
3466 bwn_phy_lp_gaintbl_write_multi(mac, 0, 128, txgain_r0);
3468 bwn_phy_lp_gaintbl_write_multi(mac, 0, 128,
3471 bwn_phy_lp_gaintbl_write_multi(mac, 0, 128,
3478 bwn_phy_lp_gaintbl_write_multi(mac, 0, 128, txgain_r1);
3480 bwn_phy_lp_gaintbl_write_multi(mac, 0, 128, txgain_2ghz_r1);
3482 bwn_phy_lp_gaintbl_write_multi(mac, 0, 128, txgain_5ghz_r1);
3486 bwn_tab_write(struct bwn_mac *mac, uint32_t typeoffset, uint32_t value)
3497 BWN_PHY_WRITE(mac, BWN_PHY_TABLE_ADDR, offset);
3498 BWN_PHY_WRITE(mac, BWN_PHY_TABLEDATALO, value);
3503 BWN_PHY_WRITE(mac, BWN_PHY_TABLE_ADDR, offset);
3504 BWN_PHY_WRITE(mac, BWN_PHY_TABLEDATALO, value);
3507 BWN_PHY_WRITE(mac, BWN_PHY_TABLE_ADDR, offset);
3508 BWN_PHY_WRITE(mac, BWN_PHY_TABLEDATAHI, value >> 16);
3509 BWN_PHY_WRITE(mac, BWN_PHY_TABLEDATALO, value);
3517 bwn_phy_lp_loopback(struct bwn_mac *mac)
3525 bwn_phy_lp_set_trsw_over(mac, 1, 1);
3526 BWN_PHY_SET(mac, BWN_PHY_AFE_CTL_OVR, 1);
3527 BWN_PHY_MASK(mac, BWN_PHY_AFE_CTL_OVRVAL, 0xfffe);
3528 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_0, 0x800);
3529 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_VAL_0, 0x800);
3530 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_0, 0x8);
3531 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_VAL_0, 0x8);
3532 BWN_RF_WRITE(mac, BWN_B2062_N_TXCTL_A, 0x80);
3533 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_0, 0x80);
3534 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_VAL_0, 0x80);
3536 bwn_phy_lp_set_rxgain_idx(mac, i);
3537 bwn_phy_lp_ddfs_turnon(mac, 1, 1, 5, 5, 0);
3538 if (!(bwn_phy_lp_rx_iq_est(mac, 1000, 32, &ie)))
3546 bwn_phy_lp_ddfs_turnoff(mac);
3551 bwn_phy_lp_set_rxgain_idx(struct bwn_mac *mac, uint16_t idx)
3554 bwn_phy_lp_set_rxgain(mac, bwn_tab_read(mac, BWN_TAB_2(12, idx)));
3558 bwn_phy_lp_ddfs_turnon(struct bwn_mac *mac, int i_on, int q_on,
3562 bwn_phy_lp_ddfs_turnoff(mac);
3563 BWN_PHY_MASK(mac, BWN_PHY_AFE_DDFS_POINTER_INIT, 0xff80);
3564 BWN_PHY_MASK(mac, BWN_PHY_AFE_DDFS_POINTER_INIT, 0x80ff);
3565 BWN_PHY_SETMASK(mac, BWN_PHY_AFE_DDFS_INCR_INIT, 0xff80, incr1);
3566 BWN_PHY_SETMASK(mac, BWN_PHY_AFE_DDFS_INCR_INIT, 0x80ff, incr2 << 8);
3567 BWN_PHY_SETMASK(mac, BWN_PHY_AFE_DDFS, 0xfff7, i_on << 3);
3568 BWN_PHY_SETMASK(mac, BWN_PHY_AFE_DDFS, 0xffef, q_on << 4);
3569 BWN_PHY_SETMASK(mac, BWN_PHY_AFE_DDFS, 0xff9f, scale_idx << 5);
3570 BWN_PHY_MASK(mac, BWN_PHY_AFE_DDFS, 0xfffb);
3571 BWN_PHY_SET(mac, BWN_PHY_AFE_DDFS, 0x2);
3572 BWN_PHY_SET(mac, BWN_PHY_LP_PHY_CTL, 0x20);
3576 bwn_phy_lp_rx_iq_est(struct bwn_mac *mac, uint16_t sample, uint8_t time,
3581 BWN_PHY_MASK(mac, BWN_PHY_CRSGAIN_CTL, 0xfff7);
3582 BWN_PHY_WRITE(mac, BWN_PHY_IQ_NUM_SMPLS_ADDR, sample);
3583 BWN_PHY_SETMASK(mac, BWN_PHY_IQ_ENABLE_WAIT_TIME_ADDR, 0xff00, time);
3584 BWN_PHY_MASK(mac, BWN_PHY_IQ_ENABLE_WAIT_TIME_ADDR, 0xfeff);
3585 BWN_PHY_SET(mac, BWN_PHY_IQ_ENABLE_WAIT_TIME_ADDR, 0x200);
3588 if (!(BWN_PHY_READ(mac,
3593 if ((BWN_PHY_READ(mac, BWN_PHY_IQ_ENABLE_WAIT_TIME_ADDR) & 0x200)) {
3594 BWN_PHY_SET(mac, BWN_PHY_CRSGAIN_CTL, 0x8);
3598 ie->ie_iqprod = BWN_PHY_READ(mac, BWN_PHY_IQ_ACC_HI_ADDR);
3600 ie->ie_iqprod |= BWN_PHY_READ(mac, BWN_PHY_IQ_ACC_LO_ADDR);
3601 ie->ie_ipwr = BWN_PHY_READ(mac, BWN_PHY_IQ_I_PWR_ACC_HI_ADDR);
3603 ie->ie_ipwr |= BWN_PHY_READ(mac, BWN_PHY_IQ_I_PWR_ACC_LO_ADDR);
3604 ie->ie_qpwr = BWN_PHY_READ(mac, BWN_PHY_IQ_Q_PWR_ACC_HI_ADDR);
3606 ie->ie_qpwr |= BWN_PHY_READ(mac, BWN_PHY_IQ_Q_PWR_ACC_LO_ADDR);
3608 BWN_PHY_SET(mac, BWN_PHY_CRSGAIN_CTL, 0x8);
3613 bwn_tab_read(struct bwn_mac *mac, uint32_t typeoffset)
3623 BWN_PHY_WRITE(mac, BWN_PHY_TABLE_ADDR, offset);
3624 value = BWN_PHY_READ(mac, BWN_PHY_TABLEDATALO) & 0xff;
3627 BWN_PHY_WRITE(mac, BWN_PHY_TABLE_ADDR, offset);
3628 value = BWN_PHY_READ(mac, BWN_PHY_TABLEDATALO);
3631 BWN_PHY_WRITE(mac, BWN_PHY_TABLE_ADDR, offset);
3632 value = BWN_PHY_READ(mac, BWN_PHY_TABLEDATAHI);
3634 value |= BWN_PHY_READ(mac, BWN_PHY_TABLEDATALO);
3645 bwn_phy_lp_ddfs_turnoff(struct bwn_mac *mac)
3648 BWN_PHY_MASK(mac, BWN_PHY_AFE_DDFS, 0xfffd);
3649 BWN_PHY_MASK(mac, BWN_PHY_LP_PHY_CTL, 0xffdf);
3653 bwn_phy_lp_set_txgain_dac(struct bwn_mac *mac, uint16_t dac)
3657 ctl = BWN_PHY_READ(mac, BWN_PHY_AFE_DAC_CTL) & 0xc7f;
3659 BWN_PHY_SETMASK(mac, BWN_PHY_AFE_DAC_CTL, 0xf000, ctl);
3663 bwn_phy_lp_set_txgain_pa(struct bwn_mac *mac, uint16_t gain)
3666 BWN_PHY_SETMASK(mac, BWN_PHY_OFDM(0xfb), 0xe03f, gain << 6);
3667 BWN_PHY_SETMASK(mac, BWN_PHY_OFDM(0xfd), 0x80ff, gain << 8);
3671 bwn_phy_lp_set_txgain_override(struct bwn_mac *mac)
3674 if (mac->mac_phy.rev < 2)
3675 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_2, 0x100);
3677 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_2, 0x80);
3678 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_2, 0x4000);
3680 BWN_PHY_SET(mac, BWN_PHY_AFE_CTL_OVR, 0x40);
3684 bwn_phy_lp_get_pa_gain(struct bwn_mac *mac)
3687 return BWN_PHY_READ(mac, BWN_PHY_OFDM(0xfb)) & 0x7f;
3702 bwn_phy_lp_gaintbl_write_multi(struct bwn_mac *mac, int offset, int count,
3708 bwn_phy_lp_gaintbl_write(mac, i, table[i]);
3712 bwn_phy_lp_gaintbl_write(struct bwn_mac *mac, int offset,
3716 if (mac->mac_phy.rev >= 2)
3717 bwn_phy_lp_gaintbl_write_r2(mac, offset, data);
3719 bwn_phy_lp_gaintbl_write_r01(mac, offset, data);
3723 bwn_phy_lp_gaintbl_write_r2(struct bwn_mac *mac, int offset,
3726 struct bwn_softc *sc = mac->mac_sc;
3730 KASSERT(mac->mac_phy.rev >= 2, ("%s:%d: fail", __func__, __LINE__));
3733 if (mac->mac_phy.rev >= 3) {
3740 bwn_tab_write(mac, BWN_TAB_4(7, 0xc0 + offset), tmp);
3741 bwn_tab_write(mac, BWN_TAB_4(7, 0x140 + offset),
3746 bwn_phy_lp_gaintbl_write_r01(struct bwn_mac *mac, int offset,
3750 KASSERT(mac->mac_phy.rev < 2, ("%s:%d: fail", __func__, __LINE__));
3752 bwn_tab_write(mac, BWN_TAB_4(10, 0xc0 + offset),
3755 bwn_tab_write(mac, BWN_TAB_4(10, 0x140 + offset), te.te_bbmult << 20);