bnxt/bnxt_en/hsi_struct_def.h

1606 	 * Invalid combination of enables fields is specified in
11819 	 * When driver enables PPS event, Firmware will generate
13861 	uint32_t	enables;
13962 	uint32_t	enables;
14041 	uint32_t	enables;
14116 	uint32_t	enables;
14192 	uint32_t	enables;
16033 	 * When this bit is '1', it indicates that driver enables XID
16038 	 * When this bit is '1', it indicates that driver enables XID
16299 	uint32_t	enables;
16992 	 * When this bit is '1', it indicates that driver enables XID
16997 	 * When this bit is '1', it indicates that driver enables XID
17267 	uint32_t	enables;
17634 	uint32_t	enables;
17872 	uint32_t	enables;
18008 	uint32_t	enables;
18849 	uint32_t	enables;
19938 	uint32_t	enables;
21437 	uint32_t	enables;
21627 	uint16_t	enables;
21898 	uint16_t	enables;
23269 	uint32_t	enables;
23765 	uint8_t	enables;
23951 	uint8_t	enables;
24103 	uint8_t	enables;
24442 	uint8_t	enables;
24855 	uint32_t	enables;
25595 	uint32_t	enables;
25947 	 * bit in the 'enables' field is '0', the link shall be forced
25951 	 * bit in the 'enables' field is '1', the link shall be forced
26172 	uint32_t	enables;
26572 	 * auto_link_speeds2_mask bit in the "enables" field is 1.
27893 	uint32_t	enables;
30353 	uint16_t	enables;
30838 	uint32_t	enables;
30929 	uint32_t	enables;
31177 	uint32_t	enables;
32538 	uint32_t	enables;
32557 	 * Only bits that have corresponding bits in the 'enables'
33107 	uint16_t	enables;
33414 	uint32_t	enables;
33426 	 * This field is valid only when tx_rate_limit bit in 'enables'
34300 	uint32_t	enables;
34762 	uint32_t	enables;
35684 	uint32_t	enables;
36666 	uint32_t	enables;
36957 	uint32_t	enables;
37292 	uint32_t	enables;
37455 	uint16_t	enables;
37905 	uint32_t	enables;
38226 	uint32_t	enables;
38753 	uint32_t	enables;
39029 	uint32_t	enables;
39432 	uint32_t	enables;
39670 	 * When this bit is '1' it enables ring selection using the incoming
39674 	uint32_t	enables;
39900 	uint32_t	enables;
40133 	uint32_t	enables;
40468 	uint32_t	enables;
41516 	uint32_t	enables;
41910 	uint32_t	enables;
42562 	uint16_t	enables;
42731 	uint16_t	enables;
43163 	uint16_t	enables;
43405 	uint32_t	enables;
44172 	uint32_t	enables;
44653 	uint32_t	enables;
45124 	uint32_t	enables;
46112 	uint32_t	enables;
46556 	uint32_t	enables;
46724 	uint32_t	enables;
47120 	uint32_t	enables;
48110 	uint32_t	enables;
49619 	uint16_t	enables;
50319 	uint32_t	enables;
52527 	uint32_t	enables;
61122 	uint32_t	enables;
63386 	uint32_t	enables;
63543 	uint32_t	enables;
66229 	 * This value enables the global scheduler. When enabled, USEQs will
67263 	uint32_t	enables;
67605 	uint32_t	enables;
72508 	 * Setting this bit to 1 enables insertion of a VLAN Tag to a RoCE
72522 	 * Setting this bit to 1 enables use of own stats context ID
72686 	 * Setting this bit to 1 enables insertion of a VLAN Tag to a RoCE
72700 	 * Setting this bit to 1 enables use of own stats context ID
72861 	 * Setting this bit to 1 enables insertion of a VLAN Tag to a RoCE
73897 	 * This feature enables the following capabilities:
86982 	 * This doorbell command enables the SRQ async event
87452 	 * This doorbell command enables the SRQ async event to be armed.
87851 	 * This doorbell command enables the SRQ async event to be armed.
88867 	uint16_t	enables;
88957 	uint16_t	enables;
90831 	uint32_t	enables;
90967 	uint32_t	enables;